/third_party/ffmpeg/libavcodec/aarch64/ |
D | vp9mc_16bpp_neon.S | 213 umin v1.8h, v1.8h, v31.8h 214 umin v24.8h, v24.8h, v31.8h 220 umin v2.8h, v2.8h, v31.8h 221 umin v25.8h, v25.8h, v31.8h 224 umin v1.4h, v1.4h, v31.4h 225 umin v24.4h, v24.4h, v31.4h 337 umin \reg1\().4h, \reg1\().4h, \minreg\().4h 338 umin \reg2\().4h, \reg2\().4h, \minreg\().4h 339 umin \reg3\().4h, \reg3\().4h, \minreg\().4h 340 umin \reg4\().4h, \reg4\().4h, \minreg\().4h [all …]
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D | vp9itxfm_16bpp_neon.S | 432 umin v0.8h, v0.8h, v31.8h 437 umin v2.8h, v2.8h, v31.8h 491 umin v3.8h, v3.8h, v31.8h 492 umin v4.8h, v4.8h, v31.8h 641 umin v0.8h, v0.8h, v16.8h 649 umin v1.8h, v1.8h, v16.8h 657 umin v2.8h, v2.8h, v16.8h 665 umin v3.8h, v3.8h, v16.8h 672 umin v4.8h, v4.8h, v16.8h 676 umin v5.8h, v5.8h, v16.8h [all …]
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D | h264dsp_neon.S | 73 umin v23.16B, v23.16B, v20.16B 78 umin v28.16B, v4.16B, v28.16B
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/third_party/glslang/Test/ |
D | 300BuiltIns.frag | 4 uint umax, umin; 43 uvec4 uv10 = clamp(uv4y, umin, umax);
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/third_party/mesa3d/src/intel/tools/tests/gen9/ |
D | sends.asm | 42 …dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD16, umin) mlen 2 ex_mlen 2 rlen 0 { … 68 …dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 254, SIMD8, umin) mlen 1 ex_mlen 1 rlen 1 { a… 130 …dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, umin) mlen 1 ex_mlen 1 rlen 1 { ali… 132 …dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, umin) mlen 2 ex_mlen 2 rlen 2 { al… 142 …dp data 1 MsgDesc: ( DC typed atomic, Surface = 0, SIMD16, umin) mlen 1 ex_mlen 1 rlen 1 { align1 … 184 …dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umin) mlen 1 ex_mlen 1 rlen 1 { ali… 198 …dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umin) mlen 2 ex_mlen 2 rlen 2 { al… 214 …dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umin) mlen 1 ex_mlen 1 rlen 0 { ali… 226 …dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umin) mlen 2 ex_mlen 2 rlen 0 { al… 254 …dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, umin) mlen 2 ex_mlen 1 rlen 0 { align1 … [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
D | ConstantRange.cpp | 1021 ConstantRange::umin(const ConstantRange &Other) const { in umin() function in ConstantRange 1026 APInt NewL = APIntOps::umin(getUnsignedMin(), Other.getUnsignedMin()); in umin() 1027 APInt NewU = APIntOps::umin(getUnsignedMax(), Other.getUnsignedMax()) + 1; in umin() 1146 APInt Upper = APIntOps::umin(getUnsignedMax(), RHS.getUnsignedMax() - 1) + 1; in urem() 1173 APInt Upper = APIntOps::umin(MaxLHS, MaxAbsRHS - 1) + 1; in srem() 1188 APInt Upper = APIntOps::umin(MaxLHS, MaxAbsRHS - 1) + 1; in srem() 1199 APInt umin = APIntOps::umin(Other.getUnsignedMax(), getUnsignedMax()); in binaryAnd() local 1200 return getNonEmpty(APInt::getNullValue(getBitWidth()), std::move(umin) + 1); in binaryAnd() 1409 Lo = APIntOps::umin(Lower, -Upper + 1); in abs()
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/third_party/mesa3d/src/compiler/nir/ |
D | nir_opt_uniform_atomics.c | 67 OP(umin, umin) in parse_atomic_op()
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D | nir_opt_load_store_vectorize.c | 87 ATOMIC(nir_var_mem_ssbo, ssbo, umin, 0, 1, -1, 2) in get_info() 101 ATOMIC(0, deref, umin, -1, -1, 0, 1) in get_info() 115 ATOMIC(nir_var_mem_shared, shared, umin, -1, 0, -1, 1) in get_info() 129 ATOMIC(nir_var_mem_global, global, umin, -1, 0, -1, 1) in get_info()
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/third_party/glslang/Test/baseResults/ |
D | 300BuiltIns.frag.out | 105 0:43 'umin' ( global mediump uint) 194 0:? 'umin' ( global mediump uint) 312 0:43 'umin' ( global mediump uint) 401 0:? 'umin' ( global mediump uint)
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
D | ConstantRange.h | 380 ConstantRange umin(const ConstantRange &Other) const;
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/third_party/boost/libs/atomic/test/ |
D | api_test_helpers.hpp | 405 unsigned_promoted_difference_type umin = static_cast< unsigned_promoted_difference_type >( in test_additive_operators_with_type_and_test() local 407 umin = -umin; in test_additive_operators_with_type_and_test() 409 std::memcpy(&neg_min, &umin, sizeof(neg_min)); in test_additive_operators_with_type_and_test()
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/third_party/mesa3d/docs/relnotes/ |
D | 20.2.1.rst | 108 - nir/algebraic: optimize iand/ior of (n)eq zero when umax/umin not available
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/third_party/mesa3d/src/gallium/drivers/etnaviv/ |
D | etnaviv_compiler_nir_emit.c | 97 UOPC(umin, SELECT, 0_1_0, GT),
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/third_party/mesa3d/src/panfrost/midgard/ |
D | midgard_compile.c | 732 ALU_CASE(umin, umin); in emit_alu() 2086 ATOMIC_CASE(ctx, instr, umin, umin); in emit_intrinsic() 2097 IMAGE_ATOMIC_CASE(ctx, instr, umin, umin); in emit_intrinsic()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/GlobalISel/ |
D | SelectionDAGCompat.td | 117 def : GINodeEquiv<G_UMIN, umin>;
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/third_party/mesa3d/src/intel/tools/tests/gen7.5/ |
D | send.asm | 1196 … dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD8, umin) mlen 2 rlen 1 { align1 1Q }; 1198 … dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 2, SIMD16, umin) mlen 4 rlen 2 { align1 1H }; 1232 … dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, umin) mlen 3 rlen 1 { align1 1Q }; 1234 … dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, umin) mlen 3 rlen 1 { align1 2Q }; 1324 … dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umin) mlen 2 rlen 1 { align1 1Q }; 1338 … dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umin) mlen 4 rlen 2 { align1 1H }; 1364 … dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD8, umin) mlen 2 rlen 0 { align1 1Q }; 1378 … dp data 1 MsgDesc: ( DC untyped atomic op, Surface = 1, SIMD16, umin) mlen 4 rlen 0 { align1 1H }; 1466 … dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD16, umin) mlen 4 rlen 0 { align1 1Q }; 1468 … dp data 1 MsgDesc: ( DC typed atomic, Surface = 1, SIMD8, umin) mlen 4 rlen 0 { align1 2Q };
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/third_party/openh264/codec/common/arm64/ |
D | deblocking_aarch64_neon.S | 298 umin v0.8b, v0.8b, v3.8b 299 umin v1.8b, v1.8b, v3.8b 300 umin v2.8b, v2.8b, v3.8b
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
D | IntrinsicEnums.inc | 128 experimental_vector_reduce_umin, // llvm.experimental.vector.reduce.umin
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/third_party/skia/third_party/externals/swiftshader/src/Shader/ |
D | ShaderCore.hpp | 285 void umin(Vector4f &dst, const Vector4f &src0, const Vector4f &src1);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
D | APInt.h | 1793 inline const APInt &umin(const APInt &A, const APInt &B) { in umin() function
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsMSAInstrInfo.td | 2414 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", umin, MSA128BOpnd>; 2415 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", umin, MSA128HOpnd>; 2416 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", umin, MSA128WOpnd>; 2417 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", umin, MSA128DOpnd>; 2428 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", umin, vsplati8_uimm5, 2430 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", umin, vsplati16_uimm5, 2432 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", umin, vsplati32_uimm5, 2434 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", umin, vsplati64_uimm5,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | VOP2Instructions.td | 478 defm V_MIN_U32 : VOP2Inst <"v_min_u32", VOP_PAT_GEN<VOP_I32_I32_I32>, umin>; 634 defm V_MIN_U16 : VOP2Inst <"v_min_u16", VOP_I16_I16_I16, umin>; 790 defm : Arithmetic_i16_0Hi_Pats<umin, V_MIN_U16_e64>;
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D | SIInstructions.td | 1436 (umin i32:$src0, i32:$src1)), 1999 defm : IntMed3Pat<V_MED3_U32, umin, umax, umin_oneuse, umax_oneuse>; 2051 defm : Int16Med3Pat<V_MED3_U16, umin, umax, umax_oneuse, umin_oneuse>;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/AsmParser/ |
D | LLLexer.cpp | 715 KEYWORD(umin); in LexIdentifier()
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/third_party/mesa3d/src/intel/compiler/ |
D | brw_nir.c | 1411 AOP_CASE(umin): return BRW_AOP_UMIN; in brw_aop_for_nir_intrinsic()
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