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Searched refs:umull (Results 1 – 25 of 31) sorted by relevance

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/third_party/openh264/codec/processing/src/arm64/
Dvaa_calc_aarch64_neon.S179 umull v30.8h, v31.8b, v31.8b
185 umull v30.8h, v0.8b, v0.8b
198 umull v30.8h, v3.8b, v3.8b
204 umull v30.8h, v0.8b, v0.8b
219 umull v30.8h, v26.8b, v26.8b
225 umull v30.8h, v0.8b, v0.8b
238 umull v30.8h, v3.8b, v3.8b
244 umull v30.8h, v0.8b, v0.8b
331 umull v30.8h, v31.8b, v31.8b
337 umull v30.8h, v0.8b, v0.8b
[all …]
Dadaptive_quantization_aarch64_neon.S41 umull v3.8h, v2.8b, v2.8b
49 umull v3.8h, v0.8b, v0.8b
63 umull v5.8h, v6.8b, v6.8b
72 umull v5.8h, v0.8b, v0.8b
Ddown_sample_aarch64_neon.S287 umull v20.4s, v6.4h, v7.4h
288 umull v21.2d, v28.2s, v20.2s
/third_party/ffmpeg/libavcodec/aarch64/
Dh264cmc_neon.S63 umull v16.8H, v4.8B, v0.8B
71 umull v17.8H, v6.8B, v0.8B
106 umull v16.8H, v4.8B, v0.8B
109 umull v17.8H, v6.8B, v0.8B
140 umull v16.8H, v4.8B, v0.8B
142 umull v17.8H, v6.8B, v0.8B
169 umull v16.8H, v4.8B, v0.8B
170 umull v17.8H, v5.8B, v0.8B
238 umull v18.8H, v4.8B, v0.8B
244 umull v19.8H, v6.8B, v0.8B
[all …]
Dvp8dsp_neon.S1512 umull v16.8h, v2.8b, v1.8b
1515 umull v6.8h, v3.8b, v1.8b
1519 umull v22.8h, v18.8b, v1.8b
1521 umull v24.8h, v19.8b, v1.8b
1544 umull v6.8h, v2.8b, v1.8b
1549 umull v18.8h, v4.8b, v1.8b
1577 umull v16.8h, v4.8b, v1.8b
1579 umull v18.8h, v5.8b, v1.8b
1588 umull v22.8h, v18.8b, v1.8b
1591 umull v24.8h, v19.8b, v1.8b
[all …]
Dh264dsp_neon.S729 umull v4.8H, v0.8B, v20.8B
732 umull v24.8H, v0.8B, v28.8B
756 umull v2.8H, v0.8B, v4.8B
758 umull v20.8H, v0.8B, v6.8B
776 umull v2.8H, v0.8B, v4.8B
780 umull v20.8H, v0.8B, v6.8B
/third_party/openssl/crypto/poly1305/asm/arm64/
Dpoly1305-armv8.S491 umull v23.2d,v14.2s,v7.s[2]
493 umull v22.2d,v14.2s,v5.s[2]
494 umull v21.2d,v14.2s,v3.s[2]
496 umull v20.2d,v14.2s,v1.s[2]
498 umull v19.2d,v14.2s,v0.s[2]
/third_party/openssl/crypto/ec/asm/arm32/
Decp_nistz256-armv4.S2847 umull r3,r14,r4,r2 @ r[0]=a[0]*b[0]
2852 umull r4,r0,r5,r2 @ r[1]=a[1]*b[0]
2853 umull r5,r1,r6,r2
2855 umull r6,r12,r7,r2
2857 umull r7,r14,r8,r2
2859 umull r8,r0,r9,r2
2861 umull r9,r1,r10,r2
2863 umull r10,r12,r11,r2
/third_party/openssl/crypto/bn/asm/arm32/
Darmv4-mont.S67 umull r10,r11,r5,r2 @ ap[0]*bp[0]
/third_party/openssl/crypto/poly1305/asm/arm32/
Dpoly1305-armv4.S222 umull r2,r3,r5,r9
224 umull r0,r1,r4,r9
/third_party/openh264/codec/common/arm64/
Dmc_aarch64_neon.S1833 umull v0.8h, v16.8b, v28.8b
1834 umull v2.8h, v18.8b, v28.8b
1835 umull v4.8h, v20.8b, v28.8b
1836 umull v6.8h, v22.8b, v28.8b
1890 umull v16.8h, v0.8b, v4.8b
/third_party/flutter/skia/third_party/externals/libjpeg-turbo/simd/arm64/
Djsimd_neon.S1959 umull v14.4s, v4.4h, v0.h[0]
2711 umull v4.4s, v20.4h, v28.4h /* multiply by reciprocal */
2713 umull v5.4s, v21.4h, v29.4h
2715 umull v6.4s, v22.4h, v30.4h /* multiply by reciprocal */
2717 umull v7.4s, v23.4h, v31.4h
/third_party/libjpeg-turbo/simd/arm64/
Djsimd_neon.S2105 umull v14.4s, v4.4h, v0.h[0]
2791 umull v4.4s, v20.4h, v28.4h /* multiply by reciprocal */
2793 umull v5.4s, v21.4h, v29.4h
2795 umull v6.4s, v22.4h, v30.4h /* multiply by reciprocal */
2797 umull v7.4s, v23.4h, v31.4h
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.h315 void umull(const Operand *OpRdLo, const Operand *OpRdHi, const Operand *OpRn,
DIceInstARM32.cpp2906 Asm->umull(getDest(), DestHi, getSrc(0), getSrc(1), getPredicate()); in emitIAS()
DIceAssemblerARM32.cpp2294 void AssemblerARM32::umull(const Operand *OpRdLo, const Operand *OpRdHi, in umull() function in Ice::ARM32::AssemblerARM32
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.h521 void umull(Register rd_lo, Register rd_hi, Register rn, Register rm,
Dassembler_arm.cc402 void Assembler::umull(Register rd_lo, Register rd_hi,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td1383 def : WideMulAccumAlias<"umull", UMADDLrrr>;
4515 defm UMULL : SIMDLongThreeVectorBHS<1, 0b1100, "umull", int_aarch64_neon_umull>;
5647 defm UMULL : SIMDVectorIndexedLongSD<1, 0b1010, "umull",
6433 // Multiply high patterns which multiply the lower subvector using smull/umull
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrInfo.td4172 "umull", "\t$RdLo, $RdHi, $Rn, $Rm",
6197 def : InstAlias<"umull${s}${p} $RdLo, $RdHi, $Rn, $Rm",
DARMInstrThumb2.td2892 def t2UMULL : T2MulLong<0b010, 0b0000, "umull",
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12606 "lb\006umlslt\006umnegl\004umov\006umsubl\005umulh\005umull\006umull2\006"
19525 …{ 6490 /* umull */, AArch64::UMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, AMFBS_None, { MCK…
19526 …{ 6490 /* umull */, AArch64::UMULLv2i32_v2i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg…
19527 …{ 6490 /* umull */, AArch64::UMULLv4i16_v4i32, Convert__VectorReg1281_0__VectorReg641_2__VectorReg…
19528 …{ 6490 /* umull */, AArch64::UMULLv8i8_v8i16, Convert__VectorReg1281_0__VectorReg641_2__VectorReg6…
19529 …{ 6490 /* umull */, AArch64::UMULLv2i32_indexed, Convert__VectorReg1281_0__VectorReg641_2__VectorR…
19530 …{ 6490 /* umull */, AArch64::UMULLv4i16_indexed, Convert__VectorReg1281_0__VectorReg641_2__VectorR…
26898 …{ 6490 /* umull */, AArch64::UMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, AMFBS_None, { MCK…
26899 …{ 6490 /* umull */, AArch64::UMULLv2i32_v2i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg…
26900 …{ 6490 /* umull */, AArch64::UMULLv4i16_v4i32, Convert__VectorReg1281_1__VectorReg641_2__VectorReg…
[all …]
DAArch64GenAsmWriter.inc22807 /* 13333 */ "umull $\x01, $\x02, $\x03\0"
DAArch64GenAsmWriter1.inc23528 /* 13311 */ "umull $\x01, $\x02, $\x03\0"
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenAsmMatcher.inc9915 "umaal\005umlal\005umull\007uqadd16\006uqadd8\005uqasx\006uqrshl\007uqrs"
11509 …{ 1791 /* umull */, ARM::t2UMULL, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_IsTh…
11510 …{ 1791 /* umull */, ARM::UMULL, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, AM…
11511 …{ 1791 /* umull */, ARM::UMULL, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, AM…

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