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Searched refs:vi_dcc_enabled (Results 1 – 9 of 9) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_blit.c456 assert(vi_dcc_enabled(tex, first_level)); in si_blit_decompress_color()
460 if (!vi_dcc_enabled(tex, i)) in si_blit_decompress_color()
511 vi_dcc_enabled(tex, level)) { in si_blit_decompress_color()
528 si_make_CB_shader_coherent(sctx, tex->buffer.b.b.nr_samples, vi_dcc_enabled(tex, first_level), in si_blit_decompress_color()
544 !vi_dcc_enabled(tex, first_level)) in si_decompress_color_texture()
601 if (!vi_dcc_enabled(tex, first_level)) in si_check_render_feedback_texture()
853 vi_dcc_enabled(stex, level)) { in si_decompress_subresource()
895 if (vi_dcc_enabled(tex, level) && in si_use_compute_copy_for_float_formats()
927 (!vi_dcc_enabled(sdst, dst_level) || sctx->chip_class >= GFX10) && in si_resource_copy_region()
1161 if (vi_dcc_enabled(dst, info->dst.level)) { in do_hardware_msaa_resolve()
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Dsi_sdma_copy_image.c164 bool dcc = vi_dcc_enabled(tiled, 0) && is_v5; in si_sdma_v4_v5_copy_texture()
438 if (vi_dcc_enabled(src, 0) && sctx->chip_class < GFX10) in si_sdma_copy_image()
444 if (vi_dcc_enabled(dst, 0)) in si_sdma_copy_image()
Dsi_descriptors.c322 if (!(access & SI_IMAGE_ACCESS_DCC_OFF) && vi_dcc_enabled(tex, first_level)) { in si_set_mutable_tex_desc_fields()
459 if (vi_dcc_enabled(tex, view->u.tex.first_level)) in si_set_sampler_view_desc()
562 if (vi_dcc_enabled(tex, sview->base.u.tex.first_level) && in si_set_sampler_views()
748 bool uses_dcc = vi_dcc_enabled(tex, level); in si_set_shader_image_desc()
843 if (vi_dcc_enabled(tex, level) && p_atomic_read(&tex->framebuffers_bound)) in si_set_shader_image()
2400 if (vi_dcc_enabled(tex, sview->base.u.tex.first_level) && in si_make_texture_handle_resident()
2522 if (vi_dcc_enabled(tex, level) && p_atomic_read(&tex->framebuffers_bound)) in si_make_image_handle_resident()
2785 vi_dcc_enabled(tex, 0)) { in si_gfx_resources_check_encrypted()
Dsi_clear.c300 assert(vi_dcc_enabled(tex, level)); in vi_dcc_get_clear_info()
604 if (vi_dcc_enabled(tex, level)) { in si_fast_clear()
1085 (sctx->chip_class >= GFX10 || !vi_dcc_enabled(sdst, dst->u.tex.level))) { in si_clear_render_target()
Dsi_compute_blit.c436 if (!vi_dcc_enabled(ssrc, src_level) && in si_compute_copy_image()
437 !vi_dcc_enabled(sdst, dst_level) && in si_compute_copy_image()
Dsi_state.c2791 if (vi_dcc_enabled(tex, surf->base.u.tex.level)) in si_set_framebuffer_state()
2912 if (vi_dcc_enabled(tex, surf->base.u.tex.level)) { in si_set_framebuffer_state()
3106 if (vi_dcc_enabled(tex, cb->base.u.tex.level)) { in si_emit_framebuffer_state()
3894 if (vi_dcc_enabled(tex, first_level)) { in gfx10_make_texture_descriptor()
4155 if (vi_dcc_enabled(tex, first_level)) { in si_make_texture_descriptor()
Dsi_pipe.h1609 static inline bool vi_dcc_enabled(struct si_texture *tex, unsigned level) in vi_dcc_enabled() function
Dsi_texture.c1976 return vi_dcc_enabled(stex, level) && in vi_dcc_formats_are_incompatible()
/third_party/mesa3d/docs/relnotes/
D20.2.0.rst3235 - radeonsi: use vi_dcc_enabled instead of using tex->surface.dcc_offset directly