/third_party/ltp/tools/sparse/sparse-src/validation/optim/ |
D | cmp-zext-uimm2.c | 1 #define zext(X) ((unsigned long long) (X)) macro 3 int zext_ltu_q(unsigned x) { return (zext(x) < 0x100000001UL) == 1; } in zext_ltu_q() 4 int zext_ltu_p(unsigned x) { return (zext(x) < 0x100000000UL) == 1; } in zext_ltu_p() 5 int zext_ltu_0(unsigned x) { return (zext(x) < 0x0ffffffffUL) == (x < 0xffffffff); } in zext_ltu_0() 6 int zext_ltu_m(unsigned x) { return (zext(x) < 0x0fffffffeUL) == (x < 0xfffffffe); } in zext_ltu_m() 8 int zext_leu_q(unsigned x) { return (zext(x) <= 0x100000001UL) == 1; } in zext_leu_q() 9 int zext_leu_p(unsigned x) { return (zext(x) <= 0x100000000UL) == 1; } in zext_leu_p() 10 int zext_leu_0(unsigned x) { return (zext(x) <= 0x0ffffffffUL) == 1; } in zext_leu_0() 11 int zext_leu_m(unsigned x) { return (zext(x) <= 0x0fffffffeUL) == (x <= 0xfffffffe); } in zext_leu_m() 13 int zext_geu_q(unsigned x) { return (zext(x) >= 0x100000001UL) == 0; } in zext_geu_q() [all …]
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D | cmp-zext-uimm1.c | 1 #define zext(X) ((unsigned long long) (X)) macro 4 int zext_lt_p(unsigned int x) { return (zext(x) < (BITS + 1)) == 1; } in zext_lt_p() 5 int zext_le_p(unsigned int x) { return (zext(x) <= (BITS )) == 1; } in zext_le_p() 6 int zext_ge_p(unsigned int x) { return (zext(x) >= (BITS + 1)) == 0; } in zext_ge_p() 7 int zext_gt_p(unsigned int x) { return (zext(x) > (BITS )) == 0; } in zext_gt_p()
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D | cmp-zext-uimm0.c | 1 #define zext(X) ((unsigned long long) (X)) macro 4 #define TEST(X,OP,VAL) (zext(X) OP (VAL)) == (X OP (VAL))
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/crosstest/ |
D | test_vector_ops_ll.ll | 35 %res0 = zext <4 x i1> %res0_i1 to <4 x i32> 39 %res1 = zext <4 x i1> %res1_i1 to <4 x i32> 43 %res2 = zext <4 x i1> %res2_i1 to <4 x i32> 47 %res3 = zext <4 x i1> %res3_i1 to <4 x i32> 68 %res0 = zext <8 x i1> %res0_i1 to <8 x i16> 72 %res1 = zext <8 x i1> %res1_i1 to <8 x i16> 76 %res2 = zext <8 x i1> %res2_i1 to <8 x i16> 80 %res3 = zext <8 x i1> %res3_i1 to <8 x i16> 84 %res4 = zext <8 x i1> %res4_i1 to <8 x i16> 88 %res5 = zext <8 x i1> %res5_i1 to <8 x i16> [all …]
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D | test_cast_to_u1.ll | 5 %tobool.ret_ext = zext i1 %tobool to i32 13 %tobool.ret_ext = zext i1 %tobool to i32 21 %tobool.ret_ext = zext i1 %tobool to i32 29 %tobool.ret_ext = zext i1 %tobool to i32 38 %tobool.ret_ext = zext i1 %tobool to i32 47 %tobool.ret_ext = zext i1 %tobool to i32 56 %tobool.ret_ext = zext i1 %tobool to i32 65 %tobool.ret_ext = zext i1 %tobool to i32 72 %a.arg_trunc.ret_ext = zext i1 %a.arg_trunc to i32 81 %tobool.ret_ext = zext i1 %tobool.i1 to i32 [all …]
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D | test_fcmp.pnacl.ll | 7 %cmp.ret_ext = zext i1 %cmp to i32 16 %cmp.ret_ext = zext i1 %cmp to i32 25 %cmp.ret_ext = zext i1 %cmp to i32 36 %cmp.ret_ext = zext i1 %cmp to i32 47 %cmp.ret_ext = zext i1 %cmp to i32 57 %cmp.ret_ext = zext i1 %cmp to i32 67 %cmp.ret_ext = zext i1 %cmp to i32 77 %cmp.ret_ext = zext i1 %cmp to i32 87 %cmp.ret_ext = zext i1 %cmp to i32 97 %cmp.ret_ext = zext i1 %cmp to i32 [all …]
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D | test_arith_ll.ll | 14 %result = zext i8 %result.trunc to i32 22 %result = zext i16 %result.trunc to i32 78 %result = zext i8 %result.trunc to i32 86 %result = zext i16 %result.trunc to i32 142 %result = zext i8 %result.trunc to i32 150 %result = zext i16 %result.trunc to i32 270 %result = zext i8 %result.trunc to i32 278 %result = zext i16 %result.trunc to i32 398 %result = zext i8 %result.trunc to i32 406 %result = zext i16 %result.trunc to i32 [all …]
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/third_party/ltp/tools/sparse/sparse-src/ |
D | scheck.c | 83 static BoolectorNode *zext(Btor *btor, struct instruction *insn, BoolectorNode *s) in zext() function 126 case OP_SET_EQ: t = zext(btor, insn, boolector_eq(btor, a, b)); break; in binary() 127 case OP_SET_NE: t = zext(btor, insn, boolector_ne(btor, a, b)); break; in binary() 128 case OP_SET_LT: t = zext(btor, insn, boolector_slt(btor, a, b)); break; in binary() 129 case OP_SET_LE: t = zext(btor, insn, boolector_slte(btor, a, b)); break; in binary() 130 case OP_SET_GE: t = zext(btor, insn, boolector_sgte(btor, a, b)); break; in binary() 131 case OP_SET_GT: t = zext(btor, insn, boolector_sgt(btor, a, b)); break; in binary() 132 case OP_SET_B: t = zext(btor, insn, boolector_ult(btor, a, b)); break; in binary() 133 case OP_SET_BE: t = zext(btor, insn, boolector_ulte(btor, a, b)); break; in binary() 134 case OP_SET_AE: t = zext(btor, insn, boolector_ugte(btor, a, b)); break; in binary() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
D | KnownBits.h | 135 KnownBits zext(unsigned BitWidth, bool ExtendedBitsAreKnownZero) const { in zext() function 137 APInt NewZero = Zero.zext(BitWidth); in zext() 140 return KnownBits(NewZero, One.zext(BitWidth)); in zext() 156 return zext(BitWidth, ExtendedBitsAreKnownZero); in zextOrTrunc()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
D | README.txt | 13 …(-2 + (2 * (trunc i65 (((zext i64 (-2 + %n) to i65) * (zext i64 (-1 + %n) to i65)) /u 2) to i64)) …
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D | CmpInstAnalysis.cpp | 137 Mask = Mask.zext(X->getType()->getScalarSizeInBits()); in decomposeBitTestICmp()
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/runtime/ |
D | szrt_ll.ll | 32 %ret = zext i8 %0 to i32 39 %ret = zext i16 %0 to i32
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstrExtension.td | 75 [(set GR32:$dst, (zext GR8:$src))]>, TB, 83 [(set GR32:$dst, (zext GR16:$src))]>, TB, 204 def : Pat<(i64 (zext GR8:$src)), 209 def : Pat<(i64 (zext GR16:$src)), 218 // to these explicit zext instructions. 219 def : Pat<(i64 (zext GR32:$src)),
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrAtomics.td | 325 def : Pat<(stxr_1 (zext (and GPR32:$val, 0xff)), GPR64sp:$addr), 327 def : Pat<(stxr_2 (zext (and GPR32:$val, 0xffff)), GPR64sp:$addr), 329 def : Pat<(stxr_4 (zext GPR32:$val), GPR64sp:$addr), 379 def : Pat<(stlxr_1 (zext (and GPR32:$val, 0xff)), GPR64sp:$addr), 381 def : Pat<(stlxr_2 (zext (and GPR32:$val, 0xffff)), GPR64sp:$addr), 383 def : Pat<(stlxr_4 (zext GPR32:$val), GPR64sp:$addr),
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrAtomics.td | 176 // We directly match zext patterns and select the zext atomic loads. 177 // i32 (zext (i8 (atomic_load_8))) gets legalized to 185 // i64 (zext (i8 (atomic_load_8))) gets legalized to 195 (zext (i32 (atomic_load node:$addr)))>; 199 // results) and select a zext load; the next instruction will be sext_inreg 538 (zext (i32 (kind node:$addr, (i32 (trunc (i64 node:$val))))))>; 543 // 64-bit) and select a zext RMW; the next instruction will be sext_inreg which 732 (zext (i32 (assertzext (i32 (kind node:$addr, 738 (zext (i32 (kind node:$addr, 744 // zext RMW; the next instruction will be sext_inreg which is selected by
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
D | ConstantRange.cpp | 678 LowerExt = Lower.zext(DstTySize); in zeroExtend() 683 return ConstantRange(Lower.zext(DstTySize), Upper.zext(DstTySize)); in zeroExtend() 694 return ConstantRange(Lower.sext(DstTySize), Upper.zext(DstTySize)); in signExtend() 950 APInt this_min = getUnsignedMin().zext(getBitWidth() * 2); in multiply() 951 APInt this_max = getUnsignedMax().zext(getBitWidth() * 2); in multiply() 952 APInt Other_min = Other.getUnsignedMin().zext(getBitWidth() * 2); in multiply() 953 APInt Other_max = Other.getUnsignedMax().zext(getBitWidth() * 2); in multiply()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | TypePromotion.cpp | 366 ICmpConst->getValue().zext(32) : ICmpConst->getValue(); in isSafeWrap() 369 OverflowConst->getValue().abs().zext(32) : OverflowConst->getValue().abs(); in isSafeWrap() 374 if (Total.ugt(Max.zext(Total.getBitWidth()))) in isSafeWrap() 377 if (Total.zext(Max.getBitWidth()).ugt(Max)) in isSafeWrap()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
D | README.txt | 14 1. Verify, how stuff is handling implicit zext with 8 bit operands (this might
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonPatterns.td | 265 def Zext64: PatFrag<(ops node:$Rs), (i64 (zext node:$Rs))>; 268 def azext: PatFrags<(ops node:$Rs), [(zext node:$Rs), (anyext node:$Rs)]>; 756 def: Pat<(i32 (zext (i1 (seteq I32:$Rs, I32:$Rt)))), 758 def: Pat<(i32 (zext (i1 (setne I32:$Rs, I32:$Rt)))), 760 def: Pat<(i32 (zext (i1 (seteq I32:$Rs, anyimm:$s8)))), 762 def: Pat<(i32 (zext (i1 (setne I32:$Rs, anyimm:$s8)))), 1842 def: Pat<(i32 (zext (i1 (seteq (and (shl 1, I32:$Rt), I32:$Rs), 0)))), 1844 def: Pat<(i32 (zext (i1 (setne (and (shl 1, I32:$Rt), I32:$Rs), 0)))), 1846 def: Pat<(i32 (zext (i1 (seteq (and I32:$Rs, IsPow2_32:$u5), 0)))), 1848 def: Pat<(i32 (zext (i1 (setne (and I32:$Rs, IsPow2_32:$u5), 0)))), [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
D | IceInst.def | 59 X(Zext, "zext") \
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
D | APInt.h | 567 return I1 == I2.zext(I1.getBitWidth()); in isSameValue() 569 return I1.zext(I2.getBitWidth()) == I2; in isSameValue() 1172 APInt zext(unsigned width) const;
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/third_party/mesa3d/src/asahi/compiler/ |
D | agx_pack.c | 313 bool zext = I->src[s].abs; in agx_pack_alu() local 316 unsigned sxt = (extends && !zext) ? (1 << 10) : 0; in agx_pack_alu()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | LegalizationArtifactCombiner.h | 117 DstTy, Mask.zext(DstTy.getScalarSizeInBits())); in tryCombineZExt() 132 DstReg, CstVal.getCImm()->getValue().zext(DstTy.getSizeInBits())); in tryCombineZExt()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
D | NVPTXInstrInfo.td | 687 def : Pat<(shl (zext Int32Regs:$a), (i32 Int5Const:$b)), 694 def : Pat<(shl (zext Int16Regs:$a), (i16 Int4Const:$b)), 706 def : Pat<(mul (zext Int32Regs:$a), (zext Int32Regs:$b)), 709 def : Pat<(mul (zext Int32Regs:$a), (i64 UInt32Const:$b)), 720 def : Pat<(mul (zext Int16Regs:$a), (zext Int16Regs:$b)), 723 def : Pat<(mul (zext Int16Regs:$a), (i32 UInt16Const:$b)), 2731 // zext i1 2732 def : Pat<(i16 (zext Int1Regs:$a)), 2734 def : Pat<(i32 (zext Int1Regs:$a)), 2736 def : Pat<(i64 (zext Int1Regs:$a)), [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/ |
D | APInt.h | 680 return I1 == I2.zext(I1.getBitWidth()); in isSameValue() 682 return I1.zext(I2.getBitWidth()) == I2; in isSameValue() 1392 APInt zext(unsigned width) const;
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