Searched refs:AR_WA_D3_L1_DISABLE (Results 1 – 3 of 3) sorted by relevance
263 if (ah->config.pcie_waen & AR_WA_D3_L1_DISABLE) in ar9002_hw_configpcipowersave()264 val |= AR_WA_D3_L1_DISABLE; in ar9002_hw_configpcipowersave()267 if (AR9285_WA_DEFAULT & AR_WA_D3_L1_DISABLE) in ar9002_hw_configpcipowersave()268 val |= AR_WA_D3_L1_DISABLE; in ar9002_hw_configpcipowersave()270 if (AR9280_WA_DEFAULT & AR_WA_D3_L1_DISABLE) in ar9002_hw_configpcipowersave()271 val |= AR_WA_D3_L1_DISABLE; in ar9002_hw_configpcipowersave()293 val &= (~AR_WA_D3_L1_DISABLE); in ar9002_hw_configpcipowersave()297 val &= (~AR_WA_D3_L1_DISABLE); in ar9002_hw_configpcipowersave()304 val &= (~AR_WA_D3_L1_DISABLE); in ar9002_hw_configpcipowersave()
611 ah->WARegVal |= (AR_WA_D3_L1_DISABLE | in __ath9k_hw_init()2131 REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE); in ath9k_set_power_sleep()2175 REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE); in ath9k_set_power_network_sleep()
706 #define AR_WA_D3_L1_DISABLE (1 << 14) macro