/kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
D | powerdomains7xx_data.c | 37 .banks = 4, 78 .banks = 2, 92 .banks = 1, 105 .banks = 2, 119 .banks = 1, 132 .banks = 1, 144 .banks = 5, 170 .banks = 1, 186 .banks = 1, 201 .banks = 1, [all …]
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D | powerdomains44xx_data.c | 38 .banks = 5, 63 .banks = 1, 81 .banks = 2, 101 .banks = 1, 119 .banks = 3, 140 .banks = 1, 157 .banks = 1, 174 .banks = 1, 190 .banks = 1, 207 .banks = 3, [all …]
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D | powerdomains54xx_data.c | 36 .banks = 5, 62 .banks = 2, 91 .banks = 1, 109 .banks = 1, 126 .banks = 1, 142 .banks = 1, 159 .banks = 2, 188 .banks = 3, 209 .banks = 1, 227 .banks = 2, [all …]
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D | powerdomains3xxx_data.c | 37 .banks = 4, 59 .banks = 1, 75 .banks = 1, 100 .banks = 2, 122 .banks = 2, 139 .banks = 2, 156 .banks = 1, 171 .banks = 1, 192 .banks = 1, 207 .banks = 1, [all …]
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D | powerdomains2xxx_data.c | 31 .banks = 1, 46 .banks = 1, 61 .banks = 3, 87 .banks = 1,
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D | powerdomains43xx_data.c | 23 .banks = 1, 37 .banks = 3, 65 .banks = 1, 95 .banks = 4,
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D | powerdomain.c | 129 for (i = 0; i < pwrdm->banks; i++) in _pwrdm_register() 152 for (i = 0; i < pwrdm->banks; i++) { in _update_logic_membank_counters() 515 return pwrdm->banks; in pwrdm_get_mem_bank_count() 672 if (pwrdm->banks < (bank + 1)) in pwrdm_set_mem_onst() 710 if (pwrdm->banks < (bank + 1)) in pwrdm_set_mem_retst() 806 if (pwrdm->banks < (bank + 1)) in pwrdm_read_mem_pwrst() 836 if (pwrdm->banks < (bank + 1)) in pwrdm_read_prev_mem_pwrst() 865 if (pwrdm->banks < (bank + 1)) in pwrdm_read_mem_retst() 1171 for (i = 0; i < pwrdm->banks; i++) in pwrdm_get_context_loss_count() 1215 for (i = 0; i < pwrdm->banks; i++) in pwrdm_can_ever_lose_context() [all …]
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D | powerdomains33xx_data.c | 33 .banks = 1, 84 .banks = 3, 127 .banks = 3,
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/kernel/linux/linux-5.10/arch/x86/kernel/cpu/mce/ |
D | intel.c | 76 static int cmci_supported(int *banks) in cmci_supported() argument 95 *banks = min_t(unsigned, MAX_NR_BANKS, cap & 0xff); in cmci_supported() 267 static void cmci_discover(int banks) in cmci_discover() argument 275 for (i = 0; i < banks; i++) { in cmci_discover() 345 int banks; in cmci_recheck() local 347 if (!mce_available(raw_cpu_ptr(&cpu_info)) || !cmci_supported(&banks)) in cmci_recheck() 376 int banks; in cmci_clear() local 378 if (!cmci_supported(&banks)) in cmci_clear() 381 for (i = 0; i < banks; i++) in cmci_clear() 388 int banks; in cmci_rediscover_work_func() local [all …]
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/kernel/linux/linux-5.10/drivers/pinctrl/qcom/ |
D | pinctrl-ssbi-gpio.c | 323 u8 banks = 0; in pm8xxx_pin_config_set() local 333 banks |= BIT(2); in pm8xxx_pin_config_set() 335 banks |= BIT(3); in pm8xxx_pin_config_set() 339 banks |= BIT(2); in pm8xxx_pin_config_set() 341 banks |= BIT(3); in pm8xxx_pin_config_set() 352 banks |= BIT(2); in pm8xxx_pin_config_set() 354 banks |= BIT(3); in pm8xxx_pin_config_set() 358 banks |= BIT(3); in pm8xxx_pin_config_set() 362 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set() 367 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set() [all …]
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/kernel/linux/linux-5.10/drivers/clk/tegra/ |
D | clk.c | 208 static int tegra_clk_periph_ctx_init(int banks) in tegra_clk_periph_ctx_init() argument 210 periph_state_ctx = kcalloc(2 * banks, sizeof(*periph_state_ctx), in tegra_clk_periph_ctx_init() 218 struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) in tegra_clk_init() argument 222 if (WARN_ON(banks > ARRAY_SIZE(periph_regs))) in tegra_clk_init() 225 periph_clk_enb_refcnt = kcalloc(32 * banks, in tegra_clk_init() 231 periph_banks = banks; in tegra_clk_init() 242 if (tegra_clk_periph_ctx_init(banks)) { in tegra_clk_init()
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/kernel/linux/linux-5.10/drivers/memory/ |
D | fsl_ifc.c | 54 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { in fsl_ifc_find() 206 int version, banks; in fsl_ifc_ctrl_probe() local 236 banks = (version == FSL_IFC_VERSION_1_0_0) ? 4 : 8; in fsl_ifc_ctrl_probe() 238 version >> 24, (version >> 16) & 0xf, banks); in fsl_ifc_ctrl_probe() 241 fsl_ifc_ctrl_dev->banks = banks; in fsl_ifc_ctrl_probe()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
D | gpio-atlas7.txt | 7 - gpio-banks : How many gpio banks on this controller 28 gpio-banks = <2>;
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D | brcm,kona-gpio.txt | 8 support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The 18 number of GPIO banks on the SoC. The interrupts must be ordered by bank, 19 starting with bank 0. There is always a 1:1 mapping between banks and
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/kernel/linux/linux-5.10/drivers/crypto/qat/qat_common/ |
D | adf_isr.c | 132 struct adf_etr_bank_data *bank = &etr_data->banks[i]; in adf_request_irqs() 179 free_irq(msixe[i].vector, &etr_data->banks[i]); in adf_free_irqs() 243 tasklet_init(&priv_data->banks[i].resp_handler, in adf_setup_bh() 245 (unsigned long)&priv_data->banks[i]); in adf_setup_bh() 256 tasklet_disable(&priv_data->banks[i].resp_handler); in adf_cleanup_bh() 257 tasklet_kill(&priv_data->banks[i].resp_handler); in adf_cleanup_bh()
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D | adf_vf_isr.c | 187 struct adf_etr_bank_data *bank = &etr_data->banks[0]; in adf_isr() 225 tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler, in adf_setup_bh() 226 (unsigned long)priv_data->banks); in adf_setup_bh() 234 tasklet_disable(&priv_data->banks[0].resp_handler); in adf_cleanup_bh() 235 tasklet_kill(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
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D | adf_transport.c | 228 bank = &transport_data->banks[bank_num]; in adf_create_ring() 432 etr_data->banks = kzalloc_node(size, GFP_KERNEL, in adf_init_etr_data() 434 if (!etr_data->banks) { in adf_init_etr_data() 448 ret = adf_init_bank(accel_dev, &etr_data->banks[i], i, in adf_init_etr_data() 458 kfree(etr_data->banks); in adf_init_etr_data() 491 cleanup_bank(&etr_data->banks[i]); in adf_cleanup_etr_handles() 511 kfree(etr_data->banks); in adf_cleanup_etr_data()
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D | adf_hw_arbiter.c | 38 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; in adf_init_arb() 81 csr = accel_dev->transport->banks[0].csr_addr; in adf_exit_arb()
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/kernel/linux/linux-5.10/arch/mips/bcm63xx/ |
D | cpu.c | 258 unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; in detect_memory_size() local 274 banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; in detect_memory_size() 282 banks = 2; in detect_memory_size() 291 return 1 << (cols + rows + (is_32bits + 1) + banks); in detect_memory_size()
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/kernel/linux/linux-5.10/drivers/phy/mediatek/ |
D | Kconfig | 14 different banks layout, the T-PHY with shared banks between 16 so you can easily distinguish them by banks layout.
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/kernel/linux/linux-5.10/drivers/pinctrl/vt8500/ |
D | pinctrl-wmt.c | 89 u32 reg_en = data->banks[bank].reg_en; in wmt_set_pinmux() 90 u32 reg_dir = data->banks[bank].reg_dir; in wmt_set_pinmux() 426 u32 reg_pull_en = data->banks[bank].reg_pull_en; in wmt_pinconf_set() 427 u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg; in wmt_pinconf_set() 485 u32 reg_dir = data->banks[bank].reg_dir; in wmt_gpio_get_direction() 500 u32 reg_data_in = data->banks[bank].reg_data_in; in wmt_gpio_get_value() 516 u32 reg_data_out = data->banks[bank].reg_data_out; in wmt_gpio_set_value()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/ |
D | cavium-compact-flash.txt | 12 - reg: The base address of the CF chip select banks. Depending on 13 the device configuration, there may be one or two banks.
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/kernel/linux/linux-5.10/drivers/gpio/ |
D | gpio-pxa.c | 82 struct pxa_gpio_bank *banks; member 151 for (i = 0, b = pc->banks; i <= pxa_last_gpio; i += 32, b++) 163 struct pxa_gpio_bank *bank = p->banks + (gpio / 32); in gpio_bank_base() 171 return chip_to_pxachip(c)->banks + gpio / 32; in gpio_to_pxabank() 352 pchip->banks = devm_kcalloc(pchip->dev, nbanks, sizeof(*pchip->banks), in pxa_init_gpio_chip() 354 if (!pchip->banks) in pxa_init_gpio_chip() 374 bank = pchip->banks + i; in pxa_init_gpio_chip()
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/kernel/linux/linux-5.10/arch/mips/sgi-ip27/ |
D | ip27-memory.c | 239 klmembnk_t *banks; in slot_psize_compute() local 248 banks = (klmembnk_t *) find_first_component(brd, KLSTRUCT_MEMBNK); in slot_psize_compute() 249 if (!banks) in slot_psize_compute() 253 size = (unsigned long)banks->membnk_bnksz[slot/4]; in slot_psize_compute()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
D | cavium-mix.txt | 9 - reg: The base addresses of four separate register banks. The first 16 register banks corresponds to this MIX device.
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