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Searched refs:hwsp_offset (Results 1 – 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
Dintel_timeline.c248 timeline->hwsp_offset = cacheline * CACHELINE_BYTES; in intel_timeline_init()
252 timeline->hwsp_offset = offset; in intel_timeline_init()
259 memset(vaddr + timeline->hwsp_offset, 0, CACHELINE_BYTES); in intel_timeline_init()
262 GEM_BUG_ON(timeline->hwsp_offset >= hwsp->size); in intel_timeline_init()
347 tl->hwsp_offset = in intel_timeline_pin()
349 offset_in_page(tl->hwsp_offset); in intel_timeline_pin()
351 tl->fence_context, tl->hwsp_offset); in intel_timeline_pin()
353 cacheline_acquire(tl->hwsp_cacheline, tl->hwsp_offset); in intel_timeline_pin()
520 tl->hwsp_offset = cacheline * CACHELINE_BYTES; in __intel_timeline_get_seqno()
522 memset(vaddr + tl->hwsp_offset, 0, CACHELINE_BYTES); in __intel_timeline_get_seqno()
[all …]
Dselftest_timeline.c36 return (address + tl->hwsp_offset) / CACHELINE_BYTES; in hwsp_cacheline()
470 err = emit_ggtt_store_dw(rq, tl->hwsp_offset, value); in tl_write()
566 n, tl->fence_context, tl->hwsp_offset, *tl->hwsp_seqno); in live_hwsp_engine()
638 n, tl->fence_context, tl->hwsp_offset, *tl->hwsp_seqno); in live_hwsp_alternate()
698 seqno[0], tl->hwsp_offset); in live_hwsp_wrap()
700 err = emit_ggtt_store_dw(rq, tl->hwsp_offset, seqno[0]); in live_hwsp_wrap()
715 seqno[1], tl->hwsp_offset); in live_hwsp_wrap()
717 err = emit_ggtt_store_dw(rq, tl->hwsp_offset, seqno[1]); in live_hwsp_wrap()
973 tl->hwsp_offset, *tl->hwsp_seqno); in live_hwsp_recycle()
Dgen6_engine_cs.c164 *cs++ = i915_request_active_timeline(rq)->hwsp_offset | in gen6_emit_breadcrumb_rcs()
362 *cs++ = i915_request_active_timeline(rq)->hwsp_offset; in gen7_emit_breadcrumb_rcs()
377 …GEM_BUG_ON(offset_in_page(i915_request_active_timeline(rq)->hwsp_offset) != I915_GEM_HWS_SEQNO_ADD… in gen6_emit_breadcrumb_xcs()
397 …GEM_BUG_ON(offset_in_page(i915_request_active_timeline(rq)->hwsp_offset) != I915_GEM_HWS_SEQNO_ADD… in gen7_emit_breadcrumb_xcs()
Dintel_timeline_types.h50 u32 hwsp_offset; member
Dintel_timeline.h104 u32 *hwsp_offset);
Dselftest_rc6.c140 *cs++ = ce->timeline->hwsp_offset + 8; in __live_rc6_ctx()
Dgen2_engine_cs.c146 …GEM_BUG_ON(offset_in_page(i915_request_active_timeline(rq)->hwsp_offset) != I915_GEM_HWS_SEQNO_ADD… in __gen2_emit_breadcrumb()
Dselftest_engine_cs.c56 *cs++ = i915_request_timeline(rq)->hwsp_offset + slot * sizeof(u32); in write_timestamp()
Dintel_lrc.c3556 static u32 hwsp_offset(const struct i915_request *rq) in hwsp_offset() function
3566 return rcu_dereference_protected(rq->timeline, 1)->hwsp_offset; in hwsp_offset()
3591 *cs++ = hwsp_offset(rq); in gen8_emit_init_breadcrumb()
4913 return gen8_emit_ggtt_write(cs, rq->fence.seqno, hwsp_offset(rq), 0); in emit_xcs_breadcrumb()
4932 hwsp_offset(request), in gen8_emit_fini_breadcrumb_rcs()
4944 hwsp_offset(request), in gen11_emit_fini_breadcrumb_rcs()
5016 hwsp_offset(request), in gen12_emit_fini_breadcrumb_rcs()
Dintel_engine_cs.c1371 tl ? tl->hwsp_offset : 0, in print_ring()
1674 tl->hwsp_offset); in intel_engine_dump()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/selftests/
Di915_request.c1617 static u32 hwsp_offset(const struct intel_context *ce, u32 *dw) in hwsp_offset() function
1626 const u32 offset = hwsp_offset(ce, sema); in measure_semaphore_response()
1701 const u32 offset = hwsp_offset(ce, sema); in measure_idle_dispatch()
1772 const u32 offset = hwsp_offset(ce, sema); in measure_busy_dispatch()
1875 const u32 offset = hwsp_offset(ce, sema); in measure_inter_request()
1968 const u32 offset = hwsp_offset(ce, sema); in measure_context_switch()
2062 const u32 offset = hwsp_offset(ce, sema); in measure_preemption()
2182 const u32 offset = hwsp_offset(ce, sema); in measure_completion()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Di915_request.c1029 u32 hwsp_offset; in __emit_semaphore_wait() local
1037 err = intel_timeline_read_hwsp(from, to, &hwsp_offset); in __emit_semaphore_wait()
1063 *cs++ = hwsp_offset; in __emit_semaphore_wait()