105 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_desc_find_function_by_name()  local
107 		if (!strcmp(pin->pin.name, pin_name)) {  in sunxi_pinctrl_desc_find_function_by_name()
108 			struct sunxi_desc_function *func = pin->functions;  in sunxi_pinctrl_desc_find_function_by_name()
132 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_desc_find_function_by_pin()  local
134 		if (pin->pin.number == pin_num) {  in sunxi_pinctrl_desc_find_function_by_pin()
135 			struct sunxi_desc_function *func = pin->functions;  in sunxi_pinctrl_desc_find_function_by_pin()
171 	*pins = (unsigned *)&pctl->groups[group].pin;  in sunxi_pctrl_get_group_pins()
499 					 unsigned pin,  in sunxi_pinctrl_set_io_bias_cfg()  argument
502 	unsigned short bank = pin / PINS_PER_BANK;  in sunxi_pinctrl_set_io_bias_cfg()
535 		pin -= pctl->desc->pin_base;  in sunxi_pinctrl_set_io_bias_cfg()
537 		reg = readl(pctl->membase + sunxi_grp_config_reg(pin));  in sunxi_pinctrl_set_io_bias_cfg()
539 		writel(reg | val, pctl->membase + sunxi_grp_config_reg(pin));  in sunxi_pinctrl_set_io_bias_cfg()
568 static int sunxi_pconf_reg(unsigned pin, enum pin_config_param param,  in sunxi_pconf_reg()  argument
572 	unsigned short bank = pin / PINS_PER_BANK;  in sunxi_pconf_reg()
576 		*offset = sunxi_dlevel_reg(pin, hw_type);  in sunxi_pconf_reg()
577 		*shift = sunxi_dlevel_offset(pin, hw_type);  in sunxi_pconf_reg()
584 		*offset = sunxi_pull_reg(pin, hw_type);  in sunxi_pconf_reg()
585 		*shift = sunxi_pull_offset(pin);  in sunxi_pconf_reg()
601 		*offset = sunxi_data_reg(pin, hw_type);  in sunxi_pconf_reg()
602 		*shift = sunxi_data_offset(pin);  in sunxi_pconf_reg()
607 		*offset = sunxi_mux_reg(pin, hw_type);  in sunxi_pconf_reg()
608 		*shift = sunxi_mux_offset(pin);  in sunxi_pconf_reg()
620 static int sunxi_pconf_get(struct pinctrl_dev *pctldev, unsigned pin,  in sunxi_pconf_get()  argument
629 	pin -= pctl->desc->pin_base;  in sunxi_pconf_get()
631 	ret = sunxi_pconf_reg(pin, param, &offset, &shift, &mask, pctl->desc->hw_type);  in sunxi_pconf_get()
689 	return sunxi_pconf_get(pctldev, g->pin, config);  in sunxi_pconf_group_get()
692 static int sunxi_pconf_set(struct pinctrl_dev *pctldev, unsigned pin,  in sunxi_pconf_set()  argument
696 	unsigned short bank = pin / PINS_PER_BANK;  in sunxi_pconf_set()
712 		ret = sunxi_pconf_reg(pin, param, &offset, &shift, &mask, pctl->desc->hw_type);  in sunxi_pconf_set()
750 			sunxi_pinctrl_set_io_bias_cfg(pctl, pin,  in sunxi_pconf_set()
788 	return sunxi_pconf_set(pctldev, g->pin, configs, num_configs);  in sunxi_pconf_group_set()
829 				 unsigned pin,  in sunxi_pmx_set()  argument
838 	pin -= pctl->desc->pin_base;  in sunxi_pmx_set()
839 	val = readl(pctl->membase + sunxi_mux_reg(pin, pctl->desc->hw_type));  in sunxi_pmx_set()
840 	mask = MUX_PINS_MASK << sunxi_mux_offset(pin);  in sunxi_pmx_set()
841 	writel((val & ~mask) | config << sunxi_mux_offset(pin),  in sunxi_pmx_set()
842 		pctl->membase + sunxi_mux_reg(pin, pctl->desc->hw_type));  in sunxi_pmx_set()
862 	sunxi_pmx_set(pctldev, g->pin, desc->muxval);  in sunxi_pmx_set_mux()
1046 	u32 pin = offset + chip->base;  in sunxi_pinctrl_gpio_get()  local
1050 		sunxi_pmx_set(pctl->pctl_dev, pin, SUN4I_FUNC_INPUT);  in sunxi_pinctrl_gpio_get()
1055 		sunxi_pmx_set(pctl->pctl_dev, pin, sunxi_pinctrl_hw_info[pctl->desc->hw_type].irq_mux_val);  in sunxi_pinctrl_gpio_get()
1094 	int pin, base;  in sunxi_pinctrl_gpio_of_xlate()  local
1097 	pin = base + gpiospec->args[1];  in sunxi_pinctrl_gpio_of_xlate()
1099 	if (pin > gc->ngpio)  in sunxi_pinctrl_gpio_of_xlate()
1105 	return pin;  in sunxi_pinctrl_gpio_of_xlate()
1313 	int pin, base;  in sunxi_pinctrl_irq_of_xlate()  local
1319 	pin = pctl->desc->pin_base + base + intspec[1];  in sunxi_pinctrl_irq_of_xlate()
1321 	desc = sunxi_pinctrl_desc_find_function_by_pin(pctl, pin, "irq");  in sunxi_pinctrl_irq_of_xlate()
1412 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_build_state()  local
1415 		if (pin->variant && !(pctl->variant & pin->variant))  in sunxi_pinctrl_build_state()
1418 		group->name = pin->pin.name;  in sunxi_pinctrl_build_state()
1419 		group->pin = pin->pin.number;  in sunxi_pinctrl_build_state()
1438 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_build_state()  local
1441 		if (pin->variant && !(pctl->variant & pin->variant))  in sunxi_pinctrl_build_state()
1444 		for (func = pin->functions; func->name; func++) {  in sunxi_pinctrl_build_state()
1451 				pctl->irq_array[irqnum] = pin->pin.number;  in sunxi_pinctrl_build_state()
1470 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_pinctrl_build_state()  local
1473 		if (pin->variant && !(pctl->variant & pin->variant))  in sunxi_pinctrl_build_state()
1476 		for (func = pin->functions; func->name; func++) {  in sunxi_pinctrl_build_state()
1506 			*func_grp = pin->pin.name;  in sunxi_pinctrl_build_state()
1644 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_bsp_pinctrl_init_with_variant()  local
1646 		if (pin->variant && !(pctl->variant & pin->variant))  in sunxi_bsp_pinctrl_init_with_variant()
1649 		pins[pin_idx++] = pin->pin;  in sunxi_bsp_pinctrl_init_with_variant()
1685 	last_pin = pctl->desc->pins[pctl->desc->npins - 1].pin.number;  in sunxi_bsp_pinctrl_init_with_variant()
1709 		const struct sunxi_desc_pin *pin = pctl->desc->pins + i;  in sunxi_bsp_pinctrl_init_with_variant()  local
1712 					     pin->pin.number - pctl->desc->pin_base,  in sunxi_bsp_pinctrl_init_with_variant()
1713 					     pin->pin.number, 1);  in sunxi_bsp_pinctrl_init_with_variant()