Lines Matching refs:base
98 void __iomem *base; member
105 static void rk1808_efuse_timing_init(void __iomem *base) in rk1808_efuse_timing_init() argument
108 writel(readl(base + RK1808_MOD) & (~RK1808_USER_MODE), base + RK1808_MOD); in rk1808_efuse_timing_init()
111 writel((T_CSB_P_S << 16) | T_CSB_P_L, base + T_CSB_P); in rk1808_efuse_timing_init()
112 writel((T_PGENB_P_S << 16) | T_PGENB_P_L, base + T_PGENB_P); in rk1808_efuse_timing_init()
113 writel((T_LOAD_P_S << 16) | T_LOAD_P_L, base + T_LOAD_P); in rk1808_efuse_timing_init()
114 writel((T_ADDR_P_S << 16) | T_ADDR_P_L, base + T_ADDR_P); in rk1808_efuse_timing_init()
115 writel((T_STROBE_P_S << 16) | T_STROBE_P_L, base + T_STROBE_P); in rk1808_efuse_timing_init()
116 writel((T_CSB_R_S << 16) | T_CSB_R_L, base + T_CSB_R); in rk1808_efuse_timing_init()
117 writel((T_PGENB_R_S << 16) | T_PGENB_R_L, base + T_PGENB_R); in rk1808_efuse_timing_init()
118 writel((T_LOAD_R_S << 16) | T_LOAD_R_L, base + T_LOAD_R); in rk1808_efuse_timing_init()
119 writel((T_ADDR_R_S << 16) | T_ADDR_R_L, base + T_ADDR_R); in rk1808_efuse_timing_init()
120 writel((T_STROBE_R_S << 16) | T_STROBE_R_L, base + T_STROBE_R); in rk1808_efuse_timing_init()
123 static void rk1808_efuse_timing_deinit(void __iomem *base) in rk1808_efuse_timing_deinit() argument
126 writel(readl(base + RK1808_MOD) | RK1808_USER_MODE, base + RK1808_MOD); in rk1808_efuse_timing_deinit()
129 writel(0, base + T_CSB_P); in rk1808_efuse_timing_deinit()
130 writel(0, base + T_PGENB_P); in rk1808_efuse_timing_deinit()
131 writel(0, base + T_LOAD_P); in rk1808_efuse_timing_deinit()
132 writel(0, base + T_ADDR_P); in rk1808_efuse_timing_deinit()
133 writel(0, base + T_STROBE_P); in rk1808_efuse_timing_deinit()
134 writel(0, base + T_CSB_R); in rk1808_efuse_timing_deinit()
135 writel(0, base + T_PGENB_R); in rk1808_efuse_timing_deinit()
136 writel(0, base + T_LOAD_R); in rk1808_efuse_timing_deinit()
137 writel(0, base + T_ADDR_R); in rk1808_efuse_timing_deinit()
138 writel(0, base + T_STROBE_R); in rk1808_efuse_timing_deinit()
168 rk1808_efuse_timing_init(efuse->base); in rockchip_rk1808_efuse_read()
172 efuse->base + RK1808_AUTO_CTRL); in rockchip_rk1808_efuse_read()
174 status = readl(efuse->base + RK1808_INT_STATUS); in rockchip_rk1808_efuse_read()
179 out_value = readl(efuse->base + RK1808_DOUT); in rockchip_rk1808_efuse_read()
180 writel(RK1808_INT_FINISH, efuse->base + RK1808_INT_STATUS); in rockchip_rk1808_efuse_read()
187 rk1808_efuse_timing_deinit(efuse->base); in rockchip_rk1808_efuse_read()
190 rk1808_efuse_timing_deinit(efuse->base); in rockchip_rk1808_efuse_read()
210 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3128_efuse_read()
213 writel(readl(efuse->base + REG_EFUSE_CTRL) & (~(RK3288_A_MASK << RK3128_A_SHIFT)), in rockchip_rk3128_efuse_read()
214 efuse->base + REG_EFUSE_CTRL); in rockchip_rk3128_efuse_read()
215 writel(readl(efuse->base + REG_EFUSE_CTRL) | ((offset++ & RK3288_A_MASK) << RK3128_A_SHIFT), in rockchip_rk3128_efuse_read()
216 efuse->base + REG_EFUSE_CTRL); in rockchip_rk3128_efuse_read()
218 writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3288_STROBE, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3128_efuse_read()
220 *buf++ = readb(efuse->base + REG_EFUSE_DOUT); in rockchip_rk3128_efuse_read()
221 … writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL); in rockchip_rk3128_efuse_read()
226 writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3128_efuse_read()
245 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
248 writel(readl(efuse->base + REG_EFUSE_CTRL) & (~(RK3288_A_MASK << RK3288_A_SHIFT)), in rockchip_rk3288_efuse_read()
249 efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
250 writel(readl(efuse->base + REG_EFUSE_CTRL) | ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT), in rockchip_rk3288_efuse_read()
251 efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
253 writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3288_STROBE, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
255 *buf++ = readb(efuse->base + REG_EFUSE_DOUT); in rockchip_rk3288_efuse_read()
256 … writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
261 writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
335 efuse->base + RK3328_AUTO_CTRL); in rockchip_rk3328_efuse_read()
337 status = readl(efuse->base + RK3328_INT_STATUS); in rockchip_rk3328_efuse_read()
342 out_value = readl(efuse->base + RK3328_DOUT); in rockchip_rk3328_efuse_read()
343 writel(RK3328_INT_FINISH, efuse->base + RK3328_INT_STATUS); in rockchip_rk3328_efuse_read()
421 …writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3399_efuse_read()
424 …writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE | ((addr_start++ & RK3399_A_MASK) << RK… in rockchip_rk3399_efuse_read()
425 efuse->base + REG_EFUSE_CTRL); in rockchip_rk3399_efuse_read()
427 out_value = readl(efuse->base + REG_EFUSE_DOUT); in rockchip_rk3399_efuse_read()
428 … writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE), efuse->base + REG_EFUSE_CTRL); in rockchip_rk3399_efuse_read()
436 writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3399_efuse_read()
526 efuse->base = devm_ioremap_resource(dev, res); in rockchip_efuse_probe()
527 if (IS_ERR(efuse->base)) { in rockchip_efuse_probe()
528 return PTR_ERR(efuse->base); in rockchip_efuse_probe()