Lines Matching defs:n
39 #define ADC_RESULT_VAL(n) ((n)&ADC_RESULT_MASK) argument
43 #define CONFIG_ADC_CHL_SEL(n) ((n)<<8) argument
46 #define CONFIG_PD_ADC_VAL(n) ((n)<<2) /* 1:pd adc, 0: normal work */ argument
49 #define CONFIG_RSTN_ADC_VAL(n) ((n)<<1) /* 1:normal work, 0:adc reset */ argument
52 #define CONFIG_EN_LDO_ADC_VAL(n) ((n)<<0) /* 1:ldo work, 0: ldo shutdown */ argument
56 #define CLK_CHOP_SEL_PGA_VAL(n) ((n)<<4) argument
59 #define GAIN_CTRL_PGA_VAL(n) ((n)<<7) argument
62 #define PGA_BYPASS_VAL(n) ((n)<<3) /* 1:bypass pga, 0:use pga */ argument
67 #define PGA_CHOP_ENP_VAL(n) ((n)<<1) /* 1: enable chop, 0: disable chop */ argument
70 #define PGA_EN_VAL(n) ((n)<<0) /* 1: enable pga, 0: disable pga */ argument
74 #define TEMP_GAIN_VAL(n) ((n)<<4) argument
79 #define TEMP_EN_VAL(n) ((n)<<0) /* 1: enable temperature, 0: disable temperature */ argument
83 #define ANALOG_SWITCH_TIME_VAL(n) (((n)&0x3FF)<<20) argument
86 #define ANALOG_INIT_TIME_VAL(n) (((n)&0x3FF)<<8) argument
91 #define CMP_IRQ_EN_VAL(n) ((n)<<5) /* 1: enable cmp irq, 0: disable cmp irq */ argument
94 #define CMP_EN_VAL(n) ((n)<<4) /* 1: enable cmp function, 0: disable cmp function */ argument
97 #define ADC_IRQ_EN_VAL(n) ((n)<<1) /* 1:enable adc transfer irq, 0: disable */ argument
100 #define ADC_DMA_EN_VAL(n) ((n)<<0) /* 1:enable adc dma, 0: disable */ argument
108 #define CONFIG_ADC_INPUT_CMP_VAL(n) ((n)&0x3FFFF) argument