Lines Matching refs:tegra
179 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_handle_quirks() local
182 if (tegra->sata_aux_regs && !tegra->soc->supports_devslp) { in tegra_ahci_handle_quirks()
183 val = readl(tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0); in tegra_ahci_handle_quirks()
185 writel(val, tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0); in tegra_ahci_handle_quirks()
191 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra124_ahci_init() local
203 writel(BIT(0), tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX); in tegra124_ahci_init()
205 val = readl(tegra->sata_regs + in tegra124_ahci_init()
211 writel(val, tegra->sata_regs + SCFG_OFFSET + in tegra124_ahci_init()
214 val = readl(tegra->sata_regs + in tegra124_ahci_init()
220 writel(val, tegra->sata_regs + SCFG_OFFSET + in tegra124_ahci_init()
224 tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL11); in tegra124_ahci_init()
226 tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL2); in tegra124_ahci_init()
228 writel(0, tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX); in tegra124_ahci_init()
235 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_power_on() local
238 ret = regulator_bulk_enable(tegra->soc->num_supplies, in tegra_ahci_power_on()
239 tegra->supplies); in tegra_ahci_power_on()
244 tegra->sata_clk, in tegra_ahci_power_on()
245 tegra->sata_rst); in tegra_ahci_power_on()
249 reset_control_assert(tegra->sata_oob_rst); in tegra_ahci_power_on()
250 reset_control_assert(tegra->sata_cold_rst); in tegra_ahci_power_on()
256 reset_control_deassert(tegra->sata_cold_rst); in tegra_ahci_power_on()
257 reset_control_deassert(tegra->sata_oob_rst); in tegra_ahci_power_on()
262 clk_disable_unprepare(tegra->sata_clk); in tegra_ahci_power_on()
267 regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); in tegra_ahci_power_on()
274 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_power_off() local
278 reset_control_assert(tegra->sata_rst); in tegra_ahci_power_off()
279 reset_control_assert(tegra->sata_oob_rst); in tegra_ahci_power_off()
280 reset_control_assert(tegra->sata_cold_rst); in tegra_ahci_power_off()
282 clk_disable_unprepare(tegra->sata_clk); in tegra_ahci_power_off()
285 regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); in tegra_ahci_power_off()
290 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_controller_init() local
296 dev_err(&tegra->pdev->dev, in tegra_ahci_controller_init()
305 val = readl(tegra->sata_regs + SATA_FPCI_BAR5); in tegra_ahci_controller_init()
308 writel(val, tegra->sata_regs + SATA_FPCI_BAR5); in tegra_ahci_controller_init()
311 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
313 writel(val, tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
317 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL17_0); in tegra_ahci_controller_init()
319 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL18_0); in tegra_ahci_controller_init()
321 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL20_0); in tegra_ahci_controller_init()
323 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL21_0); in tegra_ahci_controller_init()
327 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0); in tegra_ahci_controller_init()
330 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0); in tegra_ahci_controller_init()
332 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB); in tegra_ahci_controller_init()
339 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB); in tegra_ahci_controller_init()
344 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2); in tegra_ahci_controller_init()
347 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2); in tegra_ahci_controller_init()
349 if (tegra->soc->ops && tegra->soc->ops->init) in tegra_ahci_controller_init()
350 tegra->soc->ops->init(hpriv); in tegra_ahci_controller_init()
356 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1); in tegra_ahci_controller_init()
359 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1); in tegra_ahci_controller_init()
361 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_9); in tegra_ahci_controller_init()
364 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
366 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
368 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC); in tegra_ahci_controller_init()
373 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC); in tegra_ahci_controller_init()
375 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
377 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA); in tegra_ahci_controller_init()
380 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR); in tegra_ahci_controller_init()
385 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR); in tegra_ahci_controller_init()
391 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35); in tegra_ahci_controller_init()
394 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35); in tegra_ahci_controller_init()
397 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_IDP1); in tegra_ahci_controller_init()
399 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1); in tegra_ahci_controller_init()
402 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1); in tegra_ahci_controller_init()
405 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
407 writel(val, tegra->sata_regs + SATA_CONFIGURATION_0); in tegra_ahci_controller_init()
413 val = readl(tegra->sata_regs + SATA_INTR_MASK); in tegra_ahci_controller_init()
415 writel(val, tegra->sata_regs + SATA_INTR_MASK); in tegra_ahci_controller_init()
483 struct tegra_ahci_priv *tegra; in tegra_ahci_probe() local
491 tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL); in tegra_ahci_probe()
492 if (!tegra) in tegra_ahci_probe()
495 hpriv->plat_data = tegra; in tegra_ahci_probe()
497 tegra->pdev = pdev; in tegra_ahci_probe()
498 tegra->soc = of_device_get_match_data(&pdev->dev); in tegra_ahci_probe()
501 tegra->sata_regs = devm_ioremap_resource(&pdev->dev, res); in tegra_ahci_probe()
502 if (IS_ERR(tegra->sata_regs)) in tegra_ahci_probe()
503 return PTR_ERR(tegra->sata_regs); in tegra_ahci_probe()
510 tegra->sata_aux_regs = devm_ioremap_resource(&pdev->dev, res); in tegra_ahci_probe()
511 if (IS_ERR(tegra->sata_aux_regs)) in tegra_ahci_probe()
512 return PTR_ERR(tegra->sata_aux_regs); in tegra_ahci_probe()
515 tegra->sata_rst = devm_reset_control_get(&pdev->dev, "sata"); in tegra_ahci_probe()
516 if (IS_ERR(tegra->sata_rst)) { in tegra_ahci_probe()
518 return PTR_ERR(tegra->sata_rst); in tegra_ahci_probe()
521 tegra->sata_oob_rst = devm_reset_control_get(&pdev->dev, "sata-oob"); in tegra_ahci_probe()
522 if (IS_ERR(tegra->sata_oob_rst)) { in tegra_ahci_probe()
524 return PTR_ERR(tegra->sata_oob_rst); in tegra_ahci_probe()
527 tegra->sata_cold_rst = devm_reset_control_get(&pdev->dev, "sata-cold"); in tegra_ahci_probe()
528 if (IS_ERR(tegra->sata_cold_rst)) { in tegra_ahci_probe()
530 return PTR_ERR(tegra->sata_cold_rst); in tegra_ahci_probe()
533 tegra->sata_clk = devm_clk_get(&pdev->dev, "sata"); in tegra_ahci_probe()
534 if (IS_ERR(tegra->sata_clk)) { in tegra_ahci_probe()
536 return PTR_ERR(tegra->sata_clk); in tegra_ahci_probe()
539 tegra->supplies = devm_kcalloc(&pdev->dev, in tegra_ahci_probe()
540 tegra->soc->num_supplies, in tegra_ahci_probe()
541 sizeof(*tegra->supplies), GFP_KERNEL); in tegra_ahci_probe()
542 if (!tegra->supplies) in tegra_ahci_probe()
545 regulator_bulk_set_supply_names(tegra->supplies, in tegra_ahci_probe()
546 tegra->soc->supply_names, in tegra_ahci_probe()
547 tegra->soc->num_supplies); in tegra_ahci_probe()
550 tegra->soc->num_supplies, in tegra_ahci_probe()
551 tegra->supplies); in tegra_ahci_probe()