259 	u8 lane = port_data[sata_port].lane_mapping;  in highbank_cphy_disable_overrides()  local
263 	tmp = combo_phy_read(sata_port, CPHY_RX_INPUT_STS + lane * SPHY_LANE);  in highbank_cphy_disable_overrides()
265 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in highbank_cphy_disable_overrides()
270 	u8 lane = port_data[sata_port].lane_mapping;  in cphy_override_tx_attenuation()  local
276 	tmp = combo_phy_read(sata_port, CPHY_TX_INPUT_STS + lane * SPHY_LANE);  in cphy_override_tx_attenuation()
278 	combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_tx_attenuation()
281 	combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_tx_attenuation()
284 	combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_tx_attenuation()
289 	u8 lane = port_data[sata_port].lane_mapping;  in cphy_override_rx_mode()  local
291 	tmp = combo_phy_read(sata_port, CPHY_RX_INPUT_STS + lane * SPHY_LANE);  in cphy_override_rx_mode()
293 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_rx_mode()
296 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_rx_mode()
300 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_rx_mode()
303 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_rx_mode()
306 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_rx_mode()
313 	u8 lane = port_data[sata_port].lane_mapping;  in highbank_cphy_override_lane()  local
320 						lane * SPHY_LANE);  in highbank_cphy_override_lane()