37 #define ZX_PLL(_name, _parent, _reg, _table, _pd, _lock)		\  argument
39 	.reg_base	= (void __iomem *) _reg,			\
52 #define ZX296718_PLL(_name, _parent, _reg, _table)			\  argument
53 ZX_PLL(_name, _parent, _reg, _table, 0xff, 30)
60 #define GATE(_id, _name, _parent, _reg, _bit, _flag, _gflags)		\  argument
63 		.reg = (void __iomem *) _reg,				\
98 #define MUX_F(_id, _name, _parent, _reg, _shift, _width, _flag, _mflag)	\  argument
101 		.reg		= (void __iomem *) _reg,		\
114 #define MUX(_id, _name, _parent, _reg, _shift, _width)			\  argument
115 MUX_F(_id, _name, _parent, _reg, _shift, _width, 0, 0)
122 #define DIV_T(_id, _name, _parent, _reg, _shift, _width, _flag, _table)	\  argument
125 		.reg		= (void __iomem *) _reg,		\
147 #define AUDIO_DIV(_id, _name, _parent, _reg)				\  argument
149 	.reg_base	= (void __iomem *) _reg,			\