819 	int addr_count = 0;  in ppc440spe_dma2_pq_slot_count()  local
831 					addr_count++;  in ppc440spe_dma2_pq_slot_count()
837 					addr_count++;  in ppc440spe_dma2_pq_slot_count()
847 				addr_count++;  in ppc440spe_dma2_pq_slot_count()
851 					addr_count++;  in ppc440spe_dma2_pq_slot_count()
855 					addr_count++;  in ppc440spe_dma2_pq_slot_count()
859 					addr_count++;  in ppc440spe_dma2_pq_slot_count()
863 				addr_count++;  in ppc440spe_dma2_pq_slot_count()
869 			addr_count++;  in ppc440spe_dma2_pq_slot_count()
877 			__func__, src_cnt, state, addr_count, order);  in ppc440spe_dma2_pq_slot_count()
883 	return (addr_count + XOR_MAX_OPS - 1) / XOR_MAX_OPS;  in ppc440spe_dma2_pq_slot_count()
3227 	cursor->addr_count++;  in ppc440spe_adma_dma2rxor_inc_addr()
3229 		ppc440spe_desc_set_xor_src_cnt(desc, cursor->addr_count);  in ppc440spe_adma_dma2rxor_inc_addr()
3230 	} else if (cursor->addr_count == XOR_MAX_OPS) {  in ppc440spe_adma_dma2rxor_inc_addr()
3231 		ppc440spe_desc_set_xor_src_cnt(desc, cursor->addr_count);  in ppc440spe_adma_dma2rxor_inc_addr()
3232 		cursor->addr_count = 0;  in ppc440spe_adma_dma2rxor_inc_addr()
3264 					cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3273 			set_bit(cursor->addr_count, &desc->reverse_flags[0]);  in ppc440spe_adma_dma2rxor_prep_src()
3276 					cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3288 		sign = test_bit(cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3297 				cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3305 				cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3315 				cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3325 				cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()
3336 				cursor->addr_count,  in ppc440spe_adma_dma2rxor_prep_src()