Lines Matching refs:gpio
94 struct dwapb_gpio *gpio; member
101 (container_of(_gc, struct dwapb_gpio_port, gc)->gpio)
131 static inline u32 gpio_reg_convert(struct dwapb_gpio *gpio, unsigned int offset) in gpio_reg_convert() argument
133 if (gpio->flags & GPIO_REG_OFFSET_V2) in gpio_reg_convert()
139 static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset) in dwapb_read() argument
141 struct gpio_chip *gc = &gpio->ports[0].gc; in dwapb_read()
142 void __iomem *reg_base = gpio->regs; in dwapb_read()
144 return gc->read_reg(reg_base + gpio_reg_convert(gpio, offset)); in dwapb_read()
147 static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset, in dwapb_write() argument
150 struct gpio_chip *gc = &gpio->ports[0].gc; in dwapb_write()
151 void __iomem *reg_base = gpio->regs; in dwapb_write()
153 gc->write_reg(reg_base + gpio_reg_convert(gpio, offset), val); in dwapb_write()
156 static struct dwapb_gpio_port *dwapb_offs_to_port(struct dwapb_gpio *gpio, unsigned int offs) in dwapb_offs_to_port() argument
161 for (i = 0; i < gpio->nr_ports; i++) { in dwapb_offs_to_port()
162 port = &gpio->ports[i]; in dwapb_offs_to_port()
170 static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs) in dwapb_toggle_trigger() argument
172 struct dwapb_gpio_port *port = dwapb_offs_to_port(gpio, offs); in dwapb_toggle_trigger()
181 pol = dwapb_read(gpio, GPIO_INT_POLARITY); in dwapb_toggle_trigger()
189 dwapb_write(gpio, GPIO_INT_POLARITY, pol); in dwapb_toggle_trigger()
192 static u32 dwapb_do_irq(struct dwapb_gpio *gpio) in dwapb_do_irq() argument
194 struct gpio_chip *gc = &gpio->ports[0].gc; in dwapb_do_irq()
198 irq_status = dwapb_read(gpio, GPIO_INTSTATUS); in dwapb_do_irq()
206 dwapb_toggle_trigger(gpio, hwirq); in dwapb_do_irq()
214 struct dwapb_gpio *gpio = irq_desc_get_handler_data(desc); in dwapb_irq_handler() local
218 dwapb_do_irq(gpio); in dwapb_irq_handler()
230 struct dwapb_gpio *gpio = to_dwapb_gpio(gc); in dwapb_irq_ack() local
235 dwapb_write(gpio, GPIO_PORTA_EOI, val); in dwapb_irq_ack()
242 struct dwapb_gpio *gpio = to_dwapb_gpio(gc); in dwapb_irq_mask() local
247 val = dwapb_read(gpio, GPIO_INTMASK) | BIT(irqd_to_hwirq(d)); in dwapb_irq_mask()
248 dwapb_write(gpio, GPIO_INTMASK, val); in dwapb_irq_mask()
255 struct dwapb_gpio *gpio = to_dwapb_gpio(gc); in dwapb_irq_unmask() local
260 val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(irqd_to_hwirq(d)); in dwapb_irq_unmask()
261 dwapb_write(gpio, GPIO_INTMASK, val); in dwapb_irq_unmask()
268 struct dwapb_gpio *gpio = to_dwapb_gpio(gc); in dwapb_irq_enable() local
273 val = dwapb_read(gpio, GPIO_INTEN); in dwapb_irq_enable()
275 dwapb_write(gpio, GPIO_INTEN, val); in dwapb_irq_enable()
282 struct dwapb_gpio *gpio = to_dwapb_gpio(gc); in dwapb_irq_disable() local
287 val = dwapb_read(gpio, GPIO_INTEN); in dwapb_irq_disable()
289 dwapb_write(gpio, GPIO_INTEN, val); in dwapb_irq_disable()
296 struct dwapb_gpio *gpio = to_dwapb_gpio(gc); in dwapb_irq_set_type() local
304 level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); in dwapb_irq_set_type()
305 polarity = dwapb_read(gpio, GPIO_INT_POLARITY); in dwapb_irq_set_type()
310 dwapb_toggle_trigger(gpio, bit); in dwapb_irq_set_type()
335 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level); in dwapb_irq_set_type()
337 dwapb_write(gpio, GPIO_INT_POLARITY, polarity); in dwapb_irq_set_type()
347 struct dwapb_gpio *gpio = to_dwapb_gpio(gc); in dwapb_irq_set_wake() local
348 struct dwapb_context *ctx = gpio->ports[0].ctx; in dwapb_irq_set_wake()
364 struct dwapb_gpio *gpio = port->gpio; in dwapb_gpio_set_debounce() local
370 val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); in dwapb_gpio_set_debounce()
375 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb); in dwapb_gpio_set_debounce()
410 static void dwapb_configure_irqs(struct dwapb_gpio *gpio, in dwapb_configure_irqs() argument
419 pirq = devm_kzalloc(gpio->dev, sizeof(*pirq), GFP_KERNEL); in dwapb_configure_irqs()
424 dev_warn(gpio->dev, "no IRQ for port%d\n", pp->idx); in dwapb_configure_irqs()
447 girq->parent_handler_data = gpio; in dwapb_configure_irqs()
459 err = devm_request_irq(gpio->dev, pp->irq[0], in dwapb_configure_irqs()
461 IRQF_SHARED, DWAPB_DRIVER_NAME, gpio); in dwapb_configure_irqs()
463 dev_err(gpio->dev, "error requesting IRQ\n"); in dwapb_configure_irqs()
473 devm_kfree(gpio->dev, pirq); in dwapb_configure_irqs()
476 static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, in dwapb_gpio_add_port() argument
484 port = &gpio->ports[offs]; in dwapb_gpio_add_port()
485 port->gpio = gpio; in dwapb_gpio_add_port()
489 port->ctx = devm_kzalloc(gpio->dev, sizeof(*port->ctx), GFP_KERNEL); in dwapb_gpio_add_port()
494 dat = gpio->regs + GPIO_EXT_PORTA + pp->idx * GPIO_EXT_PORT_STRIDE; in dwapb_gpio_add_port()
495 set = gpio->regs + GPIO_SWPORTA_DR + pp->idx * GPIO_SWPORT_DR_STRIDE; in dwapb_gpio_add_port()
496 dirout = gpio->regs + GPIO_SWPORTA_DDR + pp->idx * GPIO_SWPORT_DDR_STRIDE; in dwapb_gpio_add_port()
499 err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout, in dwapb_gpio_add_port()
502 dev_err(gpio->dev, "failed to init gpio chip for port%d\n", in dwapb_gpio_add_port()
519 dwapb_configure_irqs(gpio, port, pp); in dwapb_gpio_add_port()
521 err = devm_gpiochip_add_data(gpio->dev, &port->gc, port); in dwapb_gpio_add_port()
523 dev_err(gpio->dev, "failed to register gpiochip for port%d\n", in dwapb_gpio_add_port()
609 struct dwapb_gpio *gpio = data; in dwapb_assert_reset() local
611 reset_control_assert(gpio->rst); in dwapb_assert_reset()
614 static int dwapb_get_reset(struct dwapb_gpio *gpio) in dwapb_get_reset() argument
618 gpio->rst = devm_reset_control_get_optional_shared(gpio->dev, NULL); in dwapb_get_reset()
619 if (IS_ERR(gpio->rst)) { in dwapb_get_reset()
620 dev_err(gpio->dev, "Cannot get reset descriptor\n"); in dwapb_get_reset()
621 return PTR_ERR(gpio->rst); in dwapb_get_reset()
624 err = reset_control_deassert(gpio->rst); in dwapb_get_reset()
626 dev_err(gpio->dev, "Cannot deassert reset lane\n"); in dwapb_get_reset()
630 return devm_add_action_or_reset(gpio->dev, dwapb_assert_reset, gpio); in dwapb_get_reset()
635 struct dwapb_gpio *gpio = data; in dwapb_disable_clks() local
637 clk_bulk_disable_unprepare(DWAPB_NR_CLOCKS, gpio->clks); in dwapb_disable_clks()
640 static int dwapb_get_clks(struct dwapb_gpio *gpio) in dwapb_get_clks() argument
645 gpio->clks[0].id = "bus"; in dwapb_get_clks()
646 gpio->clks[1].id = "db"; in dwapb_get_clks()
647 err = devm_clk_bulk_get_optional(gpio->dev, DWAPB_NR_CLOCKS, in dwapb_get_clks()
648 gpio->clks); in dwapb_get_clks()
650 return dev_err_probe(gpio->dev, err, in dwapb_get_clks()
653 err = clk_bulk_prepare_enable(DWAPB_NR_CLOCKS, gpio->clks); in dwapb_get_clks()
655 dev_err(gpio->dev, "Cannot enable APB/Debounce clocks\n"); in dwapb_get_clks()
659 return devm_add_action_or_reset(gpio->dev, dwapb_disable_clks, gpio); in dwapb_get_clks()
680 struct dwapb_gpio *gpio; in dwapb_gpio_probe() local
694 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); in dwapb_gpio_probe()
695 if (!gpio) in dwapb_gpio_probe()
698 gpio->dev = &pdev->dev; in dwapb_gpio_probe()
699 gpio->nr_ports = pdata->nports; in dwapb_gpio_probe()
701 err = dwapb_get_reset(gpio); in dwapb_gpio_probe()
705 gpio->ports = devm_kcalloc(&pdev->dev, gpio->nr_ports, in dwapb_gpio_probe()
706 sizeof(*gpio->ports), GFP_KERNEL); in dwapb_gpio_probe()
707 if (!gpio->ports) in dwapb_gpio_probe()
710 gpio->regs = devm_platform_ioremap_resource(pdev, 0); in dwapb_gpio_probe()
711 if (IS_ERR(gpio->regs)) in dwapb_gpio_probe()
712 return PTR_ERR(gpio->regs); in dwapb_gpio_probe()
714 err = dwapb_get_clks(gpio); in dwapb_gpio_probe()
718 gpio->flags = (uintptr_t)device_get_match_data(dev); in dwapb_gpio_probe()
720 for (i = 0; i < gpio->nr_ports; i++) { in dwapb_gpio_probe()
721 err = dwapb_gpio_add_port(gpio, &pdata->properties[i], i); in dwapb_gpio_probe()
726 platform_set_drvdata(pdev, gpio); in dwapb_gpio_probe()
734 struct dwapb_gpio *gpio = dev_get_drvdata(dev); in dwapb_gpio_suspend() local
735 struct gpio_chip *gc = &gpio->ports[0].gc; in dwapb_gpio_suspend()
740 for (i = 0; i < gpio->nr_ports; i++) { in dwapb_gpio_suspend()
742 unsigned int idx = gpio->ports[i].idx; in dwapb_gpio_suspend()
743 struct dwapb_context *ctx = gpio->ports[i].ctx; in dwapb_gpio_suspend()
746 ctx->dir = dwapb_read(gpio, offset); in dwapb_gpio_suspend()
749 ctx->data = dwapb_read(gpio, offset); in dwapb_gpio_suspend()
752 ctx->ext = dwapb_read(gpio, offset); in dwapb_gpio_suspend()
756 ctx->int_mask = dwapb_read(gpio, GPIO_INTMASK); in dwapb_gpio_suspend()
757 ctx->int_en = dwapb_read(gpio, GPIO_INTEN); in dwapb_gpio_suspend()
758 ctx->int_pol = dwapb_read(gpio, GPIO_INT_POLARITY); in dwapb_gpio_suspend()
759 ctx->int_type = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); in dwapb_gpio_suspend()
760 ctx->int_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); in dwapb_gpio_suspend()
763 dwapb_write(gpio, GPIO_INTMASK, ~ctx->wake_en); in dwapb_gpio_suspend()
768 clk_bulk_disable_unprepare(DWAPB_NR_CLOCKS, gpio->clks); in dwapb_gpio_suspend()
775 struct dwapb_gpio *gpio = dev_get_drvdata(dev); in dwapb_gpio_resume() local
776 struct gpio_chip *gc = &gpio->ports[0].gc; in dwapb_gpio_resume()
780 err = clk_bulk_prepare_enable(DWAPB_NR_CLOCKS, gpio->clks); in dwapb_gpio_resume()
782 dev_err(gpio->dev, "Cannot reenable APB/Debounce clocks\n"); in dwapb_gpio_resume()
787 for (i = 0; i < gpio->nr_ports; i++) { in dwapb_gpio_resume()
789 unsigned int idx = gpio->ports[i].idx; in dwapb_gpio_resume()
790 struct dwapb_context *ctx = gpio->ports[i].ctx; in dwapb_gpio_resume()
793 dwapb_write(gpio, offset, ctx->data); in dwapb_gpio_resume()
796 dwapb_write(gpio, offset, ctx->dir); in dwapb_gpio_resume()
799 dwapb_write(gpio, offset, ctx->ext); in dwapb_gpio_resume()
803 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, ctx->int_type); in dwapb_gpio_resume()
804 dwapb_write(gpio, GPIO_INT_POLARITY, ctx->int_pol); in dwapb_gpio_resume()
805 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, ctx->int_deb); in dwapb_gpio_resume()
806 dwapb_write(gpio, GPIO_INTEN, ctx->int_en); in dwapb_gpio_resume()
807 dwapb_write(gpio, GPIO_INTMASK, ctx->int_mask); in dwapb_gpio_resume()
810 dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); in dwapb_gpio_resume()