Lines Matching refs:bo
46 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
53 static void radeon_update_memory_usage(struct radeon_bo *bo, in radeon_update_memory_usage() argument
56 struct radeon_device *rdev = bo->rdev; in radeon_update_memory_usage()
57 u64 size = (u64)bo->tbo.num_pages << PAGE_SHIFT; in radeon_update_memory_usage()
77 struct radeon_bo *bo; in radeon_ttm_bo_destroy() local
79 bo = container_of(tbo, struct radeon_bo, tbo); in radeon_ttm_bo_destroy()
81 radeon_update_memory_usage(bo, bo->tbo.mem.mem_type, -1); in radeon_ttm_bo_destroy()
83 mutex_lock(&bo->rdev->gem.mutex); in radeon_ttm_bo_destroy()
84 list_del_init(&bo->list); in radeon_ttm_bo_destroy()
85 mutex_unlock(&bo->rdev->gem.mutex); in radeon_ttm_bo_destroy()
86 radeon_bo_clear_surface_reg(bo); in radeon_ttm_bo_destroy()
87 WARN_ON_ONCE(!list_empty(&bo->va)); in radeon_ttm_bo_destroy()
88 if (bo->tbo.base.import_attach) in radeon_ttm_bo_destroy()
89 drm_prime_gem_destroy(&bo->tbo.base, bo->tbo.sg); in radeon_ttm_bo_destroy()
90 drm_gem_object_release(&bo->tbo.base); in radeon_ttm_bo_destroy()
91 kfree(bo); in radeon_ttm_bo_destroy()
94 bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo) in radeon_ttm_bo_is_radeon_bo() argument
96 if (bo->destroy == &radeon_ttm_bo_destroy) in radeon_ttm_bo_is_radeon_bo()
189 struct radeon_bo *bo; in radeon_bo_create() local
209 bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL); in radeon_bo_create()
210 if (bo == NULL) in radeon_bo_create()
212 drm_gem_private_object_init(rdev->ddev, &bo->tbo.base, size); in radeon_bo_create()
213 bo->rdev = rdev; in radeon_bo_create()
214 bo->surface_reg = -1; in radeon_bo_create()
215 INIT_LIST_HEAD(&bo->list); in radeon_bo_create()
216 INIT_LIST_HEAD(&bo->va); in radeon_bo_create()
217 bo->initial_domain = domain & (RADEON_GEM_DOMAIN_VRAM | in radeon_bo_create()
221 bo->flags = flags; in radeon_bo_create()
224 bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); in radeon_bo_create()
230 bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); in radeon_bo_create()
236 bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); in radeon_bo_create()
247 if (bo->flags & RADEON_GEM_GTT_WC) in radeon_bo_create()
250 bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); in radeon_bo_create()
256 bo->flags &= ~RADEON_GEM_GTT_WC; in radeon_bo_create()
259 radeon_ttm_placement_from_domain(bo, domain); in radeon_bo_create()
262 r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type, in radeon_bo_create()
263 &bo->placement, page_align, !kernel, acc_size, in radeon_bo_create()
269 *bo_ptr = bo; in radeon_bo_create()
271 trace_radeon_bo_create(bo); in radeon_bo_create()
276 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr) in radeon_bo_kmap() argument
281 if (bo->kptr) { in radeon_bo_kmap()
283 *ptr = bo->kptr; in radeon_bo_kmap()
287 r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap); in radeon_bo_kmap()
291 bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem); in radeon_bo_kmap()
293 *ptr = bo->kptr; in radeon_bo_kmap()
295 radeon_bo_check_tiling(bo, 0, 0); in radeon_bo_kmap()
299 void radeon_bo_kunmap(struct radeon_bo *bo) in radeon_bo_kunmap() argument
301 if (bo->kptr == NULL) in radeon_bo_kunmap()
303 bo->kptr = NULL; in radeon_bo_kunmap()
304 radeon_bo_check_tiling(bo, 0, 0); in radeon_bo_kunmap()
305 ttm_bo_kunmap(&bo->kmap); in radeon_bo_kunmap()
308 struct radeon_bo *radeon_bo_ref(struct radeon_bo *bo) in radeon_bo_ref() argument
310 if (bo == NULL) in radeon_bo_ref()
313 ttm_bo_get(&bo->tbo); in radeon_bo_ref()
314 return bo; in radeon_bo_ref()
317 void radeon_bo_unref(struct radeon_bo **bo) in radeon_bo_unref() argument
321 if ((*bo) == NULL) in radeon_bo_unref()
323 tbo = &((*bo)->tbo); in radeon_bo_unref()
325 *bo = NULL; in radeon_bo_unref()
328 int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, in radeon_bo_pin_restricted() argument
334 if (radeon_ttm_tt_has_userptr(bo->rdev, bo->tbo.ttm)) in radeon_bo_pin_restricted()
337 if (bo->pin_count) { in radeon_bo_pin_restricted()
338 bo->pin_count++; in radeon_bo_pin_restricted()
340 *gpu_addr = radeon_bo_gpu_offset(bo); in radeon_bo_pin_restricted()
346 domain_start = bo->rdev->mc.vram_start; in radeon_bo_pin_restricted()
348 domain_start = bo->rdev->mc.gtt_start; in radeon_bo_pin_restricted()
350 (radeon_bo_gpu_offset(bo) - domain_start)); in radeon_bo_pin_restricted()
355 if (bo->prime_shared_count && domain == RADEON_GEM_DOMAIN_VRAM) { in radeon_bo_pin_restricted()
360 radeon_ttm_placement_from_domain(bo, domain); in radeon_bo_pin_restricted()
361 for (i = 0; i < bo->placement.num_placement; i++) { in radeon_bo_pin_restricted()
363 if ((bo->placements[i].mem_type == TTM_PL_VRAM) && in radeon_bo_pin_restricted()
364 !(bo->flags & RADEON_GEM_NO_CPU_ACCESS) && in radeon_bo_pin_restricted()
365 (!max_offset || max_offset > bo->rdev->mc.visible_vram_size)) in radeon_bo_pin_restricted()
366 bo->placements[i].lpfn = in radeon_bo_pin_restricted()
367 bo->rdev->mc.visible_vram_size >> PAGE_SHIFT; in radeon_bo_pin_restricted()
369 bo->placements[i].lpfn = max_offset >> PAGE_SHIFT; in radeon_bo_pin_restricted()
371 bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT; in radeon_bo_pin_restricted()
374 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); in radeon_bo_pin_restricted()
376 bo->pin_count = 1; in radeon_bo_pin_restricted()
378 *gpu_addr = radeon_bo_gpu_offset(bo); in radeon_bo_pin_restricted()
380 bo->rdev->vram_pin_size += radeon_bo_size(bo); in radeon_bo_pin_restricted()
382 bo->rdev->gart_pin_size += radeon_bo_size(bo); in radeon_bo_pin_restricted()
384 dev_err(bo->rdev->dev, "%p pin failed\n", bo); in radeon_bo_pin_restricted()
389 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr) in radeon_bo_pin() argument
391 return radeon_bo_pin_restricted(bo, domain, 0, gpu_addr); in radeon_bo_pin()
394 int radeon_bo_unpin(struct radeon_bo *bo) in radeon_bo_unpin() argument
399 if (!bo->pin_count) { in radeon_bo_unpin()
400 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo); in radeon_bo_unpin()
403 bo->pin_count--; in radeon_bo_unpin()
404 if (bo->pin_count) in radeon_bo_unpin()
406 for (i = 0; i < bo->placement.num_placement; i++) { in radeon_bo_unpin()
407 bo->placements[i].lpfn = 0; in radeon_bo_unpin()
408 bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT; in radeon_bo_unpin()
410 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); in radeon_bo_unpin()
412 if (bo->tbo.mem.mem_type == TTM_PL_VRAM) in radeon_bo_unpin()
413 bo->rdev->vram_pin_size -= radeon_bo_size(bo); in radeon_bo_unpin()
415 bo->rdev->gart_pin_size -= radeon_bo_size(bo); in radeon_bo_unpin()
417 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo); in radeon_bo_unpin()
437 struct radeon_bo *bo, *n; in radeon_bo_force_delete() local
443 list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) { in radeon_bo_force_delete()
445 &bo->tbo.base, bo, (unsigned long)bo->tbo.base.size, in radeon_bo_force_delete()
446 *((unsigned long *)&bo->tbo.base.refcount)); in radeon_bo_force_delete()
447 mutex_lock(&bo->rdev->gem.mutex); in radeon_bo_force_delete()
448 list_del_init(&bo->list); in radeon_bo_force_delete()
449 mutex_unlock(&bo->rdev->gem.mutex); in radeon_bo_force_delete()
451 drm_gem_object_put(&bo->tbo.base); in radeon_bo_force_delete()
551 struct radeon_bo *bo = lobj->robj; in radeon_bo_list_validate() local
552 if (!bo->pin_count) { in radeon_bo_list_validate()
556 radeon_mem_type_to_domain(bo->tbo.mem.mem_type); in radeon_bo_list_validate()
574 radeon_ttm_placement_from_domain(bo, domain); in radeon_bo_list_validate()
576 radeon_uvd_force_into_uvd_segment(bo, allowed); in radeon_bo_list_validate()
579 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); in radeon_bo_list_validate()
593 lobj->gpu_offset = radeon_bo_gpu_offset(bo); in radeon_bo_list_validate()
594 lobj->tiling_flags = bo->tiling_flags; in radeon_bo_list_validate()
605 int radeon_bo_get_surface_reg(struct radeon_bo *bo) in radeon_bo_get_surface_reg() argument
607 struct radeon_device *rdev = bo->rdev; in radeon_bo_get_surface_reg()
613 dma_resv_assert_held(bo->tbo.base.resv); in radeon_bo_get_surface_reg()
615 if (!bo->tiling_flags) in radeon_bo_get_surface_reg()
618 if (bo->surface_reg >= 0) { in radeon_bo_get_surface_reg()
619 reg = &rdev->surface_regs[bo->surface_reg]; in radeon_bo_get_surface_reg()
620 i = bo->surface_reg; in radeon_bo_get_surface_reg()
628 if (!reg->bo) in radeon_bo_get_surface_reg()
631 old_object = reg->bo; in radeon_bo_get_surface_reg()
642 old_object = reg->bo; in radeon_bo_get_surface_reg()
650 bo->surface_reg = i; in radeon_bo_get_surface_reg()
651 reg->bo = bo; in radeon_bo_get_surface_reg()
654 radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch, in radeon_bo_get_surface_reg()
655 bo->tbo.mem.start << PAGE_SHIFT, in radeon_bo_get_surface_reg()
656 bo->tbo.num_pages << PAGE_SHIFT); in radeon_bo_get_surface_reg()
660 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo) in radeon_bo_clear_surface_reg() argument
662 struct radeon_device *rdev = bo->rdev; in radeon_bo_clear_surface_reg()
665 if (bo->surface_reg == -1) in radeon_bo_clear_surface_reg()
668 reg = &rdev->surface_regs[bo->surface_reg]; in radeon_bo_clear_surface_reg()
669 radeon_clear_surface_reg(rdev, bo->surface_reg); in radeon_bo_clear_surface_reg()
671 reg->bo = NULL; in radeon_bo_clear_surface_reg()
672 bo->surface_reg = -1; in radeon_bo_clear_surface_reg()
675 int radeon_bo_set_tiling_flags(struct radeon_bo *bo, in radeon_bo_set_tiling_flags() argument
678 struct radeon_device *rdev = bo->rdev; in radeon_bo_set_tiling_flags()
726 r = radeon_bo_reserve(bo, false); in radeon_bo_set_tiling_flags()
729 bo->tiling_flags = tiling_flags; in radeon_bo_set_tiling_flags()
730 bo->pitch = pitch; in radeon_bo_set_tiling_flags()
731 radeon_bo_unreserve(bo); in radeon_bo_set_tiling_flags()
735 void radeon_bo_get_tiling_flags(struct radeon_bo *bo, in radeon_bo_get_tiling_flags() argument
739 dma_resv_assert_held(bo->tbo.base.resv); in radeon_bo_get_tiling_flags()
742 *tiling_flags = bo->tiling_flags; in radeon_bo_get_tiling_flags()
744 *pitch = bo->pitch; in radeon_bo_get_tiling_flags()
747 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved, in radeon_bo_check_tiling() argument
751 dma_resv_assert_held(bo->tbo.base.resv); in radeon_bo_check_tiling()
753 if (!(bo->tiling_flags & RADEON_TILING_SURFACE)) in radeon_bo_check_tiling()
757 radeon_bo_clear_surface_reg(bo); in radeon_bo_check_tiling()
761 if (bo->tbo.mem.mem_type != TTM_PL_VRAM) { in radeon_bo_check_tiling()
765 if (bo->surface_reg >= 0) in radeon_bo_check_tiling()
766 radeon_bo_clear_surface_reg(bo); in radeon_bo_check_tiling()
770 if ((bo->surface_reg >= 0) && !has_moved) in radeon_bo_check_tiling()
773 return radeon_bo_get_surface_reg(bo); in radeon_bo_check_tiling()
776 void radeon_bo_move_notify(struct ttm_buffer_object *bo, in radeon_bo_move_notify() argument
782 if (!radeon_ttm_bo_is_radeon_bo(bo)) in radeon_bo_move_notify()
785 rbo = container_of(bo, struct radeon_bo, tbo); in radeon_bo_move_notify()
793 radeon_update_memory_usage(rbo, bo->mem.mem_type, -1); in radeon_bo_move_notify()
797 int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) in radeon_bo_fault_reserve_notify() argument
805 if (!radeon_ttm_bo_is_radeon_bo(bo)) in radeon_bo_fault_reserve_notify()
807 rbo = container_of(bo, struct radeon_bo, tbo); in radeon_bo_fault_reserve_notify()
810 if (bo->mem.mem_type != TTM_PL_VRAM) in radeon_bo_fault_reserve_notify()
813 size = bo->mem.num_pages << PAGE_SHIFT; in radeon_bo_fault_reserve_notify()
814 offset = bo->mem.start << PAGE_SHIFT; in radeon_bo_fault_reserve_notify()
831 r = ttm_bo_validate(bo, &rbo->placement, &ctx); in radeon_bo_fault_reserve_notify()
834 return ttm_bo_validate(bo, &rbo->placement, &ctx); in radeon_bo_fault_reserve_notify()
839 offset = bo->mem.start << PAGE_SHIFT; in radeon_bo_fault_reserve_notify()
847 int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, bool no_wait) in radeon_bo_wait() argument
851 r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL); in radeon_bo_wait()
855 *mem_type = bo->tbo.mem.mem_type; in radeon_bo_wait()
857 r = ttm_bo_wait(&bo->tbo, true, no_wait); in radeon_bo_wait()
858 ttm_bo_unreserve(&bo->tbo); in radeon_bo_wait()
870 void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence, in radeon_bo_fence() argument
873 struct dma_resv *resv = bo->tbo.base.resv; in radeon_bo_fence()