Lines Matching refs:pcr
60 static inline void rtsx_pci_disable_aspm(struct rtsx_pcr *pcr) in rtsx_pci_disable_aspm() argument
62 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rtsx_pci_disable_aspm()
66 static int rtsx_comm_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency) in rtsx_comm_set_ltr_latency() argument
68 rtsx_pci_write_register(pcr, MSGTXDATA0, in rtsx_comm_set_ltr_latency()
70 rtsx_pci_write_register(pcr, MSGTXDATA1, in rtsx_comm_set_ltr_latency()
72 rtsx_pci_write_register(pcr, MSGTXDATA2, in rtsx_comm_set_ltr_latency()
74 rtsx_pci_write_register(pcr, MSGTXDATA3, in rtsx_comm_set_ltr_latency()
76 rtsx_pci_write_register(pcr, LTR_CTL, LTR_TX_EN_MASK | in rtsx_comm_set_ltr_latency()
82 int rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency) in rtsx_set_ltr_latency() argument
84 return rtsx_comm_set_ltr_latency(pcr, latency); in rtsx_set_ltr_latency()
87 static void rtsx_comm_set_aspm(struct rtsx_pcr *pcr, bool enable) in rtsx_comm_set_aspm() argument
89 if (pcr->aspm_enabled == enable) in rtsx_comm_set_aspm()
92 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rtsx_comm_set_aspm()
94 enable ? pcr->aspm_en : 0); in rtsx_comm_set_aspm()
96 pcr->aspm_enabled = enable; in rtsx_comm_set_aspm()
99 static void rtsx_disable_aspm(struct rtsx_pcr *pcr) in rtsx_disable_aspm() argument
101 if (pcr->ops->set_aspm) in rtsx_disable_aspm()
102 pcr->ops->set_aspm(pcr, false); in rtsx_disable_aspm()
104 rtsx_comm_set_aspm(pcr, false); in rtsx_disable_aspm()
107 int rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val) in rtsx_set_l1off_sub() argument
109 rtsx_pci_write_register(pcr, L1SUB_CONFIG3, 0xFF, val); in rtsx_set_l1off_sub()
114 static void rtsx_set_l1off_sub_cfg_d0(struct rtsx_pcr *pcr, int active) in rtsx_set_l1off_sub_cfg_d0() argument
116 if (pcr->ops->set_l1off_cfg_sub_d0) in rtsx_set_l1off_sub_cfg_d0()
117 pcr->ops->set_l1off_cfg_sub_d0(pcr, active); in rtsx_set_l1off_sub_cfg_d0()
120 static void rtsx_comm_pm_full_on(struct rtsx_pcr *pcr) in rtsx_comm_pm_full_on() argument
122 struct rtsx_cr_option *option = &pcr->option; in rtsx_comm_pm_full_on()
124 rtsx_disable_aspm(pcr); in rtsx_comm_pm_full_on()
130 rtsx_set_ltr_latency(pcr, option->ltr_active_latency); in rtsx_comm_pm_full_on()
132 if (rtsx_check_dev_flag(pcr, LTR_L1SS_PWR_GATE_EN)) in rtsx_comm_pm_full_on()
133 rtsx_set_l1off_sub_cfg_d0(pcr, 1); in rtsx_comm_pm_full_on()
136 static void rtsx_pm_full_on(struct rtsx_pcr *pcr) in rtsx_pm_full_on() argument
138 rtsx_comm_pm_full_on(pcr); in rtsx_pm_full_on()
141 void rtsx_pci_start_run(struct rtsx_pcr *pcr) in rtsx_pci_start_run() argument
144 if (pcr->remove_pci) in rtsx_pci_start_run()
147 if (pcr->state != PDEV_STAT_RUN) { in rtsx_pci_start_run()
148 pcr->state = PDEV_STAT_RUN; in rtsx_pci_start_run()
149 if (pcr->ops->enable_auto_blink) in rtsx_pci_start_run()
150 pcr->ops->enable_auto_blink(pcr); in rtsx_pci_start_run()
151 rtsx_pm_full_on(pcr); in rtsx_pci_start_run()
154 mod_delayed_work(system_wq, &pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_start_run()
158 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data) in rtsx_pci_write_register() argument
167 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_write_register()
170 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_write_register()
182 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data) in rtsx_pci_read_register() argument
188 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_read_register()
191 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_read_register()
206 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in __rtsx_pci_write_phy_register() argument
211 rtsx_pci_write_register(pcr, PHYDATA0, 0xFF, (u8)val); in __rtsx_pci_write_phy_register()
212 rtsx_pci_write_register(pcr, PHYDATA1, 0xFF, (u8)(val >> 8)); in __rtsx_pci_write_phy_register()
213 rtsx_pci_write_register(pcr, PHYADDR, 0xFF, addr); in __rtsx_pci_write_phy_register()
214 rtsx_pci_write_register(pcr, PHYRWCTL, 0xFF, 0x81); in __rtsx_pci_write_phy_register()
217 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_write_phy_register()
233 int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in rtsx_pci_write_phy_register() argument
235 if (pcr->ops->write_phy) in rtsx_pci_write_phy_register()
236 return pcr->ops->write_phy(pcr, addr, val); in rtsx_pci_write_phy_register()
238 return __rtsx_pci_write_phy_register(pcr, addr, val); in rtsx_pci_write_phy_register()
242 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in __rtsx_pci_read_phy_register() argument
248 rtsx_pci_write_register(pcr, PHYADDR, 0xFF, addr); in __rtsx_pci_read_phy_register()
249 rtsx_pci_write_register(pcr, PHYRWCTL, 0xFF, 0x80); in __rtsx_pci_read_phy_register()
252 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_read_phy_register()
265 rtsx_pci_read_register(pcr, PHYDATA0, &val1); in __rtsx_pci_read_phy_register()
266 rtsx_pci_read_register(pcr, PHYDATA1, &val2); in __rtsx_pci_read_phy_register()
275 int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in rtsx_pci_read_phy_register() argument
277 if (pcr->ops->read_phy) in rtsx_pci_read_phy_register()
278 return pcr->ops->read_phy(pcr, addr, val); in rtsx_pci_read_phy_register()
280 return __rtsx_pci_read_phy_register(pcr, addr, val); in rtsx_pci_read_phy_register()
284 void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr) in rtsx_pci_stop_cmd() argument
286 if (pcr->ops->stop_cmd) in rtsx_pci_stop_cmd()
287 return pcr->ops->stop_cmd(pcr); in rtsx_pci_stop_cmd()
289 rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD); in rtsx_pci_stop_cmd()
290 rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA); in rtsx_pci_stop_cmd()
292 rtsx_pci_write_register(pcr, DMACTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
293 rtsx_pci_write_register(pcr, RBCTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
297 void rtsx_pci_add_cmd(struct rtsx_pcr *pcr, in rtsx_pci_add_cmd() argument
302 u32 *ptr = (u32 *)(pcr->host_cmds_ptr); in rtsx_pci_add_cmd()
309 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_add_cmd()
310 ptr += pcr->ci; in rtsx_pci_add_cmd()
311 if (pcr->ci < (HOST_CMDS_BUF_LEN / 4)) { in rtsx_pci_add_cmd()
314 pcr->ci++; in rtsx_pci_add_cmd()
316 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_add_cmd()
320 void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr) in rtsx_pci_send_cmd_no_wait() argument
324 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd_no_wait()
326 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd_no_wait()
329 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd_no_wait()
333 int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout) in rtsx_pci_send_cmd() argument
341 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
344 pcr->done = &trans_done; in rtsx_pci_send_cmd()
345 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_send_cmd()
348 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd()
350 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd()
353 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd()
355 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
361 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_send_cmd()
366 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
367 if (pcr->trans_result == TRANS_RESULT_FAIL) in rtsx_pci_send_cmd()
369 else if (pcr->trans_result == TRANS_RESULT_OK) in rtsx_pci_send_cmd()
371 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_send_cmd()
373 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
376 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
377 pcr->done = NULL; in rtsx_pci_send_cmd()
378 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
381 rtsx_pci_stop_cmd(pcr); in rtsx_pci_send_cmd()
383 if (pcr->finish_me) in rtsx_pci_send_cmd()
384 complete(pcr->finish_me); in rtsx_pci_send_cmd()
390 static void rtsx_pci_add_sg_tbl(struct rtsx_pcr *pcr, in rtsx_pci_add_sg_tbl() argument
393 u64 *ptr = (u64 *)(pcr->host_sg_tbl_ptr) + pcr->sgi; in rtsx_pci_add_sg_tbl()
397 pcr_dbg(pcr, "DMA addr: 0x%x, Len: 0x%x\n", (unsigned int)addr, len); in rtsx_pci_add_sg_tbl()
402 if ((PCI_PID(pcr) == PID_5261) || (PCI_PID(pcr) == PID_5228)) { in rtsx_pci_add_sg_tbl()
412 pcr->sgi++; in rtsx_pci_add_sg_tbl()
415 int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_transfer_data() argument
420 pcr_dbg(pcr, "--> %s: num_sg = %d\n", __func__, num_sg); in rtsx_pci_transfer_data()
421 count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
424 pcr_dbg(pcr, "DMA mapping count: %d\n", count); in rtsx_pci_transfer_data()
426 err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout); in rtsx_pci_transfer_data()
428 rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
434 int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_map_sg() argument
439 if (pcr->remove_pci) in rtsx_pci_dma_map_sg()
445 return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_map_sg()
449 void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_unmap_sg() argument
454 dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_unmap_sg()
458 int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_transfer() argument
471 if (pcr->remove_pci) in rtsx_pci_dma_transfer()
478 pcr->sgi = 0; in rtsx_pci_dma_transfer()
482 rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1); in rtsx_pci_dma_transfer()
485 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
487 pcr->done = &trans_done; in rtsx_pci_dma_transfer()
488 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_dma_transfer()
490 rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr); in rtsx_pci_dma_transfer()
491 rtsx_pci_writel(pcr, RTSX_HDBCTLR, val); in rtsx_pci_dma_transfer()
493 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
498 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_dma_transfer()
503 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
504 if (pcr->trans_result == TRANS_RESULT_FAIL) { in rtsx_pci_dma_transfer()
506 if (pcr->dma_error_count < RTS_MAX_TIMES_FREQ_REDUCTION) in rtsx_pci_dma_transfer()
507 pcr->dma_error_count++; in rtsx_pci_dma_transfer()
510 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_dma_transfer()
512 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
515 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
516 pcr->done = NULL; in rtsx_pci_dma_transfer()
517 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
520 rtsx_pci_stop_cmd(pcr); in rtsx_pci_dma_transfer()
522 if (pcr->finish_me) in rtsx_pci_dma_transfer()
523 complete(pcr->finish_me); in rtsx_pci_dma_transfer()
529 int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_read_ppbuf() argument
542 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
545 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
547 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
551 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), 256); in rtsx_pci_read_ppbuf()
556 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
559 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
561 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
566 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), buf_len % 256); in rtsx_pci_read_ppbuf()
572 int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_write_ppbuf() argument
585 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
588 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
593 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
599 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
602 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
607 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
616 static int rtsx_pci_set_pull_ctl(struct rtsx_pcr *pcr, const u32 *tbl) in rtsx_pci_set_pull_ctl() argument
618 rtsx_pci_init_cmd(pcr); in rtsx_pci_set_pull_ctl()
621 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_set_pull_ctl()
626 return rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_set_pull_ctl()
629 int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_enable() argument
634 tbl = pcr->sd_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
636 tbl = pcr->ms_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
640 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_enable()
644 int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_disable() argument
649 tbl = pcr->sd_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
651 tbl = pcr->ms_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
655 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_disable()
659 static void rtsx_pci_enable_bus_int(struct rtsx_pcr *pcr) in rtsx_pci_enable_bus_int() argument
661 struct rtsx_hw_param *hw_param = &pcr->hw_param; in rtsx_pci_enable_bus_int()
663 pcr->bier = TRANS_OK_INT_EN | TRANS_FAIL_INT_EN | SD_INT_EN in rtsx_pci_enable_bus_int()
666 if (pcr->num_slots > 1) in rtsx_pci_enable_bus_int()
667 pcr->bier |= MS_INT_EN; in rtsx_pci_enable_bus_int()
670 rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier); in rtsx_pci_enable_bus_int()
672 pcr_dbg(pcr, "RTSX_BIER: 0x%08x\n", pcr->bier); in rtsx_pci_enable_bus_int()
692 int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, in rtsx_pci_switch_clock() argument
705 if (PCI_PID(pcr) == PID_5261) in rtsx_pci_switch_clock()
706 return rts5261_pci_switch_clock(pcr, card_clock, in rtsx_pci_switch_clock()
708 if (PCI_PID(pcr) == PID_5228) in rtsx_pci_switch_clock()
709 return rts5228_pci_switch_clock(pcr, card_clock, in rtsx_pci_switch_clock()
719 err = rtsx_pci_write_register(pcr, SD_CFG1, in rtsx_pci_switch_clock()
726 pcr->dma_error_count && in rtsx_pci_switch_clock()
727 PCI_PID(pcr) == RTS5227_DEVICE_ID) in rtsx_pci_switch_clock()
729 (pcr->dma_error_count * 20000000); in rtsx_pci_switch_clock()
732 pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock); in rtsx_pci_switch_clock()
737 pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n", in rtsx_pci_switch_clock()
738 clk, pcr->cur_clock); in rtsx_pci_switch_clock()
740 if (clk == pcr->cur_clock) in rtsx_pci_switch_clock()
743 if (pcr->ops->conv_clk_and_div_n) in rtsx_pci_switch_clock()
744 n = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); in rtsx_pci_switch_clock()
757 if (pcr->ops->conv_clk_and_div_n) { in rtsx_pci_switch_clock()
758 int dbl_clk = pcr->ops->conv_clk_and_div_n(n, in rtsx_pci_switch_clock()
760 n = (u8)pcr->ops->conv_clk_and_div_n(dbl_clk, in rtsx_pci_switch_clock()
767 pcr_dbg(pcr, "n = %d, div = %d\n", n, div); in rtsx_pci_switch_clock()
774 pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth); in rtsx_pci_switch_clock()
776 rtsx_pci_init_cmd(pcr); in rtsx_pci_switch_clock()
777 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rtsx_pci_switch_clock()
779 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rtsx_pci_switch_clock()
781 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rtsx_pci_switch_clock()
782 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rtsx_pci_switch_clock()
784 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rtsx_pci_switch_clock()
785 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rtsx_pci_switch_clock()
787 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
789 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
793 err = rtsx_pci_send_cmd(pcr, 2000); in rtsx_pci_switch_clock()
799 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rtsx_pci_switch_clock()
803 pcr->cur_clock = clk; in rtsx_pci_switch_clock()
808 int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_on() argument
810 if (pcr->ops->card_power_on) in rtsx_pci_card_power_on()
811 return pcr->ops->card_power_on(pcr, card); in rtsx_pci_card_power_on()
817 int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_off() argument
819 if (pcr->ops->card_power_off) in rtsx_pci_card_power_off()
820 return pcr->ops->card_power_off(pcr, card); in rtsx_pci_card_power_off()
826 int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_exclusive_check() argument
833 if (!(pcr->flags & PCR_MS_PMOS)) { in rtsx_pci_card_exclusive_check()
837 if (pcr->card_exist & (~cd_mask[card])) in rtsx_pci_card_exclusive_check()
845 int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rtsx_pci_switch_output_voltage() argument
847 if (pcr->ops->switch_output_voltage) in rtsx_pci_switch_output_voltage()
848 return pcr->ops->switch_output_voltage(pcr, voltage); in rtsx_pci_switch_output_voltage()
854 unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr) in rtsx_pci_card_exist() argument
858 val = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_exist()
859 if (pcr->ops->cd_deglitch) in rtsx_pci_card_exist()
860 val = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_exist()
866 void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr) in rtsx_pci_complete_unfinished_transfer() argument
870 pcr->finish_me = &finish; in rtsx_pci_complete_unfinished_transfer()
873 if (pcr->done) in rtsx_pci_complete_unfinished_transfer()
874 complete(pcr->done); in rtsx_pci_complete_unfinished_transfer()
876 if (!pcr->remove_pci) in rtsx_pci_complete_unfinished_transfer()
877 rtsx_pci_stop_cmd(pcr); in rtsx_pci_complete_unfinished_transfer()
881 pcr->finish_me = NULL; in rtsx_pci_complete_unfinished_transfer()
888 struct rtsx_pcr *pcr; in rtsx_pci_card_detect() local
894 pcr = container_of(dwork, struct rtsx_pcr, carddet_work); in rtsx_pci_card_detect()
896 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_card_detect()
898 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
899 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_card_detect()
901 irq_status = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_detect()
902 pcr_dbg(pcr, "irq_status: 0x%08x\n", irq_status); in rtsx_pci_card_detect()
905 card_inserted = pcr->card_inserted & irq_status; in rtsx_pci_card_detect()
906 card_removed = pcr->card_removed; in rtsx_pci_card_detect()
907 pcr->card_inserted = 0; in rtsx_pci_card_detect()
908 pcr->card_removed = 0; in rtsx_pci_card_detect()
910 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_card_detect()
913 pcr_dbg(pcr, "card_inserted: 0x%x, card_removed: 0x%x\n", in rtsx_pci_card_detect()
916 if (pcr->ops->cd_deglitch) in rtsx_pci_card_detect()
917 card_inserted = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_detect()
921 pcr->card_exist |= card_inserted; in rtsx_pci_card_detect()
922 pcr->card_exist &= ~card_removed; in rtsx_pci_card_detect()
925 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
927 if ((card_detect & SD_EXIST) && pcr->slots[RTSX_SD_CARD].card_event) in rtsx_pci_card_detect()
928 pcr->slots[RTSX_SD_CARD].card_event( in rtsx_pci_card_detect()
929 pcr->slots[RTSX_SD_CARD].p_dev); in rtsx_pci_card_detect()
930 if ((card_detect & MS_EXIST) && pcr->slots[RTSX_MS_CARD].card_event) in rtsx_pci_card_detect()
931 pcr->slots[RTSX_MS_CARD].card_event( in rtsx_pci_card_detect()
932 pcr->slots[RTSX_MS_CARD].p_dev); in rtsx_pci_card_detect()
935 static void rtsx_pci_process_ocp(struct rtsx_pcr *pcr) in rtsx_pci_process_ocp() argument
937 if (pcr->ops->process_ocp) { in rtsx_pci_process_ocp()
938 pcr->ops->process_ocp(pcr); in rtsx_pci_process_ocp()
940 if (!pcr->option.ocp_en) in rtsx_pci_process_ocp()
942 rtsx_pci_get_ocpstat(pcr, &pcr->ocp_stat); in rtsx_pci_process_ocp()
943 if (pcr->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) { in rtsx_pci_process_ocp()
944 rtsx_pci_card_power_off(pcr, RTSX_SD_CARD); in rtsx_pci_process_ocp()
945 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rtsx_pci_process_ocp()
946 rtsx_pci_clear_ocpstat(pcr); in rtsx_pci_process_ocp()
947 pcr->ocp_stat = 0; in rtsx_pci_process_ocp()
952 static int rtsx_pci_process_ocp_interrupt(struct rtsx_pcr *pcr) in rtsx_pci_process_ocp_interrupt() argument
954 if (pcr->option.ocp_en) in rtsx_pci_process_ocp_interrupt()
955 rtsx_pci_process_ocp(pcr); in rtsx_pci_process_ocp_interrupt()
962 struct rtsx_pcr *pcr = dev_id; in rtsx_pci_isr() local
965 if (!pcr) in rtsx_pci_isr()
968 spin_lock(&pcr->lock); in rtsx_pci_isr()
970 int_reg = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_isr()
972 rtsx_pci_writel(pcr, RTSX_BIPR, int_reg); in rtsx_pci_isr()
973 if ((int_reg & pcr->bier) == 0) { in rtsx_pci_isr()
974 spin_unlock(&pcr->lock); in rtsx_pci_isr()
978 spin_unlock(&pcr->lock); in rtsx_pci_isr()
982 int_reg &= (pcr->bier | 0x7FFFFF); in rtsx_pci_isr()
985 rtsx_pci_process_ocp_interrupt(pcr); in rtsx_pci_isr()
989 pcr->card_inserted |= SD_EXIST; in rtsx_pci_isr()
991 pcr->card_removed |= SD_EXIST; in rtsx_pci_isr()
992 pcr->card_inserted &= ~SD_EXIST; in rtsx_pci_isr()
994 pcr->dma_error_count = 0; in rtsx_pci_isr()
999 pcr->card_inserted |= MS_EXIST; in rtsx_pci_isr()
1001 pcr->card_removed |= MS_EXIST; in rtsx_pci_isr()
1002 pcr->card_inserted &= ~MS_EXIST; in rtsx_pci_isr()
1008 pcr->trans_result = TRANS_RESULT_FAIL; in rtsx_pci_isr()
1009 if (pcr->done) in rtsx_pci_isr()
1010 complete(pcr->done); in rtsx_pci_isr()
1012 pcr->trans_result = TRANS_RESULT_OK; in rtsx_pci_isr()
1013 if (pcr->done) in rtsx_pci_isr()
1014 complete(pcr->done); in rtsx_pci_isr()
1018 if ((pcr->card_inserted || pcr->card_removed) && !(int_reg & SD_OC_INT)) in rtsx_pci_isr()
1019 schedule_delayed_work(&pcr->carddet_work, in rtsx_pci_isr()
1022 spin_unlock(&pcr->lock); in rtsx_pci_isr()
1026 static int rtsx_pci_acquire_irq(struct rtsx_pcr *pcr) in rtsx_pci_acquire_irq() argument
1028 pcr_dbg(pcr, "%s: pcr->msi_en = %d, pci->irq = %d\n", in rtsx_pci_acquire_irq()
1029 __func__, pcr->msi_en, pcr->pci->irq); in rtsx_pci_acquire_irq()
1031 if (request_irq(pcr->pci->irq, rtsx_pci_isr, in rtsx_pci_acquire_irq()
1032 pcr->msi_en ? 0 : IRQF_SHARED, in rtsx_pci_acquire_irq()
1033 DRV_NAME_RTSX_PCI, pcr)) { in rtsx_pci_acquire_irq()
1034 dev_err(&(pcr->pci->dev), in rtsx_pci_acquire_irq()
1036 pcr->pci->irq); in rtsx_pci_acquire_irq()
1040 pcr->irq = pcr->pci->irq; in rtsx_pci_acquire_irq()
1041 pci_intx(pcr->pci, !pcr->msi_en); in rtsx_pci_acquire_irq()
1046 static void rtsx_enable_aspm(struct rtsx_pcr *pcr) in rtsx_enable_aspm() argument
1048 if (pcr->ops->set_aspm) in rtsx_enable_aspm()
1049 pcr->ops->set_aspm(pcr, true); in rtsx_enable_aspm()
1051 rtsx_comm_set_aspm(pcr, true); in rtsx_enable_aspm()
1054 static void rtsx_comm_pm_power_saving(struct rtsx_pcr *pcr) in rtsx_comm_pm_power_saving() argument
1056 struct rtsx_cr_option *option = &pcr->option; in rtsx_comm_pm_power_saving()
1061 if (rtsx_check_dev_flag(pcr, L1_SNOOZE_TEST_EN)) in rtsx_comm_pm_power_saving()
1064 rtsx_set_ltr_latency(pcr, latency); in rtsx_comm_pm_power_saving()
1067 if (rtsx_check_dev_flag(pcr, LTR_L1SS_PWR_GATE_EN)) in rtsx_comm_pm_power_saving()
1068 rtsx_set_l1off_sub_cfg_d0(pcr, 0); in rtsx_comm_pm_power_saving()
1070 rtsx_enable_aspm(pcr); in rtsx_comm_pm_power_saving()
1073 static void rtsx_pm_power_saving(struct rtsx_pcr *pcr) in rtsx_pm_power_saving() argument
1075 rtsx_comm_pm_power_saving(pcr); in rtsx_pm_power_saving()
1081 struct rtsx_pcr *pcr = container_of(dwork, struct rtsx_pcr, idle_work); in rtsx_pci_idle_work() local
1083 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_idle_work()
1085 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_idle_work()
1087 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_idle_work()
1089 if (pcr->ops->disable_auto_blink) in rtsx_pci_idle_work()
1090 pcr->ops->disable_auto_blink(pcr); in rtsx_pci_idle_work()
1091 if (pcr->ops->turn_off_led) in rtsx_pci_idle_work()
1092 pcr->ops->turn_off_led(pcr); in rtsx_pci_idle_work()
1094 rtsx_pm_power_saving(pcr); in rtsx_pci_idle_work()
1096 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_idle_work()
1099 static void rtsx_base_force_power_down(struct rtsx_pcr *pcr, u8 pm_state) in rtsx_base_force_power_down() argument
1102 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); in rtsx_base_force_power_down()
1103 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); in rtsx_base_force_power_down()
1104 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, in rtsx_base_force_power_down()
1107 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, in rtsx_base_force_power_down()
1110 rtsx_pci_write_register(pcr, FPDCTL, ALL_POWER_DOWN, ALL_POWER_DOWN); in rtsx_base_force_power_down()
1113 static void __maybe_unused rtsx_pci_power_off(struct rtsx_pcr *pcr, u8 pm_state) in rtsx_pci_power_off() argument
1115 if (pcr->ops->turn_off_led) in rtsx_pci_power_off()
1116 pcr->ops->turn_off_led(pcr); in rtsx_pci_power_off()
1118 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_power_off()
1119 pcr->bier = 0; in rtsx_pci_power_off()
1121 rtsx_pci_write_register(pcr, PETXCFG, 0x08, 0x08); in rtsx_pci_power_off()
1122 rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, pm_state); in rtsx_pci_power_off()
1124 if (pcr->ops->force_power_down) in rtsx_pci_power_off()
1125 pcr->ops->force_power_down(pcr, pm_state); in rtsx_pci_power_off()
1127 rtsx_base_force_power_down(pcr, pm_state); in rtsx_pci_power_off()
1130 void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr) in rtsx_pci_enable_ocp() argument
1134 if (pcr->ops->enable_ocp) { in rtsx_pci_enable_ocp()
1135 pcr->ops->enable_ocp(pcr); in rtsx_pci_enable_ocp()
1137 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, 0); in rtsx_pci_enable_ocp()
1138 rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val); in rtsx_pci_enable_ocp()
1143 void rtsx_pci_disable_ocp(struct rtsx_pcr *pcr) in rtsx_pci_disable_ocp() argument
1147 if (pcr->ops->disable_ocp) { in rtsx_pci_disable_ocp()
1148 pcr->ops->disable_ocp(pcr); in rtsx_pci_disable_ocp()
1150 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rtsx_pci_disable_ocp()
1151 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, in rtsx_pci_disable_ocp()
1156 void rtsx_pci_init_ocp(struct rtsx_pcr *pcr) in rtsx_pci_init_ocp() argument
1158 if (pcr->ops->init_ocp) { in rtsx_pci_init_ocp()
1159 pcr->ops->init_ocp(pcr); in rtsx_pci_init_ocp()
1161 struct rtsx_cr_option *option = &(pcr->option); in rtsx_pci_init_ocp()
1166 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, 0); in rtsx_pci_init_ocp()
1167 rtsx_pci_write_register(pcr, REG_OCPPARA1, in rtsx_pci_init_ocp()
1169 rtsx_pci_write_register(pcr, REG_OCPPARA2, in rtsx_pci_init_ocp()
1171 rtsx_pci_write_register(pcr, REG_OCPGLITCH, in rtsx_pci_init_ocp()
1172 SD_OCP_GLITCH_MASK, pcr->hw_param.ocp_glitch); in rtsx_pci_init_ocp()
1173 rtsx_pci_enable_ocp(pcr); in rtsx_pci_init_ocp()
1178 int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val) in rtsx_pci_get_ocpstat() argument
1180 if (pcr->ops->get_ocpstat) in rtsx_pci_get_ocpstat()
1181 return pcr->ops->get_ocpstat(pcr, val); in rtsx_pci_get_ocpstat()
1183 return rtsx_pci_read_register(pcr, REG_OCPSTAT, val); in rtsx_pci_get_ocpstat()
1186 void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr) in rtsx_pci_clear_ocpstat() argument
1188 if (pcr->ops->clear_ocpstat) { in rtsx_pci_clear_ocpstat()
1189 pcr->ops->clear_ocpstat(pcr); in rtsx_pci_clear_ocpstat()
1194 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val); in rtsx_pci_clear_ocpstat()
1196 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rtsx_pci_clear_ocpstat()
1200 void rtsx_pci_enable_oobs_polling(struct rtsx_pcr *pcr) in rtsx_pci_enable_oobs_polling() argument
1204 if ((PCI_PID(pcr) != PID_525A) && (PCI_PID(pcr) != PID_5260)) { in rtsx_pci_enable_oobs_polling()
1205 rtsx_pci_read_phy_register(pcr, 0x01, &val); in rtsx_pci_enable_oobs_polling()
1207 rtsx_pci_write_phy_register(pcr, 0x01, val); in rtsx_pci_enable_oobs_polling()
1209 rtsx_pci_write_register(pcr, REG_CFG_OOBS_OFF_TIMER, 0xFF, 0x32); in rtsx_pci_enable_oobs_polling()
1210 rtsx_pci_write_register(pcr, REG_CFG_OOBS_ON_TIMER, 0xFF, 0x05); in rtsx_pci_enable_oobs_polling()
1211 rtsx_pci_write_register(pcr, REG_CFG_VCM_ON_TIMER, 0xFF, 0x83); in rtsx_pci_enable_oobs_polling()
1212 rtsx_pci_write_register(pcr, REG_CFG_OOBS_POLLING, 0xFF, 0xDE); in rtsx_pci_enable_oobs_polling()
1216 void rtsx_pci_disable_oobs_polling(struct rtsx_pcr *pcr) in rtsx_pci_disable_oobs_polling() argument
1220 if ((PCI_PID(pcr) != PID_525A) && (PCI_PID(pcr) != PID_5260)) { in rtsx_pci_disable_oobs_polling()
1221 rtsx_pci_read_phy_register(pcr, 0x01, &val); in rtsx_pci_disable_oobs_polling()
1223 rtsx_pci_write_phy_register(pcr, 0x01, val); in rtsx_pci_disable_oobs_polling()
1225 rtsx_pci_write_register(pcr, REG_CFG_VCM_ON_TIMER, 0xFF, 0x03); in rtsx_pci_disable_oobs_polling()
1226 rtsx_pci_write_register(pcr, REG_CFG_OOBS_POLLING, 0xFF, 0x00); in rtsx_pci_disable_oobs_polling()
1230 int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr) in rtsx_sd_power_off_card3v3() argument
1232 rtsx_pci_write_register(pcr, CARD_CLK_EN, SD_CLK_EN | in rtsx_sd_power_off_card3v3()
1234 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rtsx_sd_power_off_card3v3()
1235 rtsx_pci_card_power_off(pcr, RTSX_SD_CARD); in rtsx_sd_power_off_card3v3()
1239 rtsx_pci_card_pull_ctl_disable(pcr, RTSX_SD_CARD); in rtsx_sd_power_off_card3v3()
1244 int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr) in rtsx_ms_power_off_card3v3() argument
1246 rtsx_pci_write_register(pcr, CARD_CLK_EN, SD_CLK_EN | in rtsx_ms_power_off_card3v3()
1249 rtsx_pci_card_pull_ctl_disable(pcr, RTSX_MS_CARD); in rtsx_ms_power_off_card3v3()
1251 rtsx_pci_write_register(pcr, CARD_OE, MS_OUTPUT_EN, 0); in rtsx_ms_power_off_card3v3()
1252 rtsx_pci_card_power_off(pcr, RTSX_MS_CARD); in rtsx_ms_power_off_card3v3()
1257 static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) in rtsx_pci_init_hw() argument
1259 struct pci_dev *pdev = pcr->pci; in rtsx_pci_init_hw()
1262 if (PCI_PID(pcr) == PID_5228) in rtsx_pci_init_hw()
1263 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG1, RTS5228_LDO1_SR_TIME_MASK, in rtsx_pci_init_hw()
1266 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_init_hw()
1268 rtsx_pci_enable_bus_int(pcr); in rtsx_pci_init_hw()
1271 if (PCI_PID(pcr) == PID_5261) { in rtsx_pci_init_hw()
1273 err = rtsx_pci_write_register(pcr, RTS5261_FW_CFG1, in rtsx_pci_init_hw()
1275 err = rtsx_pci_write_register(pcr, RTS5261_REG_FPDCTL, in rtsx_pci_init_hw()
1278 err = rtsx_pci_write_register(pcr, FPDCTL, SSC_POWER_DOWN, 0); in rtsx_pci_init_hw()
1286 rtsx_pci_disable_aspm(pcr); in rtsx_pci_init_hw()
1287 if (pcr->ops->optimize_phy) { in rtsx_pci_init_hw()
1288 err = pcr->ops->optimize_phy(pcr); in rtsx_pci_init_hw()
1293 rtsx_pci_init_cmd(pcr); in rtsx_pci_init_hw()
1296 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, 0x07, 0x07); in rtsx_pci_init_hw()
1298 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_init_hw()
1300 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, 0x1E, 0); in rtsx_pci_init_hw()
1302 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x0A, 0); in rtsx_pci_init_hw()
1304 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DRIVE_SEL, in rtsx_pci_init_hw()
1305 0xFF, pcr->card_drive_sel); in rtsx_pci_init_hw()
1307 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, in rtsx_pci_init_hw()
1309 if (PCI_PID(pcr) == PID_5261) in rtsx_pci_init_hw()
1310 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, in rtsx_pci_init_hw()
1312 else if (PCI_PID(pcr) == PID_5228) in rtsx_pci_init_hw()
1313 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, in rtsx_pci_init_hw()
1316 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, 0x12); in rtsx_pci_init_hw()
1319 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x16, 0x10); in rtsx_pci_init_hw()
1321 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in rtsx_pci_init_hw()
1326 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PERST_GLITCH_WIDTH, 0xFF, 0x80); in rtsx_pci_init_hw()
1331 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RCCTL, 0x01, 0x00); in rtsx_pci_init_hw()
1337 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, NFTS_TX_CTRL, 0x02, 0); in rtsx_pci_init_hw()
1339 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_init_hw()
1343 switch (PCI_PID(pcr)) { in rtsx_pci_init_hw()
1350 rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 1, 1); in rtsx_pci_init_hw()
1357 rtsx_pci_init_ocp(pcr); in rtsx_pci_init_hw()
1365 if (pcr->ops->extra_init_hw) { in rtsx_pci_init_hw()
1366 err = pcr->ops->extra_init_hw(pcr); in rtsx_pci_init_hw()
1374 if (pcr->ops->cd_deglitch) in rtsx_pci_init_hw()
1375 pcr->card_exist = pcr->ops->cd_deglitch(pcr); in rtsx_pci_init_hw()
1377 pcr->card_exist = rtsx_pci_readl(pcr, RTSX_BIPR) & CARD_EXIST; in rtsx_pci_init_hw()
1382 static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) in rtsx_pci_init_chip() argument
1386 spin_lock_init(&pcr->lock); in rtsx_pci_init_chip()
1387 mutex_init(&pcr->pcr_mutex); in rtsx_pci_init_chip()
1389 switch (PCI_PID(pcr)) { in rtsx_pci_init_chip()
1392 rts5209_init_params(pcr); in rtsx_pci_init_chip()
1396 rts5229_init_params(pcr); in rtsx_pci_init_chip()
1400 rtl8411_init_params(pcr); in rtsx_pci_init_chip()
1404 rts5227_init_params(pcr); in rtsx_pci_init_chip()
1408 rts522a_init_params(pcr); in rtsx_pci_init_chip()
1412 rts5249_init_params(pcr); in rtsx_pci_init_chip()
1416 rts524a_init_params(pcr); in rtsx_pci_init_chip()
1420 rts525a_init_params(pcr); in rtsx_pci_init_chip()
1424 rtl8411b_init_params(pcr); in rtsx_pci_init_chip()
1428 rtl8402_init_params(pcr); in rtsx_pci_init_chip()
1432 rts5260_init_params(pcr); in rtsx_pci_init_chip()
1436 rts5261_init_params(pcr); in rtsx_pci_init_chip()
1440 rts5228_init_params(pcr); in rtsx_pci_init_chip()
1444 pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n", in rtsx_pci_init_chip()
1445 PCI_PID(pcr), pcr->ic_version); in rtsx_pci_init_chip()
1447 pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot), in rtsx_pci_init_chip()
1449 if (!pcr->slots) in rtsx_pci_init_chip()
1452 if (pcr->ops->fetch_vendor_settings) in rtsx_pci_init_chip()
1453 pcr->ops->fetch_vendor_settings(pcr); in rtsx_pci_init_chip()
1455 pcr_dbg(pcr, "pcr->aspm_en = 0x%x\n", pcr->aspm_en); in rtsx_pci_init_chip()
1456 pcr_dbg(pcr, "pcr->sd30_drive_sel_1v8 = 0x%x\n", in rtsx_pci_init_chip()
1457 pcr->sd30_drive_sel_1v8); in rtsx_pci_init_chip()
1458 pcr_dbg(pcr, "pcr->sd30_drive_sel_3v3 = 0x%x\n", in rtsx_pci_init_chip()
1459 pcr->sd30_drive_sel_3v3); in rtsx_pci_init_chip()
1460 pcr_dbg(pcr, "pcr->card_drive_sel = 0x%x\n", in rtsx_pci_init_chip()
1461 pcr->card_drive_sel); in rtsx_pci_init_chip()
1462 pcr_dbg(pcr, "pcr->flags = 0x%x\n", pcr->flags); in rtsx_pci_init_chip()
1464 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_init_chip()
1465 err = rtsx_pci_init_hw(pcr); in rtsx_pci_init_chip()
1467 kfree(pcr->slots); in rtsx_pci_init_chip()
1477 struct rtsx_pcr *pcr; in rtsx_pci_probe() local
1499 pcr = kzalloc(sizeof(*pcr), GFP_KERNEL); in rtsx_pci_probe()
1500 if (!pcr) { in rtsx_pci_probe()
1510 handle->pcr = pcr; in rtsx_pci_probe()
1514 ret = idr_alloc(&rtsx_pci_idr, pcr, 0, 0, GFP_NOWAIT); in rtsx_pci_probe()
1516 pcr->id = ret; in rtsx_pci_probe()
1522 pcr->pci = pcidev; in rtsx_pci_probe()
1525 if (CHK_PCI_PID(pcr, 0x525A)) in rtsx_pci_probe()
1529 pcr->remap_addr = ioremap(base, len); in rtsx_pci_probe()
1530 if (!pcr->remap_addr) { in rtsx_pci_probe()
1535 pcr->rtsx_resv_buf = dma_alloc_coherent(&(pcidev->dev), in rtsx_pci_probe()
1536 RTSX_RESV_BUF_LEN, &(pcr->rtsx_resv_buf_addr), in rtsx_pci_probe()
1538 if (pcr->rtsx_resv_buf == NULL) { in rtsx_pci_probe()
1542 pcr->host_cmds_ptr = pcr->rtsx_resv_buf; in rtsx_pci_probe()
1543 pcr->host_cmds_addr = pcr->rtsx_resv_buf_addr; in rtsx_pci_probe()
1544 pcr->host_sg_tbl_ptr = pcr->rtsx_resv_buf + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1545 pcr->host_sg_tbl_addr = pcr->rtsx_resv_buf_addr + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1547 pcr->card_inserted = 0; in rtsx_pci_probe()
1548 pcr->card_removed = 0; in rtsx_pci_probe()
1549 INIT_DELAYED_WORK(&pcr->carddet_work, rtsx_pci_card_detect); in rtsx_pci_probe()
1550 INIT_DELAYED_WORK(&pcr->idle_work, rtsx_pci_idle_work); in rtsx_pci_probe()
1552 pcr->msi_en = msi_en; in rtsx_pci_probe()
1553 if (pcr->msi_en) { in rtsx_pci_probe()
1556 pcr->msi_en = false; in rtsx_pci_probe()
1559 ret = rtsx_pci_acquire_irq(pcr); in rtsx_pci_probe()
1564 synchronize_irq(pcr->irq); in rtsx_pci_probe()
1566 ret = rtsx_pci_init_chip(pcr); in rtsx_pci_probe()
1574 ret = mfd_add_devices(&pcidev->dev, pcr->id, rtsx_pcr_cells, in rtsx_pci_probe()
1579 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_probe()
1584 kfree(pcr->slots); in rtsx_pci_probe()
1586 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_probe()
1588 if (pcr->msi_en) in rtsx_pci_probe()
1589 pci_disable_msi(pcr->pci); in rtsx_pci_probe()
1590 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_probe()
1591 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_probe()
1593 iounmap(pcr->remap_addr); in rtsx_pci_probe()
1596 idr_remove(&rtsx_pci_idr, pcr->id); in rtsx_pci_probe()
1601 kfree(pcr); in rtsx_pci_probe()
1613 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_remove() local
1615 pcr->remove_pci = true; in rtsx_pci_remove()
1618 spin_lock_irq(&pcr->lock); in rtsx_pci_remove()
1619 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_remove()
1620 pcr->bier = 0; in rtsx_pci_remove()
1621 spin_unlock_irq(&pcr->lock); in rtsx_pci_remove()
1623 cancel_delayed_work_sync(&pcr->carddet_work); in rtsx_pci_remove()
1624 cancel_delayed_work_sync(&pcr->idle_work); in rtsx_pci_remove()
1628 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_remove()
1629 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_remove()
1630 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_remove()
1631 if (pcr->msi_en) in rtsx_pci_remove()
1632 pci_disable_msi(pcr->pci); in rtsx_pci_remove()
1633 iounmap(pcr->remap_addr); in rtsx_pci_remove()
1639 idr_remove(&rtsx_pci_idr, pcr->id); in rtsx_pci_remove()
1642 kfree(pcr->slots); in rtsx_pci_remove()
1643 kfree(pcr); in rtsx_pci_remove()
1655 struct rtsx_pcr *pcr; in rtsx_pci_suspend() local
1660 pcr = handle->pcr; in rtsx_pci_suspend()
1662 cancel_delayed_work(&pcr->carddet_work); in rtsx_pci_suspend()
1663 cancel_delayed_work(&pcr->idle_work); in rtsx_pci_suspend()
1665 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1667 rtsx_pci_power_off(pcr, HOST_ENTER_S3); in rtsx_pci_suspend()
1671 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1679 struct rtsx_pcr *pcr; in rtsx_pci_resume() local
1685 pcr = handle->pcr; in rtsx_pci_resume()
1687 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_resume()
1689 ret = rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_resume()
1693 ret = rtsx_pci_init_hw(pcr); in rtsx_pci_resume()
1697 schedule_delayed_work(&pcr->idle_work, msecs_to_jiffies(200)); in rtsx_pci_resume()
1700 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_resume()
1709 struct rtsx_pcr *pcr; in rtsx_pci_shutdown() local
1714 pcr = handle->pcr; in rtsx_pci_shutdown()
1715 rtsx_pci_power_off(pcr, HOST_ENTER_S1); in rtsx_pci_shutdown()
1718 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_shutdown()
1719 if (pcr->msi_en) in rtsx_pci_shutdown()
1720 pci_disable_msi(pcr->pci); in rtsx_pci_shutdown()