Lines Matching refs:db
354 struct dmfe_board_info *db; /* board information structure */ in dmfe_init_one() local
378 dev = alloc_etherdev(sizeof(*db)); in dmfe_init_one()
422 db = netdev_priv(dev); in dmfe_init_one()
425 db->desc_pool_ptr = dma_alloc_coherent(&pdev->dev, in dmfe_init_one()
427 &db->desc_pool_dma_ptr, GFP_KERNEL); in dmfe_init_one()
428 if (!db->desc_pool_ptr) { in dmfe_init_one()
433 db->buf_pool_ptr = dma_alloc_coherent(&pdev->dev, in dmfe_init_one()
435 &db->buf_pool_dma_ptr, GFP_KERNEL); in dmfe_init_one()
436 if (!db->buf_pool_ptr) { in dmfe_init_one()
441 db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; in dmfe_init_one()
442 db->first_tx_desc_dma = db->desc_pool_dma_ptr; in dmfe_init_one()
443 db->buf_pool_start = db->buf_pool_ptr; in dmfe_init_one()
444 db->buf_pool_dma_start = db->buf_pool_dma_ptr; in dmfe_init_one()
446 db->chip_id = ent->driver_data; in dmfe_init_one()
448 db->ioaddr = pci_iomap(pdev, 0, 0); in dmfe_init_one()
449 if (!db->ioaddr) { in dmfe_init_one()
454 db->chip_revision = pdev->revision; in dmfe_init_one()
455 db->wol_mode = 0; in dmfe_init_one()
457 db->pdev = pdev; in dmfe_init_one()
463 spin_lock_init(&db->lock); in dmfe_init_one()
467 if ( (pci_pmr == 0x10000) && (db->chip_revision == 0x31) ) in dmfe_init_one()
468 db->chip_type = 1; /* DM9102A E3 */ in dmfe_init_one()
470 db->chip_type = 0; in dmfe_init_one()
474 ((__le16 *) db->srom)[i] = in dmfe_init_one()
475 cpu_to_le16(read_srom_word(db->ioaddr, i)); in dmfe_init_one()
480 dev->dev_addr[i] = db->srom[20 + i]; in dmfe_init_one()
495 pci_iounmap(pdev, db->ioaddr); in dmfe_init_one()
498 db->buf_pool_ptr, db->buf_pool_dma_ptr); in dmfe_init_one()
502 db->desc_pool_ptr, db->desc_pool_dma_ptr); in dmfe_init_one()
517 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_remove_one() local
524 pci_iounmap(db->pdev, db->ioaddr); in dmfe_remove_one()
525 dma_free_coherent(&db->pdev->dev, in dmfe_remove_one()
527 db->desc_pool_ptr, db->desc_pool_dma_ptr); in dmfe_remove_one()
528 dma_free_coherent(&db->pdev->dev, in dmfe_remove_one()
530 db->buf_pool_ptr, db->buf_pool_dma_ptr); in dmfe_remove_one()
546 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_open() local
547 const int irq = db->pdev->irq; in dmfe_open()
557 db->cr6_data = CR6_DEFAULT | dmfe_cr6_user_set; in dmfe_open()
558 db->tx_packet_cnt = 0; in dmfe_open()
559 db->tx_queue_cnt = 0; in dmfe_open()
560 db->rx_avail_cnt = 0; in dmfe_open()
561 db->wait_reset = 0; in dmfe_open()
563 db->first_in_callback = 0; in dmfe_open()
564 db->NIC_capability = 0xf; /* All capability*/ in dmfe_open()
565 db->PHY_reg4 = 0x1e0; in dmfe_open()
568 if ( !chkmode || (db->chip_id == PCI_DM9132_ID) || in dmfe_open()
569 (db->chip_revision >= 0x30) ) { in dmfe_open()
570 db->cr6_data |= DMFE_TXTH_256; in dmfe_open()
571 db->cr0_data = CR0_DEFAULT; in dmfe_open()
572 db->dm910x_chk_mode=4; /* Enter the normal mode */ in dmfe_open()
574 db->cr6_data |= CR6_SFT; /* Store & Forward mode */ in dmfe_open()
575 db->cr0_data = 0; in dmfe_open()
576 db->dm910x_chk_mode = 1; /* Enter the check mode */ in dmfe_open()
586 timer_setup(&db->timer, dmfe_timer, 0); in dmfe_open()
587 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; in dmfe_open()
588 add_timer(&db->timer); in dmfe_open()
603 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_init_dm910x() local
604 void __iomem *ioaddr = db->ioaddr; in dmfe_init_dm910x()
611 dw32(DCR0, db->cr0_data); in dmfe_init_dm910x()
615 db->phy_addr = 1; in dmfe_init_dm910x()
618 dmfe_parse_srom(db); in dmfe_init_dm910x()
619 db->media_mode = dmfe_media_mode; in dmfe_init_dm910x()
623 if (db->chip_id == PCI_DM9009_ID) { in dmfe_init_dm910x()
630 if ( !(db->media_mode & 0x10) ) /* Force 1M mode */ in dmfe_init_dm910x()
631 dmfe_set_phyxcer(db); in dmfe_init_dm910x()
634 if ( !(db->media_mode & DMFE_AUTO) ) in dmfe_init_dm910x()
635 db->op_mode = db->media_mode; /* Force Mode */ in dmfe_init_dm910x()
641 update_cr6(db->cr6_data, ioaddr); in dmfe_init_dm910x()
644 if (db->chip_id == PCI_DM9132_ID) in dmfe_init_dm910x()
650 db->cr7_data = CR7_DEFAULT; in dmfe_init_dm910x()
651 dw32(DCR7, db->cr7_data); in dmfe_init_dm910x()
654 dw32(DCR15, db->cr15_data); in dmfe_init_dm910x()
657 db->cr6_data |= CR6_RXSC | CR6_TXSC | 0x40000; in dmfe_init_dm910x()
658 update_cr6(db->cr6_data, ioaddr); in dmfe_init_dm910x()
670 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_start_xmit() local
671 void __iomem *ioaddr = db->ioaddr; in dmfe_start_xmit()
687 spin_lock_irqsave(&db->lock, flags); in dmfe_start_xmit()
690 if (db->tx_queue_cnt >= TX_FREE_DESC_CNT) { in dmfe_start_xmit()
691 spin_unlock_irqrestore(&db->lock, flags); in dmfe_start_xmit()
692 pr_err("No Tx resource %ld\n", db->tx_queue_cnt); in dmfe_start_xmit()
700 txptr = db->tx_insert_ptr; in dmfe_start_xmit()
705 db->tx_insert_ptr = txptr->next_tx_desc; in dmfe_start_xmit()
708 if ( (!db->tx_queue_cnt) && (db->tx_packet_cnt < TX_MAX_SEND_CNT) ) { in dmfe_start_xmit()
710 db->tx_packet_cnt++; /* Ready to send */ in dmfe_start_xmit()
714 db->tx_queue_cnt++; /* queue TX packet */ in dmfe_start_xmit()
719 if ( db->tx_queue_cnt < TX_FREE_DESC_CNT ) in dmfe_start_xmit()
723 spin_unlock_irqrestore(&db->lock, flags); in dmfe_start_xmit()
724 dw32(DCR7, db->cr7_data); in dmfe_start_xmit()
740 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_stop() local
741 void __iomem *ioaddr = db->ioaddr; in dmfe_stop()
749 del_timer_sync(&db->timer); in dmfe_stop()
754 dmfe_phy_write(ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); in dmfe_stop()
757 free_irq(db->pdev->irq, dev); in dmfe_stop()
760 dmfe_free_rxbuffer(db); in dmfe_stop()
765 db->tx_fifo_underrun, db->tx_excessive_collision, in dmfe_stop()
766 db->tx_late_collision, db->tx_no_carrier, db->tx_loss_carrier, in dmfe_stop()
767 db->tx_jabber_timeout, db->reset_count, db->reset_cr8, in dmfe_stop()
768 db->reset_fatal, db->reset_TXtimeout); in dmfe_stop()
783 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_interrupt() local
784 void __iomem *ioaddr = db->ioaddr; in dmfe_interrupt()
789 spin_lock_irqsave(&db->lock, flags); in dmfe_interrupt()
792 db->cr5_data = dr32(DCR5); in dmfe_interrupt()
793 dw32(DCR5, db->cr5_data); in dmfe_interrupt()
794 if ( !(db->cr5_data & 0xc1) ) { in dmfe_interrupt()
795 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
803 if (db->cr5_data & 0x2000) { in dmfe_interrupt()
805 DMFE_DBUG(1, "System bus error happen. CR5=", db->cr5_data); in dmfe_interrupt()
806 db->reset_fatal++; in dmfe_interrupt()
807 db->wait_reset = 1; /* Need to RESET */ in dmfe_interrupt()
808 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
813 if ( (db->cr5_data & 0x40) && db->rx_avail_cnt ) in dmfe_interrupt()
814 dmfe_rx_packet(dev, db); in dmfe_interrupt()
817 if (db->rx_avail_cnt<RX_DESC_CNT) in dmfe_interrupt()
821 if ( db->cr5_data & 0x01) in dmfe_interrupt()
822 dmfe_free_tx_pkt(dev, db); in dmfe_interrupt()
825 if (db->dm910x_chk_mode & 0x2) { in dmfe_interrupt()
826 db->dm910x_chk_mode = 0x4; in dmfe_interrupt()
827 db->cr6_data |= 0x100; in dmfe_interrupt()
828 update_cr6(db->cr6_data, ioaddr); in dmfe_interrupt()
832 dw32(DCR7, db->cr7_data); in dmfe_interrupt()
834 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
848 struct dmfe_board_info *db = netdev_priv(dev); in poll_dmfe() local
849 const int irq = db->pdev->irq; in poll_dmfe()
863 static void dmfe_free_tx_pkt(struct net_device *dev, struct dmfe_board_info *db) in dmfe_free_tx_pkt() argument
866 void __iomem *ioaddr = db->ioaddr; in dmfe_free_tx_pkt()
869 txptr = db->tx_remove_ptr; in dmfe_free_tx_pkt()
870 while(db->tx_packet_cnt) { in dmfe_free_tx_pkt()
876 db->tx_packet_cnt--; in dmfe_free_tx_pkt()
887 db->tx_fifo_underrun++; in dmfe_free_tx_pkt()
888 if ( !(db->cr6_data & CR6_SFT) ) { in dmfe_free_tx_pkt()
889 db->cr6_data = db->cr6_data | CR6_SFT; in dmfe_free_tx_pkt()
890 update_cr6(db->cr6_data, ioaddr); in dmfe_free_tx_pkt()
894 db->tx_excessive_collision++; in dmfe_free_tx_pkt()
896 db->tx_late_collision++; in dmfe_free_tx_pkt()
898 db->tx_no_carrier++; in dmfe_free_tx_pkt()
900 db->tx_loss_carrier++; in dmfe_free_tx_pkt()
902 db->tx_jabber_timeout++; in dmfe_free_tx_pkt()
910 db->tx_remove_ptr = txptr; in dmfe_free_tx_pkt()
913 if ( (db->tx_packet_cnt < TX_MAX_SEND_CNT) && db->tx_queue_cnt ) { in dmfe_free_tx_pkt()
915 db->tx_packet_cnt++; /* Ready to send */ in dmfe_free_tx_pkt()
916 db->tx_queue_cnt--; in dmfe_free_tx_pkt()
922 if ( db->tx_queue_cnt < TX_WAKE_DESC_CNT ) in dmfe_free_tx_pkt()
945 static void dmfe_rx_packet(struct net_device *dev, struct dmfe_board_info *db) in dmfe_rx_packet() argument
952 rxptr = db->rx_ready_ptr; in dmfe_rx_packet()
954 while(db->rx_avail_cnt) { in dmfe_rx_packet()
959 db->rx_avail_cnt--; in dmfe_rx_packet()
960 db->interval_rx_cnt++; in dmfe_rx_packet()
962 dma_unmap_single(&db->pdev->dev, le32_to_cpu(rxptr->rdes2), in dmfe_rx_packet()
969 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
987 ((db->cr6_data & CR6_PM) && (rxlen>6)) ) { in dmfe_rx_packet()
991 if ( (db->dm910x_chk_mode & 1) && in dmfe_rx_packet()
995 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
996 db->dm910x_chk_mode = 3; in dmfe_rx_packet()
1010 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1022 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1029 db->rx_ready_ptr = rxptr; in dmfe_rx_packet()
1038 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_set_filter_mode() local
1043 spin_lock_irqsave(&db->lock, flags); in dmfe_set_filter_mode()
1047 db->cr6_data |= CR6_PM | CR6_PBF; in dmfe_set_filter_mode()
1048 update_cr6(db->cr6_data, db->ioaddr); in dmfe_set_filter_mode()
1049 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1055 db->cr6_data &= ~(CR6_PM | CR6_PBF); in dmfe_set_filter_mode()
1056 db->cr6_data |= CR6_PAM; in dmfe_set_filter_mode()
1057 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1062 if (db->chip_id == PCI_DM9132_ID) in dmfe_set_filter_mode()
1066 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1085 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_ethtool_set_wol() local
1091 db->wol_mode = wolinfo->wolopts; in dmfe_ethtool_set_wol()
1098 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_ethtool_get_wol() local
1101 wolinfo->wolopts = db->wol_mode; in dmfe_ethtool_get_wol()
1119 struct dmfe_board_info *db = from_timer(db, t, timer); in dmfe_timer() local
1120 struct net_device *dev = pci_get_drvdata(db->pdev); in dmfe_timer()
1121 void __iomem *ioaddr = db->ioaddr; in dmfe_timer()
1129 spin_lock_irqsave(&db->lock, flags); in dmfe_timer()
1132 if (db->first_in_callback == 0) { in dmfe_timer()
1133 db->first_in_callback = 1; in dmfe_timer()
1134 if (db->chip_type && (db->chip_id==PCI_DM9102_ID)) { in dmfe_timer()
1135 db->cr6_data &= ~0x40000; in dmfe_timer()
1136 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1137 dmfe_phy_write(ioaddr, db->phy_addr, 0, 0x1000, db->chip_id); in dmfe_timer()
1138 db->cr6_data |= 0x40000; in dmfe_timer()
1139 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1140 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; in dmfe_timer()
1141 add_timer(&db->timer); in dmfe_timer()
1142 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1149 if ( (db->dm910x_chk_mode & 0x1) && in dmfe_timer()
1151 db->dm910x_chk_mode = 0x4; in dmfe_timer()
1155 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { in dmfe_timer()
1156 db->reset_cr8++; in dmfe_timer()
1157 db->wait_reset = 1; in dmfe_timer()
1159 db->interval_rx_cnt = 0; in dmfe_timer()
1162 if ( db->tx_packet_cnt && in dmfe_timer()
1168 db->reset_TXtimeout++; in dmfe_timer()
1169 db->wait_reset = 1; in dmfe_timer()
1174 if (db->wait_reset) { in dmfe_timer()
1175 DMFE_DBUG(0, "Dynamic Reset device", db->tx_packet_cnt); in dmfe_timer()
1176 db->reset_count++; in dmfe_timer()
1178 db->first_in_callback = 0; in dmfe_timer()
1179 db->timer.expires = DMFE_TIMER_WUT; in dmfe_timer()
1180 add_timer(&db->timer); in dmfe_timer()
1181 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1186 if (db->chip_id == PCI_DM9132_ID) in dmfe_timer()
1191 if ( ((db->chip_id == PCI_DM9102_ID) && in dmfe_timer()
1192 (db->chip_revision == 0x30)) || in dmfe_timer()
1193 ((db->chip_id == PCI_DM9132_ID) && in dmfe_timer()
1194 (db->chip_revision == 0x10)) ) { in dmfe_timer()
1213 dmfe_phy_read (db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_timer()
1214 link_ok_phy = (dmfe_phy_read (db->ioaddr, in dmfe_timer()
1215 db->phy_addr, 1, db->chip_id) & 0x4) ? 1 : 0; in dmfe_timer()
1229 if ( !(db->media_mode & 0x38) ) in dmfe_timer()
1230 dmfe_phy_write(db->ioaddr, db->phy_addr, in dmfe_timer()
1231 0, 0x1000, db->chip_id); in dmfe_timer()
1234 if (db->media_mode & DMFE_AUTO) { in dmfe_timer()
1236 db->cr6_data|=0x00040000; /* bit18=1, MII */ in dmfe_timer()
1237 db->cr6_data&=~0x00000200; /* bit9=0, HD mode */ in dmfe_timer()
1238 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1245 if ( !(db->media_mode & DMFE_AUTO) || !dmfe_sense_speed(db)) { in dmfe_timer()
1247 SHOW_MEDIA_TYPE(db->op_mode); in dmfe_timer()
1250 dmfe_process_mode(db); in dmfe_timer()
1254 if (db->HPNA_command & 0xf00) { in dmfe_timer()
1255 db->HPNA_timer--; in dmfe_timer()
1256 if (!db->HPNA_timer) in dmfe_timer()
1257 dmfe_HPNA_remote_cmd_chk(db); in dmfe_timer()
1261 db->timer.expires = DMFE_TIMER_WUT; in dmfe_timer()
1262 add_timer(&db->timer); in dmfe_timer()
1263 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1277 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_dynamic_reset() local
1278 void __iomem *ioaddr = db->ioaddr; in dmfe_dynamic_reset()
1283 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */ in dmfe_dynamic_reset()
1284 update_cr6(db->cr6_data, ioaddr); in dmfe_dynamic_reset()
1292 dmfe_free_rxbuffer(db); in dmfe_dynamic_reset()
1295 db->tx_packet_cnt = 0; in dmfe_dynamic_reset()
1296 db->tx_queue_cnt = 0; in dmfe_dynamic_reset()
1297 db->rx_avail_cnt = 0; in dmfe_dynamic_reset()
1299 db->wait_reset = 0; in dmfe_dynamic_reset()
1313 static void dmfe_free_rxbuffer(struct dmfe_board_info * db) in dmfe_free_rxbuffer() argument
1318 while (db->rx_avail_cnt) { in dmfe_free_rxbuffer()
1319 dev_kfree_skb(db->rx_ready_ptr->rx_skb_ptr); in dmfe_free_rxbuffer()
1320 db->rx_ready_ptr = db->rx_ready_ptr->next_rx_desc; in dmfe_free_rxbuffer()
1321 db->rx_avail_cnt--; in dmfe_free_rxbuffer()
1330 static void dmfe_reuse_skb(struct dmfe_board_info *db, struct sk_buff * skb) in dmfe_reuse_skb() argument
1332 struct rx_desc *rxptr = db->rx_insert_ptr; in dmfe_reuse_skb()
1336 rxptr->rdes2 = cpu_to_le32(dma_map_single(&db->pdev->dev, skb->data, in dmfe_reuse_skb()
1340 db->rx_avail_cnt++; in dmfe_reuse_skb()
1341 db->rx_insert_ptr = rxptr->next_rx_desc; in dmfe_reuse_skb()
1343 DMFE_DBUG(0, "SK Buffer reuse method error", db->rx_avail_cnt); in dmfe_reuse_skb()
1354 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_descriptor_init() local
1355 void __iomem *ioaddr = db->ioaddr; in dmfe_descriptor_init()
1366 db->tx_insert_ptr = db->first_tx_desc; in dmfe_descriptor_init()
1367 db->tx_remove_ptr = db->first_tx_desc; in dmfe_descriptor_init()
1368 dw32(DCR4, db->first_tx_desc_dma); /* TX DESC address */ in dmfe_descriptor_init()
1371 db->first_rx_desc = (void *)db->first_tx_desc + in dmfe_descriptor_init()
1374 db->first_rx_desc_dma = db->first_tx_desc_dma + in dmfe_descriptor_init()
1376 db->rx_insert_ptr = db->first_rx_desc; in dmfe_descriptor_init()
1377 db->rx_ready_ptr = db->first_rx_desc; in dmfe_descriptor_init()
1378 dw32(DCR3, db->first_rx_desc_dma); /* RX DESC address */ in dmfe_descriptor_init()
1381 tmp_buf = db->buf_pool_start; in dmfe_descriptor_init()
1382 tmp_buf_dma = db->buf_pool_dma_start; in dmfe_descriptor_init()
1383 tmp_tx_dma = db->first_tx_desc_dma; in dmfe_descriptor_init()
1384 for (tmp_tx = db->first_tx_desc, i = 0; i < TX_DESC_CNT; i++, tmp_tx++) { in dmfe_descriptor_init()
1395 (--tmp_tx)->tdes3 = cpu_to_le32(db->first_tx_desc_dma); in dmfe_descriptor_init()
1396 tmp_tx->next_tx_desc = db->first_tx_desc; in dmfe_descriptor_init()
1399 tmp_rx_dma=db->first_rx_desc_dma; in dmfe_descriptor_init()
1400 for (tmp_rx = db->first_rx_desc, i = 0; i < RX_DESC_CNT; i++, tmp_rx++) { in dmfe_descriptor_init()
1407 (--tmp_rx)->rdes3 = cpu_to_le32(db->first_rx_desc_dma); in dmfe_descriptor_init()
1408 tmp_rx->next_rx_desc = db->first_rx_desc; in dmfe_descriptor_init()
1439 struct dmfe_board_info *db = netdev_priv(dev); in dm9132_id_table() local
1440 void __iomem *ioaddr = db->ioaddr + 0xc0; in dm9132_id_table()
1477 struct dmfe_board_info *db = netdev_priv(dev); in send_filter_frame() local
1486 txptr = db->tx_insert_ptr; in send_filter_frame()
1515 db->tx_insert_ptr = txptr->next_tx_desc; in send_filter_frame()
1519 if (!db->tx_packet_cnt) { in send_filter_frame()
1520 void __iomem *ioaddr = db->ioaddr; in send_filter_frame()
1523 db->tx_packet_cnt++; in send_filter_frame()
1525 update_cr6(db->cr6_data | 0x2000, ioaddr); in send_filter_frame()
1527 update_cr6(db->cr6_data, ioaddr); in send_filter_frame()
1530 db->tx_queue_cnt++; /* Put in TX queue */ in send_filter_frame()
1541 struct dmfe_board_info *db = netdev_priv(dev); in allocate_rx_buffer() local
1545 rxptr = db->rx_insert_ptr; in allocate_rx_buffer()
1547 while(db->rx_avail_cnt < RX_DESC_CNT) { in allocate_rx_buffer()
1551 rxptr->rdes2 = cpu_to_le32(dma_map_single(&db->pdev->dev, skb->data, in allocate_rx_buffer()
1556 db->rx_avail_cnt++; in allocate_rx_buffer()
1559 db->rx_insert_ptr = rxptr; in allocate_rx_buffer()
1623 static u8 dmfe_sense_speed(struct dmfe_board_info *db) in dmfe_sense_speed() argument
1625 void __iomem *ioaddr = db->ioaddr; in dmfe_sense_speed()
1630 update_cr6(db->cr6_data & ~0x40000, ioaddr); in dmfe_sense_speed()
1632 phy_mode = dmfe_phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_sense_speed()
1633 phy_mode = dmfe_phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_sense_speed()
1636 if (db->chip_id == PCI_DM9132_ID) /* DM9132 */ in dmfe_sense_speed()
1637 phy_mode = dmfe_phy_read(db->ioaddr, in dmfe_sense_speed()
1638 db->phy_addr, 7, db->chip_id) & 0xf000; in dmfe_sense_speed()
1640 phy_mode = dmfe_phy_read(db->ioaddr, in dmfe_sense_speed()
1641 db->phy_addr, 17, db->chip_id) & 0xf000; in dmfe_sense_speed()
1643 case 0x1000: db->op_mode = DMFE_10MHF; break; in dmfe_sense_speed()
1644 case 0x2000: db->op_mode = DMFE_10MFD; break; in dmfe_sense_speed()
1645 case 0x4000: db->op_mode = DMFE_100MHF; break; in dmfe_sense_speed()
1646 case 0x8000: db->op_mode = DMFE_100MFD; break; in dmfe_sense_speed()
1647 default: db->op_mode = DMFE_10MHF; in dmfe_sense_speed()
1652 db->op_mode = DMFE_10MHF; in dmfe_sense_speed()
1667 static void dmfe_set_phyxcer(struct dmfe_board_info *db) in dmfe_set_phyxcer() argument
1669 void __iomem *ioaddr = db->ioaddr; in dmfe_set_phyxcer()
1673 db->cr6_data &= ~0x40000; in dmfe_set_phyxcer()
1674 update_cr6(db->cr6_data, ioaddr); in dmfe_set_phyxcer()
1677 if (db->chip_id == PCI_DM9009_ID) { in dmfe_set_phyxcer()
1678 phy_reg = dmfe_phy_read(db->ioaddr, in dmfe_set_phyxcer()
1679 db->phy_addr, 18, db->chip_id) & ~0x1000; in dmfe_set_phyxcer()
1681 dmfe_phy_write(db->ioaddr, in dmfe_set_phyxcer()
1682 db->phy_addr, 18, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1686 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; in dmfe_set_phyxcer()
1688 if (db->media_mode & DMFE_AUTO) { in dmfe_set_phyxcer()
1690 phy_reg |= db->PHY_reg4; in dmfe_set_phyxcer()
1693 switch(db->media_mode) { in dmfe_set_phyxcer()
1699 if (db->chip_id == PCI_DM9009_ID) phy_reg &= 0x61; in dmfe_set_phyxcer()
1704 phy_reg|=db->PHY_reg4; in dmfe_set_phyxcer()
1705 db->media_mode|=DMFE_AUTO; in dmfe_set_phyxcer()
1707 dmfe_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1710 if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) ) in dmfe_set_phyxcer()
1711 dmfe_phy_write(db->ioaddr, db->phy_addr, 0, 0x1800, db->chip_id); in dmfe_set_phyxcer()
1712 if ( !db->chip_type ) in dmfe_set_phyxcer()
1713 dmfe_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id); in dmfe_set_phyxcer()
1724 static void dmfe_process_mode(struct dmfe_board_info *db) in dmfe_process_mode() argument
1729 if (db->op_mode & 0x4) in dmfe_process_mode()
1730 db->cr6_data |= CR6_FDM; /* Set Full Duplex Bit */ in dmfe_process_mode()
1732 db->cr6_data &= ~CR6_FDM; /* Clear Full Duplex Bit */ in dmfe_process_mode()
1735 if (db->op_mode & 0x10) /* 1M HomePNA */ in dmfe_process_mode()
1736 db->cr6_data |= 0x40000;/* External MII select */ in dmfe_process_mode()
1738 db->cr6_data &= ~0x40000;/* Internal 10/100 transciver */ in dmfe_process_mode()
1740 update_cr6(db->cr6_data, db->ioaddr); in dmfe_process_mode()
1743 if ( !(db->media_mode & 0x18)) { in dmfe_process_mode()
1745 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 6, db->chip_id); in dmfe_process_mode()
1749 switch(db->op_mode) { in dmfe_process_mode()
1755 dmfe_phy_write(db->ioaddr, in dmfe_process_mode()
1756 db->phy_addr, 0, phy_reg, db->chip_id); in dmfe_process_mode()
1757 if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) ) in dmfe_process_mode()
1759 dmfe_phy_write(db->ioaddr, in dmfe_process_mode()
1760 db->phy_addr, 0, phy_reg, db->chip_id); in dmfe_process_mode()
1902 static void dmfe_parse_srom(struct dmfe_board_info * db) in dmfe_parse_srom() argument
1904 char * srom = db->srom; in dmfe_parse_srom()
1910 db->cr15_data = CR15_DEFAULT; in dmfe_parse_srom()
1916 db->NIC_capability = le16_to_cpup((__le16 *) (srom + 34)); in dmfe_parse_srom()
1917 db->PHY_reg4 = 0; in dmfe_parse_srom()
1919 switch( db->NIC_capability & tmp_reg ) { in dmfe_parse_srom()
1920 case 0x1: db->PHY_reg4 |= 0x0020; break; in dmfe_parse_srom()
1921 case 0x2: db->PHY_reg4 |= 0x0040; break; in dmfe_parse_srom()
1922 case 0x4: db->PHY_reg4 |= 0x0080; break; in dmfe_parse_srom()
1923 case 0x8: db->PHY_reg4 |= 0x0100; break; in dmfe_parse_srom()
1941 db->cr15_data |= 0x40; in dmfe_parse_srom()
1945 db->cr15_data |= 0x400; in dmfe_parse_srom()
1949 db->cr15_data |= 0x9800; in dmfe_parse_srom()
1953 db->HPNA_command = 1; in dmfe_parse_srom()
1957 db->HPNA_command |= 0x8000; in dmfe_parse_srom()
1962 case 0: db->HPNA_command |= 0x0904; break; in dmfe_parse_srom()
1963 case 1: db->HPNA_command |= 0x0a00; break; in dmfe_parse_srom()
1964 case 2: db->HPNA_command |= 0x0506; break; in dmfe_parse_srom()
1965 case 3: db->HPNA_command |= 0x0602; break; in dmfe_parse_srom()
1969 case 0: db->HPNA_command |= 0x0004; break; in dmfe_parse_srom()
1970 case 1: db->HPNA_command |= 0x0000; break; in dmfe_parse_srom()
1971 case 2: db->HPNA_command |= 0x0006; break; in dmfe_parse_srom()
1972 case 3: db->HPNA_command |= 0x0002; break; in dmfe_parse_srom()
1976 db->HPNA_present = 0; in dmfe_parse_srom()
1977 update_cr6(db->cr6_data | 0x40000, db->ioaddr); in dmfe_parse_srom()
1978 tmp_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 3, db->chip_id); in dmfe_parse_srom()
1981 db->HPNA_timer = 8; in dmfe_parse_srom()
1982 if ( dmfe_phy_read(db->ioaddr, db->phy_addr, 31, db->chip_id) == 0x4404) { in dmfe_parse_srom()
1984 db->HPNA_present = 1; in dmfe_parse_srom()
1985 dmfe_program_DM9801(db, tmp_reg); in dmfe_parse_srom()
1988 db->HPNA_present = 2; in dmfe_parse_srom()
1989 dmfe_program_DM9802(db); in dmfe_parse_srom()
2000 static void dmfe_program_DM9801(struct dmfe_board_info * db, int HPNA_rev) in dmfe_program_DM9801() argument
2007 db->HPNA_command |= 0x1000; in dmfe_program_DM9801()
2008 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 24, db->chip_id); in dmfe_program_DM9801()
2010 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2013 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9801()
2015 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2021 db->HPNA_command |= 0x1000; in dmfe_program_DM9801()
2022 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9801()
2024 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2028 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id); in dmfe_program_DM9801()
2029 dmfe_phy_write(db->ioaddr, db->phy_addr, 17, reg17, db->chip_id); in dmfe_program_DM9801()
2030 dmfe_phy_write(db->ioaddr, db->phy_addr, 25, reg25, db->chip_id); in dmfe_program_DM9801()
2038 static void dmfe_program_DM9802(struct dmfe_board_info * db) in dmfe_program_DM9802() argument
2043 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id); in dmfe_program_DM9802()
2044 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9802()
2046 dmfe_phy_write(db->ioaddr, db->phy_addr, 25, phy_reg, db->chip_id); in dmfe_program_DM9802()
2055 static void dmfe_HPNA_remote_cmd_chk(struct dmfe_board_info * db) in dmfe_HPNA_remote_cmd_chk() argument
2060 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id) & 0x60; in dmfe_HPNA_remote_cmd_chk()
2069 if ( phy_reg != (db->HPNA_command & 0x0f00) ) { in dmfe_HPNA_remote_cmd_chk()
2070 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, in dmfe_HPNA_remote_cmd_chk()
2071 db->chip_id); in dmfe_HPNA_remote_cmd_chk()
2072 db->HPNA_timer=8; in dmfe_HPNA_remote_cmd_chk()
2074 db->HPNA_timer=600; /* Match, every 10 minutes, check */ in dmfe_HPNA_remote_cmd_chk()
2091 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_suspend() local
2092 void __iomem *ioaddr = db->ioaddr; in dmfe_suspend()
2098 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); in dmfe_suspend()
2099 update_cr6(db->cr6_data, ioaddr); in dmfe_suspend()
2106 dmfe_free_rxbuffer(db); in dmfe_suspend()