Lines Matching refs:up
233 static void ip22zilog_maybe_update_regs(struct uart_ip22zilog_port *up, in ip22zilog_maybe_update_regs() argument
236 if (!ZS_REGS_HELD(up)) { in ip22zilog_maybe_update_regs()
237 if (ZS_TX_ACTIVE(up)) { in ip22zilog_maybe_update_regs()
238 up->flags |= IP22ZILOG_FLAG_REGS_HELD; in ip22zilog_maybe_update_regs()
240 __load_zsregs(channel, up->curregs); in ip22zilog_maybe_update_regs()
248 static bool ip22zilog_receive_chars(struct uart_ip22zilog_port *up, in ip22zilog_receive_chars() argument
253 bool push = up->port.state != NULL; in ip22zilog_receive_chars()
271 ch &= up->parity_mask; in ip22zilog_receive_chars()
275 r1 |= up->tty_break; in ip22zilog_receive_chars()
279 up->port.icount.rx++; in ip22zilog_receive_chars()
281 up->tty_break = 0; in ip22zilog_receive_chars()
284 up->port.icount.brk++; in ip22zilog_receive_chars()
290 up->port.icount.parity++; in ip22zilog_receive_chars()
292 up->port.icount.frame++; in ip22zilog_receive_chars()
294 up->port.icount.overrun++; in ip22zilog_receive_chars()
295 r1 &= up->port.read_status_mask; in ip22zilog_receive_chars()
304 if (uart_handle_sysrq_char(&up->port, ch)) in ip22zilog_receive_chars()
308 uart_insert_char(&up->port, r1, Rx_OVR, ch, flag); in ip22zilog_receive_chars()
313 static void ip22zilog_status_handle(struct uart_ip22zilog_port *up, in ip22zilog_status_handle() argument
325 if (up->curregs[R15] & BRKIE) { in ip22zilog_status_handle()
326 if ((status & BRK_ABRT) && !(up->prev_status & BRK_ABRT)) { in ip22zilog_status_handle()
327 if (uart_handle_break(&up->port)) in ip22zilog_status_handle()
328 up->tty_break = Rx_SYS; in ip22zilog_status_handle()
330 up->tty_break = Rx_BRK; in ip22zilog_status_handle()
334 if (ZS_WANTS_MODEM_STATUS(up)) { in ip22zilog_status_handle()
336 up->port.icount.dsr++; in ip22zilog_status_handle()
342 if ((status ^ up->prev_status) ^ DCD) in ip22zilog_status_handle()
343 uart_handle_dcd_change(&up->port, in ip22zilog_status_handle()
345 if ((status ^ up->prev_status) ^ CTS) in ip22zilog_status_handle()
346 uart_handle_cts_change(&up->port, in ip22zilog_status_handle()
349 wake_up_interruptible(&up->port.state->port.delta_msr_wait); in ip22zilog_status_handle()
352 up->prev_status = status; in ip22zilog_status_handle()
355 static void ip22zilog_transmit_chars(struct uart_ip22zilog_port *up, in ip22zilog_transmit_chars() argument
360 if (ZS_IS_CONS(up)) { in ip22zilog_transmit_chars()
376 up->flags &= ~IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
378 if (ZS_REGS_HELD(up)) { in ip22zilog_transmit_chars()
379 __load_zsregs(channel, up->curregs); in ip22zilog_transmit_chars()
380 up->flags &= ~IP22ZILOG_FLAG_REGS_HELD; in ip22zilog_transmit_chars()
383 if (ZS_TX_STOPPED(up)) { in ip22zilog_transmit_chars()
384 up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_transmit_chars()
388 if (up->port.x_char) { in ip22zilog_transmit_chars()
389 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
390 writeb(up->port.x_char, &channel->data); in ip22zilog_transmit_chars()
394 up->port.icount.tx++; in ip22zilog_transmit_chars()
395 up->port.x_char = 0; in ip22zilog_transmit_chars()
399 if (up->port.state == NULL) in ip22zilog_transmit_chars()
401 xmit = &up->port.state->xmit; in ip22zilog_transmit_chars()
404 if (uart_tx_stopped(&up->port)) in ip22zilog_transmit_chars()
407 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_transmit_chars()
413 up->port.icount.tx++; in ip22zilog_transmit_chars()
416 uart_write_wakeup(&up->port); in ip22zilog_transmit_chars()
428 struct uart_ip22zilog_port *up = dev_id; in ip22zilog_interrupt() local
430 while (up) { in ip22zilog_interrupt()
432 = ZILOG_CHANNEL_FROM_PORT(&up->port); in ip22zilog_interrupt()
436 spin_lock(&up->port.lock); in ip22zilog_interrupt()
446 push = ip22zilog_receive_chars(up, channel); in ip22zilog_interrupt()
448 ip22zilog_status_handle(up, channel); in ip22zilog_interrupt()
450 ip22zilog_transmit_chars(up, channel); in ip22zilog_interrupt()
452 spin_unlock(&up->port.lock); in ip22zilog_interrupt()
455 tty_flip_buffer_push(&up->port.state->port); in ip22zilog_interrupt()
458 up = up->next; in ip22zilog_interrupt()
459 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in ip22zilog_interrupt()
462 spin_lock(&up->port.lock); in ip22zilog_interrupt()
469 push = ip22zilog_receive_chars(up, channel); in ip22zilog_interrupt()
471 ip22zilog_status_handle(up, channel); in ip22zilog_interrupt()
473 ip22zilog_transmit_chars(up, channel); in ip22zilog_interrupt()
475 spin_unlock(&up->port.lock); in ip22zilog_interrupt()
478 tty_flip_buffer_push(&up->port.state->port); in ip22zilog_interrupt()
480 up = up->next; in ip22zilog_interrupt()
544 struct uart_ip22zilog_port *up = in ip22zilog_set_mctrl() local
561 up->curregs[R5] |= set_bits; in ip22zilog_set_mctrl()
562 up->curregs[R5] &= ~clear_bits; in ip22zilog_set_mctrl()
563 write_zsreg(channel, R5, up->curregs[R5]); in ip22zilog_set_mctrl()
569 struct uart_ip22zilog_port *up = in ip22zilog_stop_tx() local
572 up->flags |= IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_stop_tx()
578 struct uart_ip22zilog_port *up = in ip22zilog_start_tx() local
583 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; in ip22zilog_start_tx()
584 up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED; in ip22zilog_start_tx()
616 uart_write_wakeup(&up->port); in ip22zilog_start_tx()
623 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_stop_rx() local
626 if (ZS_IS_CONS(up)) in ip22zilog_stop_rx()
632 up->curregs[R1] &= ~RxINT_MASK; in ip22zilog_stop_rx()
633 ip22zilog_maybe_update_regs(up, channel); in ip22zilog_stop_rx()
639 struct uart_ip22zilog_port *up = in ip22zilog_enable_ms() local
644 new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); in ip22zilog_enable_ms()
645 if (new_reg != up->curregs[R15]) { in ip22zilog_enable_ms()
646 up->curregs[R15] = new_reg; in ip22zilog_enable_ms()
649 write_zsreg(channel, R15, up->curregs[R15]); in ip22zilog_enable_ms()
656 struct uart_ip22zilog_port *up = in ip22zilog_break_ctl() local
671 new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; in ip22zilog_break_ctl()
672 if (new_reg != up->curregs[R5]) { in ip22zilog_break_ctl()
673 up->curregs[R5] = new_reg; in ip22zilog_break_ctl()
676 write_zsreg(channel, R5, up->curregs[R5]); in ip22zilog_break_ctl()
682 static void __ip22zilog_reset(struct uart_ip22zilog_port *up) in __ip22zilog_reset() argument
687 if (up->flags & IP22ZILOG_FLAG_RESET_DONE) in __ip22zilog_reset()
691 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_reset()
699 if (!ZS_IS_CHANNEL_A(up)) { in __ip22zilog_reset()
700 up++; in __ip22zilog_reset()
701 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_reset()
707 up->flags |= IP22ZILOG_FLAG_RESET_DONE; in __ip22zilog_reset()
708 up->next->flags |= IP22ZILOG_FLAG_RESET_DONE; in __ip22zilog_reset()
711 static void __ip22zilog_startup(struct uart_ip22zilog_port *up) in __ip22zilog_startup() argument
715 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); in __ip22zilog_startup()
717 __ip22zilog_reset(up); in __ip22zilog_startup()
719 __load_zsregs(channel, up->curregs); in __ip22zilog_startup()
721 write_zsreg(channel, R9, up->curregs[R9]); in __ip22zilog_startup()
722 up->prev_status = readb(&channel->control); in __ip22zilog_startup()
725 up->curregs[R3] |= RxENAB; in __ip22zilog_startup()
726 up->curregs[R5] |= TxENAB; in __ip22zilog_startup()
728 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __ip22zilog_startup()
729 ip22zilog_maybe_update_regs(up, channel); in __ip22zilog_startup()
734 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_startup() local
737 if (ZS_IS_CONS(up)) in ip22zilog_startup()
741 __ip22zilog_startup(up); in ip22zilog_startup()
773 struct uart_ip22zilog_port *up = UART_ZILOG(port); in ip22zilog_shutdown() local
777 if (ZS_IS_CONS(up)) in ip22zilog_shutdown()
785 up->curregs[R3] &= ~RxENAB; in ip22zilog_shutdown()
786 up->curregs[R5] &= ~TxENAB; in ip22zilog_shutdown()
789 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in ip22zilog_shutdown()
790 up->curregs[R5] &= ~SND_BRK; in ip22zilog_shutdown()
791 ip22zilog_maybe_update_regs(up, channel); in ip22zilog_shutdown()
800 ip22zilog_convert_to_zs(struct uart_ip22zilog_port *up, unsigned int cflag, in ip22zilog_convert_to_zs() argument
804 up->curregs[R10] = NRZ; in ip22zilog_convert_to_zs()
805 up->curregs[R11] = TCBR | RCBR; in ip22zilog_convert_to_zs()
808 up->curregs[R4] &= ~XCLK_MASK; in ip22zilog_convert_to_zs()
809 up->curregs[R4] |= X16CLK; in ip22zilog_convert_to_zs()
810 up->curregs[R12] = brg & 0xff; in ip22zilog_convert_to_zs()
811 up->curregs[R13] = (brg >> 8) & 0xff; in ip22zilog_convert_to_zs()
812 up->curregs[R14] = BRENAB; in ip22zilog_convert_to_zs()
815 up->curregs[3] &= ~RxN_MASK; in ip22zilog_convert_to_zs()
816 up->curregs[5] &= ~TxN_MASK; in ip22zilog_convert_to_zs()
819 up->curregs[3] |= Rx5; in ip22zilog_convert_to_zs()
820 up->curregs[5] |= Tx5; in ip22zilog_convert_to_zs()
821 up->parity_mask = 0x1f; in ip22zilog_convert_to_zs()
824 up->curregs[3] |= Rx6; in ip22zilog_convert_to_zs()
825 up->curregs[5] |= Tx6; in ip22zilog_convert_to_zs()
826 up->parity_mask = 0x3f; in ip22zilog_convert_to_zs()
829 up->curregs[3] |= Rx7; in ip22zilog_convert_to_zs()
830 up->curregs[5] |= Tx7; in ip22zilog_convert_to_zs()
831 up->parity_mask = 0x7f; in ip22zilog_convert_to_zs()
835 up->curregs[3] |= Rx8; in ip22zilog_convert_to_zs()
836 up->curregs[5] |= Tx8; in ip22zilog_convert_to_zs()
837 up->parity_mask = 0xff; in ip22zilog_convert_to_zs()
840 up->curregs[4] &= ~0x0c; in ip22zilog_convert_to_zs()
842 up->curregs[4] |= SB2; in ip22zilog_convert_to_zs()
844 up->curregs[4] |= SB1; in ip22zilog_convert_to_zs()
846 up->curregs[4] |= PAR_ENAB; in ip22zilog_convert_to_zs()
848 up->curregs[4] &= ~PAR_ENAB; in ip22zilog_convert_to_zs()
850 up->curregs[4] |= PAR_EVEN; in ip22zilog_convert_to_zs()
852 up->curregs[4] &= ~PAR_EVEN; in ip22zilog_convert_to_zs()
854 up->port.read_status_mask = Rx_OVR; in ip22zilog_convert_to_zs()
856 up->port.read_status_mask |= CRC_ERR | PAR_ERR; in ip22zilog_convert_to_zs()
858 up->port.read_status_mask |= BRK_ABRT; in ip22zilog_convert_to_zs()
860 up->port.ignore_status_mask = 0; in ip22zilog_convert_to_zs()
862 up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; in ip22zilog_convert_to_zs()
864 up->port.ignore_status_mask |= BRK_ABRT; in ip22zilog_convert_to_zs()
866 up->port.ignore_status_mask |= Rx_OVR; in ip22zilog_convert_to_zs()
870 up->port.ignore_status_mask = 0xff; in ip22zilog_convert_to_zs()
878 struct uart_ip22zilog_port *up = in ip22zilog_set_termios() local
885 spin_lock_irqsave(&up->port.lock, flags); in ip22zilog_set_termios()
889 ip22zilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); in ip22zilog_set_termios()
891 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) in ip22zilog_set_termios()
892 up->flags |= IP22ZILOG_FLAG_MODEM_STATUS; in ip22zilog_set_termios()
894 up->flags &= ~IP22ZILOG_FLAG_MODEM_STATUS; in ip22zilog_set_termios()
896 ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); in ip22zilog_set_termios()
899 spin_unlock_irqrestore(&up->port.lock, flags); in ip22zilog_set_termios()
1018 struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index]; in ip22zilog_console_write() local
1021 spin_lock_irqsave(&up->port.lock, flags); in ip22zilog_console_write()
1022 uart_console_write(&up->port, s, count, ip22zilog_put_char); in ip22zilog_console_write()
1024 spin_unlock_irqrestore(&up->port.lock, flags); in ip22zilog_console_write()
1029 struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index]; in ip22zilog_console_setup() local
1035 up->flags |= IP22ZILOG_FLAG_IS_CONS; in ip22zilog_console_setup()
1039 spin_lock_irqsave(&up->port.lock, flags); in ip22zilog_console_setup()
1041 up->curregs[R15] |= BRKIE; in ip22zilog_console_setup()
1043 __ip22zilog_startup(up); in ip22zilog_console_setup()
1045 spin_unlock_irqrestore(&up->port.lock, flags); in ip22zilog_console_setup()
1049 return uart_set_options(&up->port, con, baud, parity, bits, flow); in ip22zilog_console_setup()
1080 struct uart_ip22zilog_port *up; in ip22zilog_prepare() local
1091 up = &ip22zilog_port_table[0]; in ip22zilog_prepare()
1093 up[channel].next = &up[channel - 1]; in ip22zilog_prepare()
1094 up[channel].next = NULL; in ip22zilog_prepare()
1100 up[(chip * 2) + 0].port.membase = (char *) &rp->channelB; in ip22zilog_prepare()
1101 up[(chip * 2) + 1].port.membase = (char *) &rp->channelA; in ip22zilog_prepare()
1104 up[(chip * 2) + 0].port.mapbase = in ip22zilog_prepare()
1106 up[(chip * 2) + 1].port.mapbase = in ip22zilog_prepare()
1111 up[(chip * 2) + 0].port.iotype = UPIO_MEM; in ip22zilog_prepare()
1112 up[(chip * 2) + 0].port.irq = zilog_irq; in ip22zilog_prepare()
1113 up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; in ip22zilog_prepare()
1114 up[(chip * 2) + 0].port.fifosize = 1; in ip22zilog_prepare()
1115 up[(chip * 2) + 0].port.has_sysrq = sysrq_on; in ip22zilog_prepare()
1116 up[(chip * 2) + 0].port.ops = &ip22zilog_pops; in ip22zilog_prepare()
1117 up[(chip * 2) + 0].port.type = PORT_IP22ZILOG; in ip22zilog_prepare()
1118 up[(chip * 2) + 0].port.flags = 0; in ip22zilog_prepare()
1119 up[(chip * 2) + 0].port.line = (chip * 2) + 0; in ip22zilog_prepare()
1120 up[(chip * 2) + 0].flags = 0; in ip22zilog_prepare()
1123 up[(chip * 2) + 1].port.iotype = UPIO_MEM; in ip22zilog_prepare()
1124 up[(chip * 2) + 1].port.irq = zilog_irq; in ip22zilog_prepare()
1125 up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; in ip22zilog_prepare()
1126 up[(chip * 2) + 1].port.fifosize = 1; in ip22zilog_prepare()
1127 up[(chip * 2) + 1].port.has_sysrq = sysrq_on; in ip22zilog_prepare()
1128 up[(chip * 2) + 1].port.ops = &ip22zilog_pops; in ip22zilog_prepare()
1129 up[(chip * 2) + 1].port.type = PORT_IP22ZILOG; in ip22zilog_prepare()
1130 up[(chip * 2) + 1].port.line = (chip * 2) + 1; in ip22zilog_prepare()
1131 up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A; in ip22zilog_prepare()
1135 struct uart_ip22zilog_port *up = &ip22zilog_port_table[channel]; in ip22zilog_prepare() local
1139 up->parity_mask = 0xff; in ip22zilog_prepare()
1140 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in ip22zilog_prepare()
1141 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in ip22zilog_prepare()
1142 up->curregs[R3] = RxENAB | Rx8; in ip22zilog_prepare()
1143 up->curregs[R5] = TxENAB | Tx8; in ip22zilog_prepare()
1144 up->curregs[R9] = NV | MIE; in ip22zilog_prepare()
1145 up->curregs[R10] = NRZ; in ip22zilog_prepare()
1146 up->curregs[R11] = TCBR | RCBR; in ip22zilog_prepare()
1148 up->curregs[R12] = (brg & 0xff); in ip22zilog_prepare()
1149 up->curregs[R13] = (brg >> 8) & 0xff; in ip22zilog_prepare()
1150 up->curregs[R14] = BRENAB; in ip22zilog_prepare()
1172 struct uart_ip22zilog_port *up = &ip22zilog_port_table[i]; in ip22zilog_ports_init() local
1174 uart_add_one_port(&ip22zilog_reg, &up->port); in ip22zilog_ports_init()
1193 struct uart_ip22zilog_port *up; in ip22zilog_exit() local
1196 up = &ip22zilog_port_table[i]; in ip22zilog_exit()
1198 uart_remove_one_port(&ip22zilog_reg, &up->port); in ip22zilog_exit()
1202 up = &ip22zilog_port_table[0]; in ip22zilog_exit()
1204 if (up[(i * 2) + 0].port.mapbase) { in ip22zilog_exit()
1205 iounmap((void*)up[(i * 2) + 0].port.mapbase); in ip22zilog_exit()
1206 up[(i * 2) + 0].port.mapbase = 0; in ip22zilog_exit()
1208 if (up[(i * 2) + 1].port.mapbase) { in ip22zilog_exit()
1209 iounmap((void*)up[(i * 2) + 1].port.mapbase); in ip22zilog_exit()
1210 up[(i * 2) + 1].port.mapbase = 0; in ip22zilog_exit()