124 	void __iomem	*mmio_base;  member
143 	uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA);  in pxa27x_ohci_select_pmm()
144 	uint32_t uhcrhdb = __raw_readl(pxa_ohci->mmio_base + UHCRHDB);  in pxa27x_ohci_select_pmm()
168 	__raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA);  in pxa27x_ohci_select_pmm()
169 	__raw_writel(uhcrhdb, pxa_ohci->mmio_base + UHCRHDB);  in pxa27x_ohci_select_pmm()
224 	uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR);  in pxa27x_setup_hc()
225 	uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA);  in pxa27x_setup_hc()
257 	__raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR);  in pxa27x_setup_hc()
258 	__raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA);  in pxa27x_setup_hc()
263 	uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR);  in pxa27x_reset_hc()
265 	__raw_writel(uhchr | UHCHR_FHR, pxa_ohci->mmio_base + UHCHR);  in pxa27x_reset_hc()
267 	__raw_writel(uhchr & ~UHCHR_FHR, pxa_ohci->mmio_base + UHCHR);  in pxa27x_reset_hc()
291 	uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR) | UHCHR_FSBIR;  in pxa27x_start_hc()
292 	__raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR);  in pxa27x_start_hc()
294 	while (__raw_readl(pxa_ohci->mmio_base + UHCHR) & UHCHR_FSBIR)  in pxa27x_start_hc()
310 	uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR) & ~UHCHR_SSE;  in pxa27x_start_hc()
311 	__raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR);  in pxa27x_start_hc()
312 	__raw_writel(UHCHIE_UPRIE | UHCHIE_RWIE, pxa_ohci->mmio_base + UHCHIE);  in pxa27x_start_hc()
336 	uhccoms = __raw_readl(pxa_ohci->mmio_base + UHCCOMS) | 0x01;  in pxa27x_stop_hc()
337 	__raw_writel(uhccoms, pxa_ohci->mmio_base + UHCCOMS);  in pxa27x_stop_hc()
466 	pxa_ohci->mmio_base = (void __iomem *)hcd->regs;  in ohci_hcd_pxa27x_probe()