Lines Matching refs:pcr
89 #define rtsx_pci_writel(pcr, reg, value) \ argument
90 iowrite32(value, (pcr)->remap_addr + reg)
91 #define rtsx_pci_readl(pcr, reg) \ argument
92 ioread32((pcr)->remap_addr + reg)
93 #define rtsx_pci_writew(pcr, reg, value) \ argument
94 iowrite16(value, (pcr)->remap_addr + reg)
95 #define rtsx_pci_readw(pcr, reg) \ argument
96 ioread16((pcr)->remap_addr + reg)
97 #define rtsx_pci_writeb(pcr, reg, value) \ argument
98 iowrite8(value, (pcr)->remap_addr + reg)
99 #define rtsx_pci_readb(pcr, reg) \ argument
100 ioread8((pcr)->remap_addr + reg)
1044 #define rtsx_pci_init_cmd(pcr) ((pcr)->ci = 0) argument
1052 struct rtsx_pcr *pcr; member
1056 int (*write_phy)(struct rtsx_pcr *pcr, u8 addr, u16 val);
1057 int (*read_phy)(struct rtsx_pcr *pcr, u8 addr, u16 *val);
1058 int (*extra_init_hw)(struct rtsx_pcr *pcr);
1059 int (*optimize_phy)(struct rtsx_pcr *pcr);
1060 int (*turn_on_led)(struct rtsx_pcr *pcr);
1061 int (*turn_off_led)(struct rtsx_pcr *pcr);
1062 int (*enable_auto_blink)(struct rtsx_pcr *pcr);
1063 int (*disable_auto_blink)(struct rtsx_pcr *pcr);
1064 int (*card_power_on)(struct rtsx_pcr *pcr, int card);
1065 int (*card_power_off)(struct rtsx_pcr *pcr, int card);
1066 int (*switch_output_voltage)(struct rtsx_pcr *pcr,
1068 unsigned int (*cd_deglitch)(struct rtsx_pcr *pcr);
1070 void (*fetch_vendor_settings)(struct rtsx_pcr *pcr);
1071 void (*force_power_down)(struct rtsx_pcr *pcr, u8 pm_state);
1072 void (*stop_cmd)(struct rtsx_pcr *pcr);
1074 void (*set_aspm)(struct rtsx_pcr *pcr, bool enable);
1075 void (*set_l1off_cfg_sub_d0)(struct rtsx_pcr *pcr, int active);
1076 void (*enable_ocp)(struct rtsx_pcr *pcr);
1077 void (*disable_ocp)(struct rtsx_pcr *pcr);
1078 void (*init_ocp)(struct rtsx_pcr *pcr);
1079 void (*process_ocp)(struct rtsx_pcr *pcr);
1080 int (*get_ocpstat)(struct rtsx_pcr *pcr, u8 *val);
1081 void (*clear_ocpstat)(struct rtsx_pcr *pcr);
1243 #define CHK_PCI_PID(pcr, pid) ((pcr)->pci->device == (pid)) argument
1244 #define PCI_VID(pcr) ((pcr)->pci->vendor) argument
1245 #define PCI_PID(pcr) ((pcr)->pci->device) argument
1246 #define is_version(pcr, pid, ver) \ argument
1247 (CHK_PCI_PID(pcr, pid) && (pcr)->ic_version == (ver))
1248 #define pcr_dbg(pcr, fmt, arg...) \ argument
1249 dev_dbg(&(pcr)->pci->dev, fmt, ##arg)
1254 #define SDR104_TX_PHASE(pcr) SDR104_PHASE((pcr)->tx_initial_phase) argument
1255 #define SDR50_TX_PHASE(pcr) SDR50_PHASE((pcr)->tx_initial_phase) argument
1256 #define DDR50_TX_PHASE(pcr) DDR50_PHASE((pcr)->tx_initial_phase) argument
1257 #define SDR104_RX_PHASE(pcr) SDR104_PHASE((pcr)->rx_initial_phase) argument
1258 #define SDR50_RX_PHASE(pcr) SDR50_PHASE((pcr)->rx_initial_phase) argument
1259 #define DDR50_RX_PHASE(pcr) DDR50_PHASE((pcr)->rx_initial_phase) argument
1263 void rtsx_pci_start_run(struct rtsx_pcr *pcr);
1264 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data);
1265 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data);
1266 int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
1267 int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
1268 void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr);
1269 void rtsx_pci_add_cmd(struct rtsx_pcr *pcr,
1271 void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr);
1272 int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout);
1273 int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist,
1275 int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
1277 void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
1279 int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
1281 int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
1282 int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
1283 int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card);
1284 int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card);
1285 int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock,
1287 int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card);
1288 int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card);
1289 int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card);
1290 int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage);
1291 unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr);
1292 void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr);
1294 static inline u8 *rtsx_pci_get_cmd_data(struct rtsx_pcr *pcr) in rtsx_pci_get_cmd_data() argument
1296 return (u8 *)(pcr->host_cmds_ptr); in rtsx_pci_get_cmd_data()
1299 static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val) in rtsx_pci_write_be32() argument
1301 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg, 0xFF, val >> 24); in rtsx_pci_write_be32()
1302 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16); in rtsx_pci_write_be32()
1303 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 8); in rtsx_pci_write_be32()
1304 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val); in rtsx_pci_write_be32()
1307 static inline int rtsx_pci_update_phy(struct rtsx_pcr *pcr, u8 addr, in rtsx_pci_update_phy() argument
1313 err = rtsx_pci_read_phy_register(pcr, addr, &val); in rtsx_pci_update_phy()
1317 return rtsx_pci_write_phy_register(pcr, addr, (val & mask) | append); in rtsx_pci_update_phy()