Lines Matching refs:BA0_MIDCR
271 #define BA0_MIDCR 0x0490 /* MIDI Control */ macro
1611 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr | BA0_MIDCR_MRST); in snd_cs4281_midi_reset()
1613 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_reset()
1626 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_open()
1642 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_close()
1660 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_open()
1676 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_close()
1692 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1697 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1722 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1727 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1823 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_interrupt()
1946 BA0_MIDCR,