Lines Matching refs:regmap
24 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ffe); in mt6359_set_playback_gpio()
25 regmap_write(priv->regmap, MT6359_GPIO_MODE2_SET, 0x0249); in mt6359_set_playback_gpio()
28 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x6); in mt6359_set_playback_gpio()
29 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x1); in mt6359_set_playback_gpio()
39 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ff8); in mt6359_reset_playback_gpio()
40 regmap_update_bits(priv->regmap, MT6359_GPIO_DIR0, 0x7 << 9, 0x0); in mt6359_reset_playback_gpio()
46 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x0e00); in mt6359_set_capture_gpio()
47 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x0200); in mt6359_set_capture_gpio()
49 regmap_write(priv->regmap, MT6359_GPIO_MODE4_CLR, 0x003f); in mt6359_set_capture_gpio()
50 regmap_write(priv->regmap, MT6359_GPIO_MODE4_SET, 0x0009); in mt6359_set_capture_gpio()
61 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x0e00); in mt6359_reset_capture_gpio()
63 regmap_write(priv->regmap, MT6359_GPIO_MODE4_CLR, 0x003f); in mt6359_reset_capture_gpio()
65 regmap_update_bits(priv->regmap, MT6359_GPIO_DIR0, in mt6359_reset_capture_gpio()
67 regmap_update_bits(priv->regmap, MT6359_GPIO_DIR1, in mt6359_reset_capture_gpio()
73 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON13, in mt6359_set_decoder_clk()
83 regmap_update_bits(priv->regmap, in mt6359_mtkaif_tx_enable()
87 regmap_update_bits(priv->regmap, in mt6359_mtkaif_tx_enable()
90 regmap_update_bits(priv->regmap, in mt6359_mtkaif_tx_enable()
96 regmap_update_bits(priv->regmap, in mt6359_mtkaif_tx_enable()
100 regmap_update_bits(priv->regmap, in mt6359_mtkaif_tx_enable()
107 regmap_update_bits(priv->regmap, in mt6359_mtkaif_tx_enable()
111 regmap_update_bits(priv->regmap, in mt6359_mtkaif_tx_enable()
121 regmap_update_bits(priv->regmap, MT6359_AFE_AUD_PAD_TOP, in mt6359_mtkaif_tx_disable()
127 regmap_write(priv->regmap, MT6359_ZCD_CON0, 0x0000); in zcd_disable()
138 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1, in hp_main_output_ramp()
141 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1, in hp_main_output_ramp()
156 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON9, in hp_aux_feedback_loop_gain_ramp()
172 regmap_update_bits(priv->regmap, in hp_in_pair_current()
186 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON2, in hp_pull_down()
193 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON2, in hp_pull_down()
232 regmap_update_bits(priv->regmap, in headset_volume_ramp()
261 regmap_read(priv->regmap, MT6359_ZCD_CON2, ®); in mt6359_put_volsw()
268 regmap_read(priv->regmap, MT6359_ZCD_CON1, ®); in mt6359_put_volsw()
275 regmap_read(priv->regmap, MT6359_ZCD_CON3, ®); in mt6359_put_volsw()
280 regmap_read(priv->regmap, MT6359_AUDENC_ANA_CON0, ®); in mt6359_put_volsw()
285 regmap_read(priv->regmap, MT6359_AUDENC_ANA_CON1, ®); in mt6359_put_volsw()
290 regmap_read(priv->regmap, MT6359_AUDENC_ANA_CON2, ®); in mt6359_put_volsw()
629 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON2, 0x0006); in mt_sgen_event()
631 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON0, 0xcba1); in mt_sgen_event()
633 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON2, 0x0003); in mt_sgen_event()
635 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON2, 0x000b); in mt_sgen_event()
637 regmap_update_bits(priv->regmap, MT6359_AFE_SGEN_CFG0, in mt_sgen_event()
640 regmap_update_bits(priv->regmap, MT6359_AFE_SGEN_CFG1, in mt_sgen_event()
646 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON2, 0x0000); in mt_sgen_event()
647 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON0, 0xcba0); in mt_sgen_event()
660 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON11, in mtk_hp_enable()
665 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12, in mtk_hp_enable()
668 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12, in mtk_hp_enable()
673 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON11, in mtk_hp_enable()
678 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12, in mtk_hp_enable()
681 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12, in mtk_hp_enable()
688 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON10, 0x0087); in mtk_hp_enable()
693 regmap_update_bits(priv->regmap, in mtk_hp_enable()
698 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON4, 0x0000); in mtk_hp_enable()
701 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON2, 0xf133); in mtk_hp_enable()
704 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x000c); in mtk_hp_enable()
706 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x003c); in mtk_hp_enable()
708 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0c00); in mtk_hp_enable()
710 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x30c0); in mtk_hp_enable()
712 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x30f0); in mtk_hp_enable()
714 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x00fc); in mtk_hp_enable()
720 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0e00); in mtk_hp_enable()
722 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0200); in mtk_hp_enable()
725 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x00ff); in mtk_hp_enable()
732 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x77cf); in mtk_hp_enable()
740 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x77c3); in mtk_hp_enable()
742 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x7703); in mtk_hp_enable()
749 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x30ff); in mtk_hp_enable()
752 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0xf201); in mtk_hp_enable()
755 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0xf200); in mtk_hp_enable()
760 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x32ff); in mtk_hp_enable()
762 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x3aff); in mtk_hp_enable()
774 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0, in mtk_hp_disable()
778 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON9, in mtk_hp_disable()
782 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0, in mtk_hp_disable()
789 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x77c3); in mtk_hp_disable()
791 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x77cf); in mtk_hp_disable()
799 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x77ff); in mtk_hp_disable()
808 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1, 0x3, 0x0); in mtk_hp_disable()
811 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0e01); in mtk_hp_disable()
814 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0c01); in mtk_hp_disable()
820 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1, in mtk_hp_disable()
824 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0, in mtk_hp_disable()
828 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0, in mtk_hp_disable()
832 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x201); in mtk_hp_disable()
835 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1, in mtk_hp_disable()
839 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON1, in mtk_hp_disable()
886 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON6, 0x0010); in mt_rcv_event()
889 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON11, in mt_rcv_event()
894 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12, in mt_rcv_event()
897 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12, in mt_rcv_event()
902 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON6, 0x0090); in mt_rcv_event()
905 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON10, 0x7000); in mt_rcv_event()
908 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON6, 0x0092); in mt_rcv_event()
910 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON6, 0x0093); in mt_rcv_event()
913 regmap_write(priv->regmap, MT6359_ZCD_CON3, in mt_rcv_event()
920 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON0, 0x0009); in mt_rcv_event()
922 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON9, 0x0001); in mt_rcv_event()
924 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON6, 0x009b); in mt_rcv_event()
928 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON6, in mt_rcv_event()
933 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0, in mt_rcv_event()
940 regmap_write(priv->regmap, MT6359_ZCD_CON3, DL_GAIN_N_40DB); in mt_rcv_event()
943 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON6, in mt_rcv_event()
947 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON6, in mt_rcv_event()
970 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x0010); in mt_lo_event()
973 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON11, in mt_lo_event()
979 regmap_update_bits(priv->regmap, in mt_lo_event()
984 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON12, in mt_lo_event()
989 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x0110); in mt_lo_event()
992 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x0112); in mt_lo_event()
994 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x0113); in mt_lo_event()
997 regmap_write(priv->regmap, MT6359_ZCD_CON1, in mt_lo_event()
1004 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x3113); in mt_lo_event()
1007 regmap_write(priv->regmap, in mt_lo_event()
1010 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON7, 0x311b); in mt_lo_event()
1014 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON7, in mt_lo_event()
1019 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0, in mt_lo_event()
1026 regmap_write(priv->regmap, MT6359_ZCD_CON1, DL_GAIN_N_40DB); in mt_lo_event()
1029 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON7, in mt_lo_event()
1033 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON7, in mt_lo_event()
1055 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5, in mt_adc_clk_gen_event()
1058 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5, in mt_adc_clk_gen_event()
1060 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5, in mt_adc_clk_gen_event()
1062 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5, in mt_adc_clk_gen_event()
1067 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5, in mt_adc_clk_gen_event()
1069 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5, in mt_adc_clk_gen_event()
1071 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5, in mt_adc_clk_gen_event()
1073 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON5, in mt_adc_clk_gen_event()
1096 regmap_update_bits(priv->regmap, MT6359_AFE_DCCLK_CFG0, in mt_dcc_clk_event()
1098 regmap_update_bits(priv->regmap, MT6359_AFE_DCCLK_CFG0, in mt_dcc_clk_event()
1100 regmap_update_bits(priv->regmap, MT6359_AFE_DCCLK_CFG0, in mt_dcc_clk_event()
1103 regmap_write(priv->regmap, MT6359_AFE_DCCLK_CFG1, 0x0100); in mt_dcc_clk_event()
1106 regmap_update_bits(priv->regmap, MT6359_AFE_DCCLK_CFG0, in mt_dcc_clk_event()
1108 regmap_update_bits(priv->regmap, MT6359_AFE_DCCLK_CFG0, in mt_dcc_clk_event()
1133 regmap_update_bits(priv->regmap, in mt_mic_bias_0_event()
1138 regmap_update_bits(priv->regmap, in mt_mic_bias_0_event()
1143 regmap_update_bits(priv->regmap, in mt_mic_bias_0_event()
1150 regmap_write(priv->regmap, in mt_mic_bias_0_event()
1153 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON15, in mt_mic_bias_0_event()
1157 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON15, in mt_mic_bias_0_event()
1163 regmap_write(priv->regmap, MT6359_AUDENC_ANA_CON15, 0x0000); in mt_mic_bias_0_event()
1187 regmap_write(priv->regmap, in mt_mic_bias_1_event()
1190 regmap_write(priv->regmap, in mt_mic_bias_1_event()
1194 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON16, in mt_mic_bias_1_event()
1220 regmap_update_bits(priv->regmap, in mt_mic_bias_2_event()
1225 regmap_update_bits(priv->regmap, in mt_mic_bias_2_event()
1230 regmap_update_bits(priv->regmap, in mt_mic_bias_2_event()
1237 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON17, in mt_mic_bias_2_event()
1241 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON17, in mt_mic_bias_2_event()
1247 regmap_write(priv->regmap, MT6359_AUDENC_ANA_CON17, 0x0000); in mt_mic_bias_2_event()
1292 regmap_write(priv->regmap, MT6359_AFE_UL_SRC_CON0_H, in mt_ul_src_dmic_event()
1295 regmap_write(priv->regmap, MT6359_AFE_UL_SRC_CON0_H, in mt_ul_src_dmic_event()
1298 regmap_update_bits(priv->regmap, MT6359_AFE_UL_SRC_CON0_L, in mt_ul_src_dmic_event()
1302 regmap_write(priv->regmap, in mt_ul_src_dmic_event()
1324 regmap_write(priv->regmap, in mt_ul_src_34_dmic_event()
1326 regmap_update_bits(priv->regmap, MT6359_AFE_ADDA6_UL_SRC_CON0_L, in mt_ul_src_34_dmic_event()
1330 regmap_write(priv->regmap, in mt_ul_src_34_dmic_event()
1353 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON0, in mt_adc_l_event()
1377 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON1, in mt_adc_r_event()
1401 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON2, in mt_adc_3_event()
1478 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON0, in mt_pga_l_event()
1485 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON0, in mt_pga_l_event()
1491 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON0, in mt_pga_l_event()
1498 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON0, in mt_pga_l_event()
1537 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON1, in mt_pga_r_event()
1544 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON1, in mt_pga_r_event()
1550 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON1, in mt_pga_r_event()
1557 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON1, in mt_pga_r_event()
1593 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON2, in mt_pga_3_event()
1600 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON2, in mt_pga_3_event()
1606 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON2, in mt_pga_3_event()
1613 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON2, in mt_pga_3_event()
1688 regmap_write(priv->regmap, MT6359_ZCD_CON2, DL_GAIN_N_22DB_REG); in mt_hp_mute_event()
1692 regmap_write(priv->regmap, MT6359_ZCD_CON2, DL_GAIN_N_40DB_REG); in mt_hp_mute_event()
1712 regmap_write(priv->regmap, MT6359_AUDDEC_ANA_CON10, 0x0000); in mt_hp_damp_event()
1731 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON2, in mt_esd_resist_event()
1738 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON2, in mt_esd_resist_event()
1758 regmap_update_bits(priv->regmap, MT6359_AFUNC_AUD_CON2, in mt_sdm_event()
1761 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON0, 0xcba1); in mt_sdm_event()
1763 regmap_update_bits(priv->regmap, MT6359_AFUNC_AUD_CON2, in mt_sdm_event()
1766 regmap_update_bits(priv->regmap, MT6359_AFUNC_AUD_CON2, in mt_sdm_event()
1771 regmap_update_bits(priv->regmap, MT6359_AFUNC_AUD_CON2, in mt_sdm_event()
1773 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON0, 0xcba0); in mt_sdm_event()
1792 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON11, 0x0006); in mt_sdm_3rd_event()
1794 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON9, 0xcba1); in mt_sdm_3rd_event()
1796 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON11, 0x0003); in mt_sdm_3rd_event()
1798 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON11, 0x000b); in mt_sdm_3rd_event()
1802 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON11, 0x0000); in mt_sdm_3rd_event()
1803 regmap_write(priv->regmap, MT6359_AFUNC_AUD_CON9, 0xcba0); in mt_sdm_3rd_event()
1821 regmap_write(priv->regmap, MT6359_AFE_NCP_CFG0, 0xc800); in mt_ncp_event()
2535 regmap_update_bits(priv->regmap, MT6359_DCXO_CW12, in mt6359_codec_init_reg()
2542 regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON23, in mt6359_codec_init_reg()
2547 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0, in mt6359_codec_init_reg()
2550 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON0, in mt6359_codec_init_reg()
2554 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON6, in mt6359_codec_init_reg()
2558 regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON7, in mt6359_codec_init_reg()
2573 regmap_update_bits(priv->regmap, MT6359_DCXO_CW12, in mt6359_codec_init_reg()
2584 snd_soc_component_init_regmap(cmpnt, priv->regmap); in mt6359_codec_probe()
2693 priv->regmap = mt6397->regmap; in mt6359_platform_driver_probe()
2694 if (IS_ERR(priv->regmap)) in mt6359_platform_driver_probe()
2695 return PTR_ERR(priv->regmap); in mt6359_platform_driver_probe()