Lines Matching refs:W
270 W: P0 stores 1 to flag executes before
274 W: P0 stores 1 to flag.
495 write W ->rf R to indicate that the load R reads from the store W. We
576 x's cache line). We write W ->co W' if W comes before W' in the
577 coherence order, that is, if the value stored by W gets overwritten,
578 directly or indirectly, by the value stored by W'.
583 Write-write coherence: If W ->po-loc W' (i.e., W comes before
584 W' in program order and they access the same location), where W
585 and W' are two stores, then W ->co W'.
587 Write-read coherence: If W ->po-loc R, where W is a store and R
588 is a load, then R must read from W or from some other store
589 which comes after W in the coherence order.
591 Read-write coherence: If R ->po-loc W, where R is a load and W
593 W in the coherence order.
687 overwritten by a store. In other words, we have R ->fr W when the
688 value that R reads is overwritten (directly or indirectly) by W, or
689 equivalently, when R reads from a store which comes earlier than W in
716 event W for the same location, we will have R ->fr W if and only if
717 the write which R reads from is co-before W. In symbols,
719 (R ->fr W) := (there exists W' with W' ->rf R and W' ->co W).
846 The operational model requires that whenever W and W' are both stores
847 and W ->cumul-fence W', then W must propagate to any given CPU
848 before W' does. However, for different CPUs C and C', it does not
849 require W to propagate to C before W' propagates to C'.
948 rule: Whenever R and W are the read and write events composing an
949 atomic read-modify-write and W' is the write event which R reads from,
950 there must not be any stores coming between W' and W in the coherence
953 (R ->rmw W) implies (there is no X with R ->fr X and X ->co W),
996 a store W will force the CPU to execute R before W. This is very
997 simply because the CPU cannot tell the memory subsystem about W's
1025 R ->dep W ->rfi R',
1029 W, because it can forward the value that W will store to R'. But it
1031 it knows what that value is, or that W and R' do access the same
1033 and W then the CPU can speculatively forward W to R' before executing
1052 R ->po-loc W
1054 (the po-loc link says that R comes before W in program order and they
1055 access the same location), the CPU is obliged to execute W after R.
1056 If it executed W first then the memory subsystem would respond to R's
1057 read request with the value stored by W (or an even later store), in
1060 W ->po-loc W'
1062 and the CPU executed W' before W, then the memory subsystem would put
1063 W' before W in the coherence order. It would effectively cause W to
1064 overwrite W', in violation of the write-write coherence rule.
1068 send the W write to the memory subsystem at all!)
1167 W ->rfe R implies that W and R are on different CPUs. It also means
1168 that W's store must have propagated to R's CPU before R executed;
1169 otherwise R could not have read the value stored by W. Therefore W
1170 must have executed before R, and so we have W ->hb R.
1172 The equivalent fact need not hold if W ->rfi R (i.e., W and R are on
1174 W's value to be forwarded to R in such cases, meaning that R may well
1175 execute before W does.
1179 W ->coe W'. This means that W and W' are stores to the same location,
1180 they execute on different CPUs, and W comes before W' in the coherence
1181 order (i.e., W' overwrites W). Nevertheless, it is possible for W' to
1182 execute before W, because the decision as to which store overwrites
1185 R ->fre W means that W overwrites the value which R reads, but it
1186 doesn't mean that W has to execute after R. All that's necessary is
1187 for the memory subsystem not to propagate W to R's CPU until after R
1188 has executed, which is possible if W executes shortly before R.
1362 of links begins with coe). Then there are events W, X, Y, and Z such
1365 E ->coe W ->cumul-fence* X ->rfe? Y ->strong-fence Z ->hb* F,
1369 be equal to X). Because of the cumul-fence links, we know that W will
1372 know that W will propagate to every CPU and to RAM before Z executes.
1374 Thus W, which comes later than E in the coherence order, will
1381 before F. To see why, suppose that F executed first. Then W would
1383 memory subsystem would then be forced to make E come after W in the
1384 coherence order, contradicting the fact that E ->coe W. If E was a
1386 request with the value stored by W or an even later store,
1387 contradicting the fact that E ->fre W.
1568 G ->rcu-gp W ->rcu-link Z ->rcu-rscsi F.
1570 This formula means that G and W are the same event (a grace period),
1573 1. G = W is po-before or equal to X;
1644 Let W be the store mentioned above, let Y come before the end of the
1645 critical section and witness that W propagates to the critical
1646 section's CPU by reading from W, and let Z on some arbitrary CPU be a
1647 witness that W has not propagated to that CPU, where Z happens after
1650 S ->po X ->hb* Z ->fr W ->rf Y ->po U.
1652 The fr link from Z to W indicates that W has not propagated to Z's CPU
1688 W: r2 = READ_ONCE(y);
1693 P1's load at W reads from, so we have W ->fre Y. Since S ->po W and
1876 stores W and W' occur po-before the lock-release and po-after the
1877 lock-acquire respectively, the LKMM requires that W must propagate to
1878 each CPU before W' does. For example, consider:
2064 An rfe link from an event W to an event R says that R reads
2065 from W, which certainly means that W must have propagated to
2083 W: WRITE_ONCE(flag, 1);
2096 The smp_wmb() memory barrier gives a cumul-fence link from X to W, and
2097 assuming r1 = 1 at the end, there is an rfe link from W to Z. This
2375 race-candidate stores W and W', where W ->co W', the LKMM says the
2376 stores don't race if W can be linked to W' by a
2380 sequence. If W is plain then they also have to be linked by an
2384 sequence, and if W' is plain then they also have to be linked by a
2388 sequence. For race-candidate load R and store W, the LKMM says the
2389 two accesses don't race if R can be linked to W by an
2393 sequence or if W can be linked to R by a
2398 sequences in which W is linked to W' or R by a
2421 If R and W are race candidates and it is possible to link R to
2422 W by one of the xb* sequences listed above, then W ->rfe R is
2426 If W and R are race candidates and it is possible to link W to
2427 R by one of the vis sequences listed above, then R ->fre W is
2431 If W and W' are race candidates and it is possible to link W
2432 to W' by one of the vis sequences listed above, then W' ->co W
2491 an address dependency from a marked load R to a plain store W,
2492 followed by smp_wmb() and then a marked store W', the LKMM creates a
2493 ppo link from R to W'. The reasoning behind this is perhaps a little
2495 for this source code in which W' could execute before R. Just as with