1 /* 2 ************************************************************************************************************************ 3 * 4 * Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE 23 * 24 ***********************************************************************************************************************/ 25 26 /** 27 **************************************************************************************************** 28 * @file addrtypes.h 29 * @brief Contains the helper function and constants 30 **************************************************************************************************** 31 */ 32 #ifndef __ADDR_TYPES_H__ 33 #define __ADDR_TYPES_H__ 34 35 #if defined(__APPLE__) && !defined(HAVE_TSERVER) 36 // External definitions header maintained by Apple driver team, but not for diag team under Mac. 37 // Helps address compilation issues & reduces code covered by NDA 38 #include "addrExtDef.h" 39 40 #else 41 42 // Windows and/or Linux 43 #if !defined(VOID) 44 typedef void VOID; 45 #endif 46 47 #if !defined(FLOAT) 48 typedef float FLOAT; 49 #endif 50 51 #if !defined(DOUBLE) 52 typedef double DOUBLE; 53 #endif 54 55 #if !defined(CHAR) 56 typedef char CHAR; 57 #endif 58 59 #if !defined(INT) 60 typedef int INT; 61 #endif 62 63 #include <stdarg.h> // va_list...etc need this header 64 65 #endif // defined (__APPLE__) && !defined(HAVE_TSERVER) 66 67 /** 68 **************************************************************************************************** 69 * Calling conventions 70 **************************************************************************************************** 71 */ 72 #ifndef ADDR_CDECL 73 #if defined(__GNUC__) 74 #if defined(__i386__) 75 #define ADDR_CDECL __attribute__((cdecl)) 76 #else 77 #define ADDR_CDECL 78 #endif 79 #else 80 #define ADDR_CDECL __cdecl 81 #endif 82 #endif 83 84 #ifndef ADDR_STDCALL 85 #if defined(__GNUC__) 86 #if defined(__i386__) 87 #define ADDR_STDCALL __attribute__((stdcall)) 88 #else 89 #define ADDR_STDCALL 90 #endif 91 #else 92 #define ADDR_STDCALL __stdcall 93 #endif 94 #endif 95 96 #ifndef ADDR_FASTCALL 97 #if defined(__GNUC__) 98 #if defined(__i386__) || defined(__amd64__) || defined(__x86_64__) 99 #define ADDR_FASTCALL __attribute__((regparm(0))) 100 #else 101 #define ADDR_FASTCALL 102 #endif 103 #else 104 #define ADDR_FASTCALL __fastcall 105 #endif 106 #endif 107 108 #ifndef GC_CDECL 109 #define GC_CDECL ADDR_CDECL 110 #endif 111 112 #ifndef GC_STDCALL 113 #define GC_STDCALL ADDR_STDCALL 114 #endif 115 116 #ifndef GC_FASTCALL 117 #define GC_FASTCALL ADDR_FASTCALL 118 #endif 119 120 121 #if defined(__GNUC__) 122 #define ADDR_INLINE static inline // inline needs to be static to link 123 #else 124 // win32, win64, other platforms 125 #define ADDR_INLINE __inline 126 #endif // #if defined(__GNUC__) 127 128 #define ADDR_API ADDR_FASTCALL //default call convention is fast call 129 130 /** 131 **************************************************************************************************** 132 * Global defines used by other modules 133 **************************************************************************************************** 134 */ 135 #if !defined(TILEINDEX_INVALID) 136 #define TILEINDEX_INVALID -1 137 #endif 138 139 #if !defined(TILEINDEX_LINEAR_GENERAL) 140 #define TILEINDEX_LINEAR_GENERAL -2 141 #endif 142 143 #if !defined(TILEINDEX_LINEAR_ALIGNED) 144 #define TILEINDEX_LINEAR_ALIGNED 8 145 #endif 146 147 /** 148 **************************************************************************************************** 149 * Return codes 150 **************************************************************************************************** 151 */ 152 typedef enum _ADDR_E_RETURNCODE 153 { 154 // General Return 155 ADDR_OK = 0, 156 ADDR_ERROR = 1, 157 158 // Specific Errors 159 ADDR_OUTOFMEMORY, 160 ADDR_INVALIDPARAMS, 161 ADDR_NOTSUPPORTED, 162 ADDR_NOTIMPLEMENTED, 163 ADDR_PARAMSIZEMISMATCH, 164 ADDR_INVALIDGBREGVALUES, 165 166 } ADDR_E_RETURNCODE; 167 168 /** 169 **************************************************************************************************** 170 * @brief 171 * Neutral enums that define tile modes for all H/W 172 * @note 173 * R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from 174 * ADDR_TM_2D_TILED_XTHICK 175 * 176 **************************************************************************************************** 177 */ 178 typedef enum _AddrTileMode 179 { 180 ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer 181 ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels 182 ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles 183 ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles 184 ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles 185 ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4 186 ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16 187 ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles 188 ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap 189 ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4 190 ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16 191 ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles 192 ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices 193 ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick 194 ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap 195 ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick 196 ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI 197 ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI 198 ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI 199 ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size 200 ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only 201 ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only 202 ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size 203 ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only 204 ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only 205 ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib 206 ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode 207 } AddrTileMode; 208 209 /** 210 **************************************************************************************************** 211 * @brief 212 * Neutral enums that define swizzle modes for Gfx9+ ASIC 213 * @note 214 * 215 * ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resource 216 * ADDR_SW_256B_* addressing block aligned size is 256B, for 2D resource 217 * ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resource 218 * ADDR_SW_64KB_* addressing block aligned size is 64KB, for 1D/2D/3D resource 219 * ADDR_SW_VAR_* addressing block aligned size is ASIC specific 220 * 221 * ADDR_SW_*_Z For GFX9: 222 - for 2D resource, represents Z-order swizzle mode for depth/stencil/FMask 223 - for 3D resource, represents a swizzle mode similar to legacy thick tile mode 224 For GFX10: 225 - represents Z-order swizzle mode for depth/stencil/FMask 226 * ADDR_SW_*_S For GFX9+: 227 - represents standard swizzle mode defined by MS 228 * ADDR_SW_*_D For GFX9: 229 - for 2D resource, represents a swizzle mode for displayable resource 230 * - for 3D resource, represents a swizzle mode which places each slice in order & pixel 231 For GFX10: 232 - for 2D resource, represents a swizzle mode for displayable resource 233 - for 3D resource, represents a swizzle mode similar to legacy thick tile mode 234 within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible! 235 * ADDR_SW_*_R For GFX9: 236 - 2D resource only, represents a swizzle mode for rotated displayable resource 237 For GFX10: 238 - represents a swizzle mode for render target resource 239 * 240 **************************************************************************************************** 241 */ 242 typedef enum _AddrSwizzleMode 243 { 244 ADDR_SW_LINEAR = 0, 245 ADDR_SW_256B_S = 1, 246 ADDR_SW_256B_D = 2, 247 ADDR_SW_256B_R = 3, 248 ADDR_SW_4KB_Z = 4, 249 ADDR_SW_4KB_S = 5, 250 ADDR_SW_4KB_D = 6, 251 ADDR_SW_4KB_R = 7, 252 ADDR_SW_64KB_Z = 8, 253 ADDR_SW_64KB_S = 9, 254 ADDR_SW_64KB_D = 10, 255 ADDR_SW_64KB_R = 11, 256 ADDR_SW_MISCDEF12 = 12, 257 ADDR_SW_MISCDEF13 = 13, 258 ADDR_SW_MISCDEF14 = 14, 259 ADDR_SW_MISCDEF15 = 15, 260 ADDR_SW_64KB_Z_T = 16, 261 ADDR_SW_64KB_S_T = 17, 262 ADDR_SW_64KB_D_T = 18, 263 ADDR_SW_64KB_R_T = 19, 264 ADDR_SW_4KB_Z_X = 20, 265 ADDR_SW_4KB_S_X = 21, 266 ADDR_SW_4KB_D_X = 22, 267 ADDR_SW_4KB_R_X = 23, 268 ADDR_SW_64KB_Z_X = 24, 269 ADDR_SW_64KB_S_X = 25, 270 ADDR_SW_64KB_D_X = 26, 271 ADDR_SW_64KB_R_X = 27, 272 ADDR_SW_MISCDEF28 = 28, 273 ADDR_SW_MISCDEF29 = 29, 274 ADDR_SW_MISCDEF30 = 30, 275 ADDR_SW_MISCDEF31 = 31, 276 ADDR_SW_LINEAR_GENERAL = 32, 277 ADDR_SW_MAX_TYPE = 33, 278 279 ADDR_SW_RESERVED0 = ADDR_SW_MISCDEF12, 280 ADDR_SW_RESERVED1 = ADDR_SW_MISCDEF13, 281 ADDR_SW_RESERVED2 = ADDR_SW_MISCDEF14, 282 ADDR_SW_RESERVED3 = ADDR_SW_MISCDEF15, 283 ADDR_SW_RESERVED4 = ADDR_SW_MISCDEF29, 284 ADDR_SW_RESERVED5 = ADDR_SW_MISCDEF30, 285 286 ADDR_SW_VAR_Z_X = ADDR_SW_MISCDEF28, 287 ADDR_SW_VAR_R_X = ADDR_SW_MISCDEF31, 288 289 ADDR_SW_256KB_Z_X = ADDR_SW_MISCDEF28, 290 ADDR_SW_256KB_S_X = ADDR_SW_MISCDEF29, 291 ADDR_SW_256KB_D_X = ADDR_SW_MISCDEF30, 292 ADDR_SW_256KB_R_X = ADDR_SW_MISCDEF31, 293 } AddrSwizzleMode; 294 295 /** 296 **************************************************************************************************** 297 * @brief 298 * Neutral enums that define image type 299 * @note 300 * this is new for address library interface version 2 301 * 302 **************************************************************************************************** 303 */ 304 typedef enum _AddrResourceType 305 { 306 ADDR_RSRC_TEX_1D = 0, 307 ADDR_RSRC_TEX_2D = 1, 308 ADDR_RSRC_TEX_3D = 2, 309 ADDR_RSRC_MAX_TYPE = 3, 310 } AddrResourceType; 311 312 /** 313 **************************************************************************************************** 314 * @brief 315 * Neutral enums that define resource heap location 316 * @note 317 * this is new for address library interface version 2 318 * 319 **************************************************************************************************** 320 */ 321 typedef enum _AddrResrouceLocation 322 { 323 ADDR_RSRC_LOC_UNDEF = 0, // Resource heap is undefined/unknown 324 ADDR_RSRC_LOC_LOCAL = 1, // CPU visable and CPU invisable local heap 325 ADDR_RSRC_LOC_USWC = 2, // CPU write-combined non-cached nonlocal heap 326 ADDR_RSRC_LOC_CACHED = 3, // CPU cached nonlocal heap 327 ADDR_RSRC_LOC_INVIS = 4, // CPU invisable local heap only 328 ADDR_RSRC_LOC_MAX_TYPE = 5, 329 } AddrResrouceLocation; 330 331 /** 332 **************************************************************************************************** 333 * @brief 334 * Neutral enums that define resource basic swizzle mode 335 * @note 336 * this is new for address library interface version 2 337 * 338 **************************************************************************************************** 339 */ 340 typedef enum _AddrSwType 341 { 342 ADDR_SW_Z = 0, // Resource basic swizzle mode is ZOrder 343 ADDR_SW_S = 1, // Resource basic swizzle mode is Standard 344 ADDR_SW_D = 2, // Resource basic swizzle mode is Display 345 ADDR_SW_R = 3, // Resource basic swizzle mode is Rotated/Render optimized 346 ADDR_SW_L = 4, // Resource basic swizzle mode is Linear 347 ADDR_SW_MAX_SWTYPE 348 } AddrSwType; 349 350 /** 351 **************************************************************************************************** 352 * @brief 353 * Neutral enums that define mipmap major mode 354 * @note 355 * this is new for address library interface version 2 356 * 357 **************************************************************************************************** 358 */ 359 typedef enum _AddrMajorMode 360 { 361 ADDR_MAJOR_X = 0, 362 ADDR_MAJOR_Y = 1, 363 ADDR_MAJOR_Z = 2, 364 ADDR_MAJOR_MAX_TYPE = 3, 365 } AddrMajorMode; 366 367 /** 368 **************************************************************************************************** 369 * AddrFormat 370 * 371 * @brief 372 * Neutral enum for SurfaceFormat 373 * 374 **************************************************************************************************** 375 */ 376 typedef enum _AddrFormat { 377 ADDR_FMT_INVALID = 0x00000000, 378 ADDR_FMT_8 = 0x00000001, 379 ADDR_FMT_4_4 = 0x00000002, 380 ADDR_FMT_3_3_2 = 0x00000003, 381 ADDR_FMT_RESERVED_4 = 0x00000004, 382 ADDR_FMT_16 = 0x00000005, 383 ADDR_FMT_16_FLOAT = ADDR_FMT_16, 384 ADDR_FMT_8_8 = 0x00000007, 385 ADDR_FMT_5_6_5 = 0x00000008, 386 ADDR_FMT_6_5_5 = 0x00000009, 387 ADDR_FMT_1_5_5_5 = 0x0000000a, 388 ADDR_FMT_4_4_4_4 = 0x0000000b, 389 ADDR_FMT_5_5_5_1 = 0x0000000c, 390 ADDR_FMT_32 = 0x0000000d, 391 ADDR_FMT_32_FLOAT = ADDR_FMT_32, 392 ADDR_FMT_16_16 = 0x0000000f, 393 ADDR_FMT_16_16_FLOAT = ADDR_FMT_16_16, 394 ADDR_FMT_8_24 = 0x00000011, 395 ADDR_FMT_8_24_FLOAT = ADDR_FMT_8_24, 396 ADDR_FMT_24_8 = 0x00000013, 397 ADDR_FMT_24_8_FLOAT = ADDR_FMT_24_8, 398 ADDR_FMT_10_11_11 = 0x00000015, 399 ADDR_FMT_10_11_11_FLOAT = ADDR_FMT_10_11_11, 400 ADDR_FMT_11_11_10 = 0x00000017, 401 ADDR_FMT_11_11_10_FLOAT = ADDR_FMT_11_11_10, 402 ADDR_FMT_2_10_10_10 = 0x00000019, 403 ADDR_FMT_8_8_8_8 = 0x0000001a, 404 ADDR_FMT_10_10_10_2 = 0x0000001b, 405 ADDR_FMT_X24_8_32_FLOAT = 0x0000001c, 406 ADDR_FMT_32_32 = 0x0000001d, 407 ADDR_FMT_32_32_FLOAT = ADDR_FMT_32_32, 408 ADDR_FMT_16_16_16_16 = 0x0000001f, 409 ADDR_FMT_16_16_16_16_FLOAT = ADDR_FMT_16_16_16_16, 410 ADDR_FMT_RESERVED_33 = 0x00000021, 411 ADDR_FMT_32_32_32_32 = 0x00000022, 412 ADDR_FMT_32_32_32_32_FLOAT = ADDR_FMT_32_32_32_32, 413 ADDR_FMT_RESERVED_36 = 0x00000024, 414 ADDR_FMT_1 = 0x00000025, 415 ADDR_FMT_1_REVERSED = 0x00000026, 416 ADDR_FMT_GB_GR = 0x00000027, 417 ADDR_FMT_BG_RG = 0x00000028, 418 ADDR_FMT_32_AS_8 = 0x00000029, 419 ADDR_FMT_32_AS_8_8 = 0x0000002a, 420 ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b, 421 ADDR_FMT_8_8_8 = 0x0000002c, 422 ADDR_FMT_16_16_16 = 0x0000002d, 423 ADDR_FMT_16_16_16_FLOAT = ADDR_FMT_16_16_16, 424 ADDR_FMT_32_32_32 = 0x0000002f, 425 ADDR_FMT_32_32_32_FLOAT = ADDR_FMT_32_32_32, 426 ADDR_FMT_BC1 = 0x00000031, 427 ADDR_FMT_BC2 = 0x00000032, 428 ADDR_FMT_BC3 = 0x00000033, 429 ADDR_FMT_BC4 = 0x00000034, 430 ADDR_FMT_BC5 = 0x00000035, 431 ADDR_FMT_BC6 = 0x00000036, 432 ADDR_FMT_BC7 = 0x00000037, 433 ADDR_FMT_32_AS_32_32_32_32 = 0x00000038, 434 ADDR_FMT_APC3 = 0x00000039, 435 ADDR_FMT_APC4 = 0x0000003a, 436 ADDR_FMT_APC5 = 0x0000003b, 437 ADDR_FMT_APC6 = 0x0000003c, 438 ADDR_FMT_APC7 = 0x0000003d, 439 ADDR_FMT_CTX1 = 0x0000003e, 440 ADDR_FMT_RESERVED_63 = 0x0000003f, 441 ADDR_FMT_ASTC_4x4 = 0x00000040, 442 ADDR_FMT_ASTC_5x4 = 0x00000041, 443 ADDR_FMT_ASTC_5x5 = 0x00000042, 444 ADDR_FMT_ASTC_6x5 = 0x00000043, 445 ADDR_FMT_ASTC_6x6 = 0x00000044, 446 ADDR_FMT_ASTC_8x5 = 0x00000045, 447 ADDR_FMT_ASTC_8x6 = 0x00000046, 448 ADDR_FMT_ASTC_8x8 = 0x00000047, 449 ADDR_FMT_ASTC_10x5 = 0x00000048, 450 ADDR_FMT_ASTC_10x6 = 0x00000049, 451 ADDR_FMT_ASTC_10x8 = 0x0000004a, 452 ADDR_FMT_ASTC_10x10 = 0x0000004b, 453 ADDR_FMT_ASTC_12x10 = 0x0000004c, 454 ADDR_FMT_ASTC_12x12 = 0x0000004d, 455 ADDR_FMT_ETC2_64BPP = 0x0000004e, 456 ADDR_FMT_ETC2_128BPP = 0x0000004f, 457 } AddrFormat; 458 459 /** 460 **************************************************************************************************** 461 * AddrDepthFormat 462 * 463 * @brief 464 * Neutral enum for addrFlt32ToDepthPixel 465 * 466 **************************************************************************************************** 467 */ 468 typedef enum _AddrDepthFormat 469 { 470 ADDR_DEPTH_INVALID = 0x00000000, 471 ADDR_DEPTH_16 = 0x00000001, 472 ADDR_DEPTH_X8_24 = 0x00000002, 473 ADDR_DEPTH_8_24 = 0x00000003, 474 ADDR_DEPTH_X8_24_FLOAT = 0x00000004, 475 ADDR_DEPTH_8_24_FLOAT = 0x00000005, 476 ADDR_DEPTH_32_FLOAT = 0x00000006, 477 ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007, 478 479 } AddrDepthFormat; 480 481 /** 482 **************************************************************************************************** 483 * AddrColorFormat 484 * 485 * @brief 486 * Neutral enum for ColorFormat 487 * 488 **************************************************************************************************** 489 */ 490 typedef enum _AddrColorFormat 491 { 492 ADDR_COLOR_INVALID = 0x00000000, 493 ADDR_COLOR_8 = 0x00000001, 494 ADDR_COLOR_4_4 = 0x00000002, 495 ADDR_COLOR_3_3_2 = 0x00000003, 496 ADDR_COLOR_RESERVED_4 = 0x00000004, 497 ADDR_COLOR_16 = 0x00000005, 498 ADDR_COLOR_16_FLOAT = 0x00000006, 499 ADDR_COLOR_8_8 = 0x00000007, 500 ADDR_COLOR_5_6_5 = 0x00000008, 501 ADDR_COLOR_6_5_5 = 0x00000009, 502 ADDR_COLOR_1_5_5_5 = 0x0000000a, 503 ADDR_COLOR_4_4_4_4 = 0x0000000b, 504 ADDR_COLOR_5_5_5_1 = 0x0000000c, 505 ADDR_COLOR_32 = 0x0000000d, 506 ADDR_COLOR_32_FLOAT = 0x0000000e, 507 ADDR_COLOR_16_16 = 0x0000000f, 508 ADDR_COLOR_16_16_FLOAT = 0x00000010, 509 ADDR_COLOR_8_24 = 0x00000011, 510 ADDR_COLOR_8_24_FLOAT = 0x00000012, 511 ADDR_COLOR_24_8 = 0x00000013, 512 ADDR_COLOR_24_8_FLOAT = 0x00000014, 513 ADDR_COLOR_10_11_11 = 0x00000015, 514 ADDR_COLOR_10_11_11_FLOAT = 0x00000016, 515 ADDR_COLOR_11_11_10 = 0x00000017, 516 ADDR_COLOR_11_11_10_FLOAT = 0x00000018, 517 ADDR_COLOR_2_10_10_10 = 0x00000019, 518 ADDR_COLOR_8_8_8_8 = 0x0000001a, 519 ADDR_COLOR_10_10_10_2 = 0x0000001b, 520 ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c, 521 ADDR_COLOR_32_32 = 0x0000001d, 522 ADDR_COLOR_32_32_FLOAT = 0x0000001e, 523 ADDR_COLOR_16_16_16_16 = 0x0000001f, 524 ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020, 525 ADDR_COLOR_RESERVED_33 = 0x00000021, 526 ADDR_COLOR_32_32_32_32 = 0x00000022, 527 ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023, 528 } AddrColorFormat; 529 530 /** 531 **************************************************************************************************** 532 * AddrSurfaceNumber 533 * 534 * @brief 535 * Neutral enum for SurfaceNumber 536 * 537 **************************************************************************************************** 538 */ 539 typedef enum _AddrSurfaceNumber { 540 ADDR_NUMBER_UNORM = 0x00000000, 541 ADDR_NUMBER_SNORM = 0x00000001, 542 ADDR_NUMBER_USCALED = 0x00000002, 543 ADDR_NUMBER_SSCALED = 0x00000003, 544 ADDR_NUMBER_UINT = 0x00000004, 545 ADDR_NUMBER_SINT = 0x00000005, 546 ADDR_NUMBER_SRGB = 0x00000006, 547 ADDR_NUMBER_FLOAT = 0x00000007, 548 } AddrSurfaceNumber; 549 550 /** 551 **************************************************************************************************** 552 * AddrSurfaceSwap 553 * 554 * @brief 555 * Neutral enum for SurfaceSwap 556 * 557 **************************************************************************************************** 558 */ 559 typedef enum _AddrSurfaceSwap { 560 ADDR_SWAP_STD = 0x00000000, 561 ADDR_SWAP_ALT = 0x00000001, 562 ADDR_SWAP_STD_REV = 0x00000002, 563 ADDR_SWAP_ALT_REV = 0x00000003, 564 } AddrSurfaceSwap; 565 566 /** 567 **************************************************************************************************** 568 * AddrHtileBlockSize 569 * 570 * @brief 571 * Size of HTILE blocks, valid values are 4 or 8 for now 572 **************************************************************************************************** 573 */ 574 typedef enum _AddrHtileBlockSize 575 { 576 ADDR_HTILE_BLOCKSIZE_4 = 4, 577 ADDR_HTILE_BLOCKSIZE_8 = 8, 578 } AddrHtileBlockSize; 579 580 581 /** 582 **************************************************************************************************** 583 * AddrPipeCfg 584 * 585 * @brief 586 * The pipe configuration field specifies both the number of pipes and 587 * how pipes are interleaved on the surface. 588 * The expression of number of pipes, the shader engine tile size, and packer tile size 589 * is encoded in a PIPE_CONFIG register field. 590 * In general the number of pipes usually matches the number of memory channels of the 591 * hardware configuration. 592 * For hw configurations w/ non-pow2 memory number of memory channels, it usually matches 593 * the number of ROP units(? TODO: which registers??) 594 * The enum value = hw enum + 1 which is to reserve 0 for requesting default. 595 **************************************************************************************************** 596 */ 597 typedef enum _AddrPipeCfg 598 { 599 ADDR_PIPECFG_INVALID = 0, 600 ADDR_PIPECFG_P2 = 1, /// 2 pipes, 601 ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes, 602 ADDR_PIPECFG_P4_16x16 = 6, 603 ADDR_PIPECFG_P4_16x32 = 7, 604 ADDR_PIPECFG_P4_32x32 = 8, 605 ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes 606 ADDR_PIPECFG_P8_16x32_8x16 = 10, 607 ADDR_PIPECFG_P8_32x32_8x16 = 11, 608 ADDR_PIPECFG_P8_16x32_16x16 = 12, 609 ADDR_PIPECFG_P8_32x32_16x16 = 13, 610 ADDR_PIPECFG_P8_32x32_16x32 = 14, 611 ADDR_PIPECFG_P8_32x64_32x32 = 15, 612 ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes 613 ADDR_PIPECFG_P16_32x32_16x16 = 18, 614 ADDR_PIPECFG_UNUSED = 19, 615 ADDR_PIPECFG_MAX = 20, 616 } AddrPipeCfg; 617 618 /** 619 **************************************************************************************************** 620 * AddrTileType 621 * 622 * @brief 623 * Neutral enums that specifies micro tile type (MICRO_TILE_MODE) 624 **************************************************************************************************** 625 */ 626 typedef enum _AddrTileType 627 { 628 ADDR_DISPLAYABLE = 0, ///< Displayable tiling 629 ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling 630 ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order 631 ADDR_ROTATED = 3, ///< Rotated displayable tiling 632 ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK 633 } AddrTileType; 634 635 //////////////////////////////////////////////////////////////////////////////////////////////////// 636 // 637 // Type definitions: short system-independent names for address library types 638 // 639 //////////////////////////////////////////////////////////////////////////////////////////////////// 640 641 #if !defined(__APPLE__) || defined(HAVE_TSERVER) 642 643 #ifndef BOOL_32 // no bool type in C 644 /// @brief Boolean type, since none is defined in C 645 /// @ingroup type 646 #define BOOL_32 int 647 #endif 648 649 #ifndef INT_32 650 #define INT_32 int 651 #endif 652 653 #ifndef UINT_32 654 #define UINT_32 unsigned int 655 #endif 656 657 #ifndef INT_16 658 #define INT_16 short 659 #endif 660 661 #ifndef UINT_16 662 #define UINT_16 unsigned short 663 #endif 664 665 #ifndef INT_8 666 #define INT_8 signed char // signed must be used because of aarch64 667 #endif 668 669 #ifndef UINT_8 670 #define UINT_8 unsigned char 671 #endif 672 673 #ifndef NULL 674 #define NULL 0 675 #endif 676 677 #ifndef TRUE 678 #define TRUE 1 679 #endif 680 681 #ifndef FALSE 682 #define FALSE 0 683 #endif 684 685 // 686 // 64-bit integer types depend on the compiler 687 // 688 #if defined( __GNUC__ ) || defined( __WATCOMC__ ) 689 #define INT_64 long long 690 #define UINT_64 unsigned long long 691 692 #elif defined( _WIN32 ) 693 #define INT_64 __int64 694 #define UINT_64 unsigned __int64 695 696 #else 697 #error Unsupported compiler and/or operating system for 64-bit integers 698 699 /// @brief 64-bit signed integer type (compiler dependent) 700 /// @ingroup type 701 /// 702 /// The addrlib defines a 64-bit signed integer type for either 703 /// Gnu/Watcom compilers (which use the first syntax) or for 704 /// the Windows VCC compiler (which uses the second syntax). 705 #define INT_64 long long OR __int64 706 707 /// @brief 64-bit unsigned integer type (compiler dependent) 708 /// @ingroup type 709 /// 710 /// The addrlib defines a 64-bit unsigned integer type for either 711 /// Gnu/Watcom compilers (which use the first syntax) or for 712 /// the Windows VCC compiler (which uses the second syntax). 713 /// 714 #define UINT_64 unsigned long long OR unsigned __int64 715 #endif 716 717 #endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER) 718 719 // ADDR64X is used to print addresses in hex form on both Windows and Linux 720 // 721 #if defined( __GNUC__ ) || defined( __WATCOMC__ ) 722 #define ADDR64X "llx" 723 #define ADDR64D "lld" 724 725 #elif defined( _WIN32 ) 726 #define ADDR64X "I64x" 727 #define ADDR64D "I64d" 728 729 #else 730 #error Unsupported compiler and/or operating system for 64-bit integers 731 732 /// @brief Addrlib device address 64-bit printf tag (compiler dependent) 733 /// @ingroup type 734 /// 735 /// This allows printf to display an ADDR_64 for either the Windows VCC compiler 736 /// (which used this value) or the Gnu/Watcom compilers (which use "llx". 737 /// An example of use is printf("addr 0x%"ADDR64X"\n", address); 738 /// 739 #define ADDR64X "llx" OR "I64x" 740 #define ADDR64D "lld" OR "I64d" 741 #endif 742 743 744 /// @brief Union for storing a 32-bit float or 32-bit integer 745 /// @ingroup type 746 /// 747 /// This union provides a simple way to convert between a 32-bit float 748 /// and a 32-bit integer. It also prevents the compiler from producing 749 /// code that alters NaN values when assiging or coying floats. 750 /// Therefore, all address library routines that pass or return 32-bit 751 /// floating point data do so by passing or returning a FLT_32. 752 /// 753 typedef union { 754 INT_32 i; 755 UINT_32 u; 756 float f; 757 } ADDR_FLT_32; 758 759 760 //////////////////////////////////////////////////////////////////////////////////////////////////// 761 // 762 // Macros for controlling linking and building on multiple systems 763 // 764 //////////////////////////////////////////////////////////////////////////////////////////////////// 765 #if defined(_MSC_VER) 766 #if defined(va_copy) 767 #undef va_copy //redefine va_copy to support VC2013 768 #endif 769 #endif 770 771 #if !defined(va_copy) 772 #define va_copy(dst, src) \ 773 ((void) memcpy(&(dst), &(src), sizeof(va_list))) 774 #endif 775 776 #endif // __ADDR_TYPES_H__ 777 778