1 /* 2 ************************************************************************************************************************ 3 * 4 * Copyright (C) 2017-2022 Advanced Micro Devices, Inc. All rights reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE 23 * 24 ***********************************************************************************************************************/ 25 26 #ifndef _AMDGPU_ASIC_ADDR_H 27 #define _AMDGPU_ASIC_ADDR_H 28 29 #define ATI_VENDOR_ID 0x1002 30 #define AMD_VENDOR_ID 0x1022 31 32 // AMDGPU_VENDOR_IS_AMD(vendorId) 33 #define AMDGPU_VENDOR_IS_AMD(v) ((v == ATI_VENDOR_ID) || (v == AMD_VENDOR_ID)) 34 35 #define FAMILY_UNKNOWN 0x00 36 #define FAMILY_TN 0x69 //# 105 / Trinity APUs 37 #define FAMILY_SI 0x6E //# 110 / Southern Islands: Tahiti, Pitcairn, CapeVerde, Oland, Hainan 38 #define FAMILY_CI 0x78 //# 120 / Sea Islands: Bonaire, Hawaii 39 #define FAMILY_KV 0x7D //# 125 / Kaveri APUs: Spectre, Spooky, Kalindi, Godavari 40 #define FAMILY_VI 0x82 //# 130 / Volcanic Islands: Iceland, Tonga, Fiji 41 #define FAMILY_POLARIS 0x82 //# 130 / Polaris: 10, 11, 12 42 #define FAMILY_CZ 0x87 //# 135 / Carrizo APUs: Carrizo, Stoney 43 #define FAMILY_AI 0x8D //# 141 / Vega: 10, 20 44 #define FAMILY_RV 0x8E //# 142 / Raven 45 #define FAMILY_NV 0x8F //# 143 / Navi: 10 46 #define FAMILY_VGH 0x90 //# 144 / Van Gogh 47 #define FAMILY_GFX1100 0x91 48 #define FAMILY_GFX1103 0x94 49 #define FAMILY_RMB 0x92 //# 146 / Rembrandt 50 #define FAMILY_GC_10_3_6 0x95 51 #define FAMILY_GC_10_3_7 0x97 52 53 // AMDGPU_FAMILY_IS(familyId, familyName) 54 #define FAMILY_IS(f, fn) (f == FAMILY_##fn) 55 #define FAMILY_IS_TN(f) FAMILY_IS(f, TN) 56 #define FAMILY_IS_SI(f) FAMILY_IS(f, SI) 57 #define FAMILY_IS_CI(f) FAMILY_IS(f, CI) 58 #define FAMILY_IS_KV(f) FAMILY_IS(f, KV) 59 #define FAMILY_IS_VI(f) FAMILY_IS(f, VI) 60 #define FAMILY_IS_POLARIS(f) FAMILY_IS(f, POLARIS) 61 #define FAMILY_IS_CZ(f) FAMILY_IS(f, CZ) 62 #define FAMILY_IS_AI(f) FAMILY_IS(f, AI) 63 #define FAMILY_IS_RV(f) FAMILY_IS(f, RV) 64 #define FAMILY_IS_NV(f) FAMILY_IS(f, NV) 65 #define FAMILY_IS_GFX1100(f) FAMILY_IS(f, GFX1100) 66 #define FAMILY_IS_RMB(f) FAMILY_IS(f, RMB) 67 68 #define AMDGPU_UNKNOWN 0xFF 69 70 #define AMDGPU_TAHITI_RANGE 0x05, 0x14 //# 5 <= x < 20 71 #define AMDGPU_PITCAIRN_RANGE 0x15, 0x28 //# 21 <= x < 40 72 #define AMDGPU_CAPEVERDE_RANGE 0x29, 0x3C //# 41 <= x < 60 73 #define AMDGPU_OLAND_RANGE 0x3C, 0x46 //# 60 <= x < 70 74 #define AMDGPU_HAINAN_RANGE 0x46, 0xFF //# 70 <= x < max 75 76 #define AMDGPU_BONAIRE_RANGE 0x14, 0x28 //# 20 <= x < 40 77 #define AMDGPU_HAWAII_RANGE 0x28, 0x3C //# 40 <= x < 60 78 79 #define AMDGPU_SPECTRE_RANGE 0x01, 0x41 //# 1 <= x < 65 80 #define AMDGPU_SPOOKY_RANGE 0x41, 0x81 //# 65 <= x < 129 81 #define AMDGPU_KALINDI_RANGE 0x81, 0xA1 //# 129 <= x < 161 82 #define AMDGPU_GODAVARI_RANGE 0xA1, 0xFF //# 161 <= x < max 83 84 #define AMDGPU_ICELAND_RANGE 0x01, 0x14 //# 1 <= x < 20 85 #define AMDGPU_TONGA_RANGE 0x14, 0x28 //# 20 <= x < 40 86 #define AMDGPU_FIJI_RANGE 0x3C, 0x50 //# 60 <= x < 80 87 88 #define AMDGPU_POLARIS10_RANGE 0x50, 0x5A //# 80 <= x < 90 89 #define AMDGPU_POLARIS11_RANGE 0x5A, 0x64 //# 90 <= x < 100 90 #define AMDGPU_POLARIS12_RANGE 0x64, 0x6E //# 100 <= x < 110 91 #define AMDGPU_VEGAM_RANGE 0x6E, 0xFF //# 110 <= x < max 92 93 #define AMDGPU_CARRIZO_RANGE 0x01, 0x21 //# 1 <= x < 33 94 #define AMDGPU_BRISTOL_RANGE 0x10, 0x21 //# 16 <= x < 33 95 #define AMDGPU_STONEY_RANGE 0x61, 0xFF //# 97 <= x < max 96 97 #define AMDGPU_VEGA10_RANGE 0x01, 0x14 //# 1 <= x < 20 98 #define AMDGPU_VEGA12_RANGE 0x14, 0x28 //# 20 <= x < 40 99 #define AMDGPU_VEGA20_RANGE 0x28, 0xFF //# 40 <= x < max 100 101 #define AMDGPU_RAVEN_RANGE 0x01, 0x81 //# 1 <= x < 129 102 #define AMDGPU_RAVEN2_RANGE 0x81, 0x90 //# 129 <= x < 144 103 #define AMDGPU_RENOIR_RANGE 0x91, 0xFF //# 145 <= x < max 104 105 #define AMDGPU_NAVI10_RANGE 0x01, 0x0A //# 1 <= x < 10 106 #define AMDGPU_NAVI12_RANGE 0x0A, 0x14 //# 10 <= x < 20 107 #define AMDGPU_NAVI14_RANGE 0x14, 0x28 //# 20 <= x < 40 108 #define AMDGPU_NAVI21_RANGE 0x28, 0x32 //# 40 <= x < 50 109 #define AMDGPU_NAVI22_RANGE 0x32, 0x3C //# 50 <= x < 60 110 #define AMDGPU_NAVI23_RANGE 0x3C, 0x46 //# 60 <= x < 70 111 #define AMDGPU_NAVI24_RANGE 0x46, 0x50 //# 70 <= x < 80 112 113 #define AMDGPU_VANGOGH_RANGE 0x01, 0xFF //# 1 <= x < max 114 115 #define AMDGPU_GFX1100_RANGE 0x01, 0x10 //# 01 <= x < 16 116 #define AMDGPU_GFX1101_RANGE 0x20, 0xFF //# 32 <= x < 255 117 #define AMDGPU_GFX1102_RANGE 0x10, 0x20 //# 16 <= x < 32 118 119 #define AMDGPU_GFX1103_RANGE 0x01, 0xFF //# 1 <= x < max 120 121 #define AMDGPU_REMBRANDT_RANGE 0x01, 0xFF //# 01 <= x < 255 122 123 #define AMDGPU_GFX1036_RANGE 0x01, 0xFF //# 1 <= x < max 124 125 #define AMDGPU_GFX1037_RANGE 0x01, 0xFF //# 1 <= x < max 126 127 #define AMDGPU_EXPAND_FIX(x) x 128 #define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max)) 129 #define AMDGPU_IN_RANGE(val, ...) AMDGPU_EXPAND_FIX(AMDGPU_RANGE_HELPER(val, __VA_ARGS__)) 130 131 132 // ASICREV_IS(eRevisionId, revisionName) 133 #define ASICREV_IS(r, rn) AMDGPU_IN_RANGE(r, AMDGPU_##rn##_RANGE) 134 #define ASICREV_IS_TAHITI_P(r) ASICREV_IS(r, TAHITI) 135 #define ASICREV_IS_PITCAIRN_PM(r) ASICREV_IS(r, PITCAIRN) 136 #define ASICREV_IS_CAPEVERDE_M(r) ASICREV_IS(r, CAPEVERDE) 137 #define ASICREV_IS_OLAND_M(r) ASICREV_IS(r, OLAND) 138 #define ASICREV_IS_HAINAN_V(r) ASICREV_IS(r, HAINAN) 139 140 #define ASICREV_IS_BONAIRE_M(r) ASICREV_IS(r, BONAIRE) 141 #define ASICREV_IS_HAWAII_P(r) ASICREV_IS(r, HAWAII) 142 143 #define ASICREV_IS_SPECTRE(r) ASICREV_IS(r, SPECTRE) 144 #define ASICREV_IS_SPOOKY(r) ASICREV_IS(r, SPOOKY) 145 #define ASICREV_IS_KALINDI(r) ASICREV_IS(r, KALINDI) 146 #define ASICREV_IS_KALINDI_GODAVARI(r) ASICREV_IS(r, GODAVARI) 147 148 #define ASICREV_IS_ICELAND_M(r) ASICREV_IS(r, ICELAND) 149 #define ASICREV_IS_TONGA_P(r) ASICREV_IS(r, TONGA) 150 #define ASICREV_IS_FIJI_P(r) ASICREV_IS(r, FIJI) 151 152 #define ASICREV_IS_POLARIS10_P(r) ASICREV_IS(r, POLARIS10) 153 #define ASICREV_IS_POLARIS11_M(r) ASICREV_IS(r, POLARIS11) 154 #define ASICREV_IS_POLARIS12_V(r) ASICREV_IS(r, POLARIS12) 155 #define ASICREV_IS_VEGAM_P(r) ASICREV_IS(r, VEGAM) 156 157 #define ASICREV_IS_CARRIZO(r) ASICREV_IS(r, CARRIZO) 158 #define ASICREV_IS_CARRIZO_BRISTOL(r) ASICREV_IS(r, BRISTOL) 159 #define ASICREV_IS_STONEY(r) ASICREV_IS(r, STONEY) 160 161 #define ASICREV_IS_VEGA10_M(r) ASICREV_IS(r, VEGA10) 162 #define ASICREV_IS_VEGA10_P(r) ASICREV_IS(r, VEGA10) 163 #define ASICREV_IS_VEGA12_P(r) ASICREV_IS(r, VEGA12) 164 #define ASICREV_IS_VEGA12_p(r) ASICREV_IS(r, VEGA12) 165 #define ASICREV_IS_VEGA20_P(r) ASICREV_IS(r, VEGA20) 166 167 #define ASICREV_IS_RAVEN(r) ASICREV_IS(r, RAVEN) 168 #define ASICREV_IS_RAVEN2(r) ASICREV_IS(r, RAVEN2) 169 #define ASICREV_IS_RENOIR(r) ASICREV_IS(r, RENOIR) 170 171 #define ASICREV_IS_NAVI10_P(r) ASICREV_IS(r, NAVI10) 172 173 #define ASICREV_IS_NAVI12_P(r) ASICREV_IS(r, NAVI12) 174 175 #define ASICREV_IS_NAVI14_M(r) ASICREV_IS(r, NAVI14) 176 177 #define ASICREV_IS_NAVI21_M(r) ASICREV_IS(r, NAVI21) 178 179 #define ASICREV_IS_NAVI22_P(r) ASICREV_IS(r, NAVI22) 180 181 #define ASICREV_IS_NAVI23_P(r) ASICREV_IS(r, NAVI23) 182 183 #define ASICREV_IS_NAVI24_P(r) ASICREV_IS(r, NAVI24) 184 185 #define ASICREV_IS_VANGOGH(r) ASICREV_IS(r, VANGOGH) 186 187 #define ASICREV_IS_GFX1100(r) ASICREV_IS(r, GFX1100) 188 #define ASICREV_IS_GFX1101(r) ASICREV_IS(r, GFX1101) 189 #define ASICREV_IS_GFX1102(r) ASICREV_IS(r, GFX1102) 190 #define ASICREV_IS_GFX1103(r) ASICREV_IS(r, GFX1103) 191 192 #define ASICREV_IS_REMBRANDT(r) ASICREV_IS(r, REMBRANDT) 193 194 #define ASICREV_IS_GFX1036(r) ASICREV_IS(r, GFX1036) 195 196 #define ASICREV_IS_GFX1037(r) ASICREV_IS(r, GFX1037) 197 198 #endif // _AMDGPU_ASIC_ADDR_H 199