1 /*
2 * Functions and registers to access AXP20X power management chip.
3 *
4 * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #ifndef __LINUX_MFD_AXP20X_H
12 #define __LINUX_MFD_AXP20X_H
13
14 #include <linux/regmap.h>
15
16 enum {
17 AXP152_ID = 0,
18 AXP202_ID,
19 AXP209_ID,
20 AXP221_ID,
21 AXP223_ID,
22 AXP288_ID,
23 AXP806_ID,
24 AXP809_ID,
25 AXP2101_ID,
26 AXP15_ID,
27 AXP1530_ID,
28 AXP858_ID,
29 AXP803_ID,
30 AXP2202_ID,
31 AXP2585_ID,
32 NR_AXP20X_VARIANTS,
33 };
34
35 enum {
36 AXP_SPLY = 1U << 0,
37 AXP_REGU = 1U << 1,
38 AXP_INT = 1U << 2,
39 AXP_CHG = 1U << 3,
40 AXP_MISC = 1U << 4,
41 };
42
43 extern int axp_debug_mask;
44
45 #define AXP20X_DATACACHE(m) (0x04 + (m))
46
47 /* Power supply */
48 #define AXP152_PWR_OP_MODE 0x01
49 #define AXP152_LDO3456_DC1234_CTRL 0x12
50 #define AXP152_ALDO_OP_MODE 0x13
51 #define AXP152_LDO0_CTRL 0x15
52 #define AXP152_DCDC2_V_OUT 0x23
53 #define AXP152_DCDC2_V_SCAL 0x25
54 #define AXP152_DCDC1_V_OUT 0x26
55 #define AXP152_DCDC3_V_OUT 0x27
56 #define AXP152_ALDO12_V_OUT 0x28
57 #define AXP152_DLDO1_V_OUT 0x29
58 #define AXP152_DLDO2_V_OUT 0x2a
59 #define AXP152_DCDC4_V_OUT 0x2b
60 #define AXP152_V_OFF 0x31
61 #define AXP152_OFF_CTRL 0x32
62 #define AXP152_PEK_KEY 0x36
63 #define AXP152_DCDC_FREQ 0x37
64 #define AXP152_DCDC_MODE 0x80
65
66 #define AXP20X_PWR_INPUT_STATUS 0x00
67 #define AXP20X_PWR_OP_MODE 0x01
68 #define AXP20X_USB_OTG_STATUS 0x02
69 #define AXP20X_PWR_OUT_CTRL 0x12
70 #define AXP20X_DCDC2_V_OUT 0x23
71 #define AXP20X_DCDC2_LDO3_V_SCAL 0x25
72 #define AXP20X_DCDC3_V_OUT 0x27
73 #define AXP20X_LDO24_V_OUT 0x28
74 #define AXP20X_LDO3_V_OUT 0x29
75 #define AXP20X_VBUS_IPSOUT_MGMT 0x30
76 #define AXP20X_V_OFF 0x31
77 #define AXP20X_OFF_CTRL 0x32
78 #define AXP20X_CHRG_CTRL1 0x33
79 #define AXP20X_CHRG_CTRL2 0x34
80 #define AXP20X_CHRG_BAK_CTRL 0x35
81 #define AXP20X_PEK_KEY 0x36
82 #define AXP20X_DCDC_FREQ 0x37
83 #define AXP20X_V_LTF_CHRG 0x38
84 #define AXP20X_V_HTF_CHRG 0x39
85 #define AXP20X_APS_WARN_L1 0x3a
86 #define AXP20X_APS_WARN_L2 0x3b
87 #define AXP20X_V_LTF_DISCHRG 0x3c
88 #define AXP20X_V_HTF_DISCHRG 0x3d
89
90 #define AXP22X_PWR_OUT_CTRL1 0x10
91 #define AXP22X_PWR_OUT_CTRL2 0x12
92 #define AXP22X_PWR_OUT_CTRL3 0x13
93 #define AXP22X_DLDO1_V_OUT 0x15
94 #define AXP22X_DLDO2_V_OUT 0x16
95 #define AXP22X_DLDO3_V_OUT 0x17
96 #define AXP22X_DLDO4_V_OUT 0x18
97 #define AXP22X_ELDO1_V_OUT 0x19
98 #define AXP22X_ELDO2_V_OUT 0x1a
99 #define AXP22X_ELDO3_V_OUT 0x1b
100 #define AXP22X_DC5LDO_V_OUT 0x1c
101 #define AXP22X_DCDC1_V_OUT 0x21
102 #define AXP22X_DCDC2_V_OUT 0x22
103 #define AXP22X_DCDC3_V_OUT 0x23
104 #define AXP22X_DCDC4_V_OUT 0x24
105 #define AXP22X_DCDC5_V_OUT 0x25
106 #define AXP22X_DCDC23_V_RAMP_CTRL 0x27
107 #define AXP22X_ALDO1_V_OUT 0x28
108 #define AXP22X_ALDO2_V_OUT 0x29
109 #define AXP22X_ALDO3_V_OUT 0x2a
110 #define AXP22X_CHRG_CTRL3 0x35
111
112 #define AXP806_STARTUP_SRC 0x00
113 #define AXP806_CHIP_ID 0x03
114 #define AXP806_PWR_OUT_CTRL1 0x10
115 #define AXP806_PWR_OUT_CTRL2 0x11
116 #define AXP806_DCDCA_V_CTRL 0x12
117 #define AXP806_DCDCB_V_CTRL 0x13
118 #define AXP806_DCDCC_V_CTRL 0x14
119 #define AXP806_DCDCD_V_CTRL 0x15
120 #define AXP806_DCDCE_V_CTRL 0x16
121 #define AXP806_ALDO1_V_CTRL 0x17
122 #define AXP806_ALDO2_V_CTRL 0x18
123 #define AXP806_ALDO3_V_CTRL 0x19
124 #define AXP806_DCDC_MODE_CTRL1 0x1a
125 #define AXP806_DCDC_MODE_CTRL2 0x1b
126 #define AXP806_DCDC_FREQ_CTRL 0x1c
127 #define AXP806_BLDO1_V_CTRL 0x20
128 #define AXP806_BLDO2_V_CTRL 0x21
129 #define AXP806_BLDO3_V_CTRL 0x22
130 #define AXP806_BLDO4_V_CTRL 0x23
131 #define AXP806_CLDO1_V_CTRL 0x24
132 #define AXP806_CLDO2_V_CTRL 0x25
133 #define AXP806_CLDO3_V_CTRL 0x26
134 #define AXP806_VREF_TEMP_WARN_L 0xf3
135 #define AXP806_REG_ADDR_EXT 0xFF
136
137 #define AXP806_STARTUP_SOURCE (0x00)
138 #define AXP806_IC_TYPE (0x03)
139 #define AXP806_DATA_BUFFER1 (0x04)
140 #define AXP806_DATA_BUFFER2 (0x05)
141 #define AXP806_DATA_BUFFER3 (0x06)
142 #define AXP806_DATA_BUFFER4 (0x07)
143 #define AXP806_ONOFF_CTRL1 (0x10)
144 #define AXP806_ONOFF_CTRL2 (0x11)
145 #define AXP806_DCAOUT_VOL (0x12)
146 #define AXP806_DCBOUT_VOL (0x13)
147 #define AXP806_DCCOUT_VOL (0x14)
148 #define AXP806_DCDOUT_VOL (0x15)
149 #define AXP806_DCEOUT_VOL (0x16)
150 #define AXP806_ALDO1OUT_VOL (0x17)
151 #define AXP806_ALDO2OUT_VOL (0x18)
152 #define AXP806_ALDO3OUT_VOL (0x19)
153 #define AXP806_DCDC_DVM_CTRL (0x1A)
154 #define AXP806_DCDC_MODE_CTRL (0x1B)
155 #define AXP806_DCDC_FREQSET (0x1C)
156 #define AXP806_DCDC_MON_CTRL (0x1D)
157 #define AXP806_IFQ_PWROK_SET (0x1F)
158 #define AXP806_BLDO1OUT_VOL (0x20)
159 #define AXP806_BLDO2OUT_VOL (0x21)
160 #define AXP806_BLDO3OUT_VOL (0x22)
161 #define AXP806_BLDO4OUT_VOL (0x23)
162 #define AXP806_CLDO1OUT_VOL (0x24)
163 #define AXP806_CLDO2OUT_VOL (0x25)
164 #define AXP806_CLDO3OUT_VOL (0x26)
165 #define AXP806_VOFF_SET (0x31)
166 #define AXP806_OFF_CTL (0x32)
167 #define AXP806_WAKEUP_PIN_CTRL (0x35)
168 #define AXP806_POK_SET (0x36)
169 #define AXP806_INTERFACE_MODE (0x3E)
170 #define AXP806_SPECIAL_CTRL (0x3F)
171
172 #define AXP806_INTEN1 (0x40)
173 #define AXP806_INTEN2 (0x41)
174 #define AXP806_INTSTS1 (0x48)
175 #define AXP806_INTSTS2 (0x49)
176 #define AXP806_REG_ADDR_EXT 0xFF
177
178 /* Interrupt */
179 #define AXP152_IRQ1_EN 0x40
180 #define AXP152_IRQ2_EN 0x41
181 #define AXP152_IRQ3_EN 0x42
182 #define AXP152_IRQ1_STATE 0x48
183 #define AXP152_IRQ2_STATE 0x49
184 #define AXP152_IRQ3_STATE 0x4a
185
186 #define AXP20X_IRQ1_EN 0x40
187 #define AXP20X_IRQ2_EN 0x41
188 #define AXP20X_IRQ3_EN 0x42
189 #define AXP20X_IRQ4_EN 0x43
190 #define AXP20X_IRQ5_EN 0x44
191 #define AXP20X_IRQ6_EN 0x45
192 #define AXP20X_IRQ1_STATE 0x48
193 #define AXP20X_IRQ2_STATE 0x49
194 #define AXP20X_IRQ3_STATE 0x4a
195 #define AXP20X_IRQ4_STATE 0x4b
196 #define AXP20X_IRQ5_STATE 0x4c
197 #define AXP20X_IRQ6_STATE 0x4d
198
199 /* ADC */
200 #define AXP20X_ACIN_V_ADC_H 0x56
201 #define AXP20X_ACIN_V_ADC_L 0x57
202 #define AXP20X_ACIN_I_ADC_H 0x58
203 #define AXP20X_ACIN_I_ADC_L 0x59
204 #define AXP20X_VBUS_V_ADC_H 0x5a
205 #define AXP20X_VBUS_V_ADC_L 0x5b
206 #define AXP20X_VBUS_I_ADC_H 0x5c
207 #define AXP20X_VBUS_I_ADC_L 0x5d
208 #define AXP20X_TEMP_ADC_H 0x5e
209 #define AXP20X_TEMP_ADC_L 0x5f
210 #define AXP20X_TS_IN_H 0x62
211 #define AXP20X_TS_IN_L 0x63
212 #define AXP20X_GPIO0_V_ADC_H 0x64
213 #define AXP20X_GPIO0_V_ADC_L 0x65
214 #define AXP20X_GPIO1_V_ADC_H 0x66
215 #define AXP20X_GPIO1_V_ADC_L 0x67
216 #define AXP20X_PWR_BATT_H 0x70
217 #define AXP20X_PWR_BATT_M 0x71
218 #define AXP20X_PWR_BATT_L 0x72
219 #define AXP20X_BATT_V_H 0x78
220 #define AXP20X_BATT_V_L 0x79
221 #define AXP20X_BATT_CHRG_I_H 0x7a
222 #define AXP20X_BATT_CHRG_I_L 0x7b
223 #define AXP20X_BATT_DISCHRG_I_H 0x7c
224 #define AXP20X_BATT_DISCHRG_I_L 0x7d
225 #define AXP20X_IPSOUT_V_HIGH_H 0x7e
226 #define AXP20X_IPSOUT_V_HIGH_L 0x7f
227
228 /* Power supply */
229 #define AXP20X_DCDC_MODE 0x80
230 #define AXP20X_ADC_EN1 0x82
231 #define AXP20X_ADC_EN2 0x83
232 #define AXP20X_ADC_RATE 0x84
233 #define AXP20X_GPIO10_IN_RANGE 0x85
234 #define AXP20X_GPIO1_ADC_IRQ_RIS 0x86
235 #define AXP20X_GPIO1_ADC_IRQ_FAL 0x87
236 #define AXP20X_TIMER_CTRL 0x8a
237 #define AXP20X_VBUS_MON 0x8b
238 #define AXP20X_OVER_TMP 0x8f
239
240 #define AXP22X_PWREN_CTRL1 0x8c
241 #define AXP22X_PWREN_CTRL2 0x8d
242
243 /* GPIO */
244 #define AXP152_GPIO0_CTRL 0x90
245 #define AXP152_GPIO1_CTRL 0x91
246 #define AXP152_GPIO2_CTRL 0x92
247 #define AXP152_GPIO3_CTRL 0x93
248 #define AXP152_LDOGPIO2_V_OUT 0x96
249 #define AXP152_GPIO_INPUT 0x97
250 #define AXP152_PWM0_FREQ_X 0x98
251 #define AXP152_PWM0_FREQ_Y 0x99
252 #define AXP152_PWM0_DUTY_CYCLE 0x9a
253 #define AXP152_PWM1_FREQ_X 0x9b
254 #define AXP152_PWM1_FREQ_Y 0x9c
255 #define AXP152_PWM1_DUTY_CYCLE 0x9d
256
257 #define AXP20X_GPIO0_CTRL 0x90
258 #define AXP20X_LDO5_V_OUT 0x91
259 #define AXP20X_GPIO1_CTRL 0x92
260 #define AXP20X_GPIO2_CTRL 0x93
261 #define AXP20X_GPIO20_SS 0x94
262 #define AXP20X_GPIO3_CTRL 0x95
263
264 #define AXP22X_LDO_IO0_V_OUT 0x91
265 #define AXP22X_LDO_IO1_V_OUT 0x93
266 #define AXP22X_GPIO_STATE 0x94
267 #define AXP22X_GPIO_PULL_DOWN 0x95
268
269 /* Battery */
270 #define AXP20X_CHRG_CC_31_24 0xb0
271 #define AXP20X_CHRG_CC_23_16 0xb1
272 #define AXP20X_CHRG_CC_15_8 0xb2
273 #define AXP20X_CHRG_CC_7_0 0xb3
274 #define AXP20X_DISCHRG_CC_31_24 0xb4
275 #define AXP20X_DISCHRG_CC_23_16 0xb5
276 #define AXP20X_DISCHRG_CC_15_8 0xb6
277 #define AXP20X_DISCHRG_CC_7_0 0xb7
278 #define AXP20X_CC_CTRL 0xb8
279 #define AXP20X_FG_RES 0xb9
280
281 /* OCV */
282 #define AXP20X_RDC_H 0xba
283 #define AXP20X_RDC_L 0xbb
284 #define AXP20X_OCV(m) (0xc0 + (m))
285 #define AXP20X_OCV_MAX 0xf
286
287 /* Hot shutdoen */
288
289 #define AXP20X_OVER_TMP_VAL 0xf3
290
291 /* AXP22X specific registers */
292 #define AXP22X_BATLOW_THRES1 0xe6
293
294 /* AXP288 specific registers */
295 #define AXP288_PMIC_ADC_H 0x56
296 #define AXP288_PMIC_ADC_L 0x57
297 #define AXP288_ADC_TS_PIN_CTRL 0x84
298 #define AXP288_PMIC_ADC_EN 0x84
299
300 /* Fuel Gauge */
301 #define AXP288_FG_RDC1_REG 0xba
302 #define AXP288_FG_RDC0_REG 0xbb
303 #define AXP288_FG_OCVH_REG 0xbc
304 #define AXP288_FG_OCVL_REG 0xbd
305 #define AXP288_FG_OCV_CURVE_REG 0xc0
306 #define AXP288_FG_DES_CAP1_REG 0xe0
307 #define AXP288_FG_DES_CAP0_REG 0xe1
308 #define AXP288_FG_CC_MTR1_REG 0xe2
309 #define AXP288_FG_CC_MTR0_REG 0xe3
310 #define AXP288_FG_OCV_CAP_REG 0xe4
311 #define AXP288_FG_CC_CAP_REG 0xe5
312 #define AXP288_FG_LOW_CAP_REG 0xe6
313 #define AXP288_FG_TUNE0 0xe8
314 #define AXP288_FG_TUNE1 0xe9
315 #define AXP288_FG_TUNE2 0xea
316 #define AXP288_FG_TUNE3 0xeb
317 #define AXP288_FG_TUNE4 0xec
318 #define AXP288_FG_TUNE5 0xed
319
320 #define AXP2101_COMM_STAT0 (0x00)
321 #define AXP2101_COMM_STAT1 (0x01)
322 #define AXP2101_CHIP_ID (0x03)
323 #define AXP2101_DATA_BUFFER0 (0x04)
324 #define AXP2101_DATA_BUFFER1 (0x05)
325 #define AXP2101_DATA_BUFFER2 (0x06)
326 #define AXP2101_DATA_BUFFER3 (0x07)
327 #define AXP2101_COMM_FAULT (0x08)
328 #define AXP2101_COMM_CFG (0X10)
329 #define AXP2101_BATFET_CTRL (0X12)
330 #define AXP2101_DIE_TEMP_CFG (0X13)
331 #define AXP2101_VSYS_MIN (0x14)
332 #define AXP2101_VINDPM_CFG (0x15)
333 #define AXP2101_IIN_LIM (0x16)
334 #define AXP2101_RESET_CFG (0x17)
335 #define AXP2101_MODULE_EN (0x18)
336 #define AXP2101_WATCHDOG_CFG (0x19)
337 #define AXP2101_GAUGE_THLD (0x1A)
338 #define AXP2101_GPIO12_CTRL (0x1B)
339 #define AXP2101_GPIO34_CTRL (0x1C)
340 #define AXP2101_BUS_MODE_SEL (0x1D)
341 #define AXP2101_PWRON_STAT (0x20)
342 #define AXP2101_PWROFF_STAT (0x21)
343 #define AXP2101_PWROFF_EN (0x22)
344 #define AXP2101_DCDC_PWROFF_EN (0x23)
345 #define AXP2101_VOFF_THLD (0x24)
346 #define AXP2101_PWR_TIME_CTRL (0x25)
347 #define AXP2101_SLEEP_CFG (0x26)
348 #define AXP2101_PONLEVEL (0x27)
349 #define AXP2101_FAST_PWRON_CFG0 (0x28)
350 #define AXP2101_FAST_PWRON_CFG1 (0x29)
351 #define AXP2101_FAST_PWRON_CFG2 (0x2A)
352 #define AXP2101_FAST_PWRON_CFG3 (0x2B)
353 #define AXP2101_ADC_CH_EN0 (0x30)
354 #define AXP2101_ADC_CH_EN1 (0x31)
355 #define AXP2101_ADC_CH_EN2 (0x32)
356 #define AXP2101_ADC_CH_EN3 (0x33)
357 #define AXP2101_VBAT_H (0x34)
358 #define AXP2101_VBAT_L (0x35)
359 #define AXP2101_TS_H (0x36)
360 #define AXP2101_TS_L (0x37)
361 #define AXP2101_VBUS_H (0x38)
362 #define AXP2101_VBUS_L (0x39)
363 #define AXP2101_VSYS_H (0x3A)
364 #define AXP2101_VSYS_L (0x3B)
365 #define AXP2101_TDIE_H (0x3C)
366 #define AXP2101_TDIE_L (0x3D)
367 #define AXP2101_GPADC_H (0x3E)
368 #define AXP2101_GPADC_L (0x3F)
369 #define AXP2101_INTEN1 (0x40)
370 #define AXP2101_INTEN2 (0x41)
371 #define AXP2101_INTEN3 (0x42)
372 #define AXP2101_INTSTS1 (0x48)
373 #define AXP2101_INTSTS2 (0x49)
374 #define AXP2101_INTSTS3 (0x4A)
375 #define AXP2101_TS_CFG (0x50)
376
377 #define AXP2101_TS_HYSHL2H (0x52)
378 #define AXP2101_TS_HYSH21 (0x53)
379 #define AXP2101_VLTF_CHG (0x54)
380 #define AXP2101_VHTF_CHG (0x55)
381 #define AXP2101_VLTF_WORK (0x56)
382 #define AXP2101_VHTF_WORK (0x57)
383 #define AXP2101_JEITA_CFG (0x58)
384 #define AXP2101_JEITA_CV_CFG (0x59)
385 #define AXP2101_JEITA_COOL (0x5A)
386 #define AXP2101_JEITA_WARM (0x5B)
387 #define AXP2101_TS_CFG_DATA_H (0x5C)
388 #define AXP2101_TS_CFG_DATA_L (0x5D)
389 #define AXP2101_CHG_CFG (0x60)
390 #define AXP2101_IPRECHG_CFG (0x61)
391 #define AXP2101_ICC_CFG (0x62)
392 #define AXP2101_ITERM_CFG (0x63)
393 #define AXP2101_CHG_V_CFG (0x64)
394 #define AXP2101_TREGU_THLD (0x65)
395 #define AXP2101_CHG_FREQ (0x66)
396 #define AXP2101_CHG_TMR_CFG (0x67)
397 #define AXP2101_BAT_DET (0x68)
398 #define AXP2101_CHGLED_CFG (0x69)
399 #define AXP2101_BTN_CHG_CFG (0x6A)
400 #define AXP2101_SW_TEST_CFG (0x7B)
401 #define AXP2101_DCDC_CFG0 (0x80)
402 #define AXP2101_DCDC_CFG1 (0x81)
403 #define AXP2101_DCDC1_CFG (0x82)
404 #define AXP2101_DCDC2_CFG (0x83)
405 #define AXP2101_DCDC3_CFG (0x84)
406 #define AXP2101_DCDC4_CFG (0x85)
407 #define AXP2101_DCDC5_CFG (0x86)
408 #define AXP2101_DCDC_OC_CFG (0x87)
409 #define AXP2101_LDO_EN_CFG0 (0x90)
410 #define AXP2101_LDO_EN_CFG1 (0x91)
411 #define AXP2101_ALDO1_CFG (0x92)
412 #define AXP2101_ALDO2_CFG (0x93)
413 #define AXP2101_ALDO3_CFG (0x94)
414 #define AXP2101_ALDO4_CFG (0x95)
415 #define AXP2101_BLDO1_CFG (0x96)
416 #define AXP2101_BLDO2_CFG (0x97)
417 #define AXP2101_CPUSLD_CFG (0x98)
418 #define AXP2101_DLDO1_CFG (0x99)
419 #define AXP2101_DLDO2_CFG (0x9A)
420 #define AXP2101_IP_VER (0xA0)
421 #define AXP2101_BROM (0xA1)
422 #define AXP2101_CONFIG (0xA2)
423 #define AXP2101_TEMPERATURE (0xA3)
424 #define AXP2101_SOC (0xA4)
425 #define AXP2101_TIME2EMPTY_H (0xA6)
426 #define AXP2101_TIME2EMPTY_L (0xA7)
427 #define AXP2101_TIME2FULL_H (0xA8)
428 #define AXP2101_TIME2FULL_L (0xA9)
429 #define AXP2101_FW_VERSION (0xAB)
430 #define AXP2101_INT0_FLAG (0xAC)
431 #define AXP2101_COUTER_PERIOD (0xAD)
432 #define AXP2101_BG_TRIM (0xAE)
433 #define AXP2101_OSC_TRIM (0xAF)
434 #define AXP2101_FG_ADDR (0xB0)
435 #define AXP2101_FG_DATA_H (0xB2)
436 #define AXP2101_FG_DATA_L (0xB3)
437 #define AXP2101_RAM_MBIST (0xB4)
438 #define AXP2101_ROM_TEST (0xB5)
439 #define AXP2101_ROM_TEST_RT0 (0xB6)
440 #define AXP2101_ROM_TEST_RT1 (0xB7)
441 #define AXP2101_ROM_TEST_RT2 (0xB8)
442 #define AXP2101_ROM_TEST_RT3 (0xB9)
443 #define AXP2101_WD_CLR_DIS (0xBA)
444
445 #define AXP2101_BUFFERC (0xff)
446 #define AXP2101_COMM_CFG0 (0x100)
447
448 /* For AXP15 */
449 #define AXP15_STATUS (0x00)
450 #define AXP15_MODE_CHGSTATUS (0x01)
451 #define AXP15_OTG_STATUS (0x02)
452 #define AXP15_IC_TYPE (0x03)
453 #define AXP15_DATA_BUFFER1 (0x04)
454 #define AXP15_DATA_BUFFER2 (0x05)
455 #define AXP15_DATA_BUFFER3 (0x06)
456 #define AXP15_DATA_BUFFER4 (0x07)
457 #define AXP15_DATA_BUFFER5 (0x08)
458 #define AXP15_DATA_BUFFER6 (0x09)
459 #define AXP15_DATA_BUFFER7 (0x0A)
460 #define AXP15_DATA_BUFFER8 (0x0B)
461 #define AXP15_DATA_BUFFER9 (0x0C)
462 #define AXP15_DATA_BUFFERA (0x0D)
463 #define AXP15_DATA_BUFFERB (0x0E)
464 #define AXP15_DATA_BUFFERC (0x0F)
465 #define AXP15_LDO3456_DC1234_CTL (0x12)
466 #define AXP15_LDO0OUT_VOL (0x15)
467 #define AXP15_DC2OUT_VOL (0x23)
468 #define AXP15_DCDC2_DVM_CTRL (0x25)
469 #define AXP15_DC1OUT_VOL (0x26)
470 #define AXP15_DC3OUT_VOL (0x27)
471 #define AXP15_LDO34OUT_VOL (0x28)
472 #define AXP15_LDO5OUT_VOL (0x29)
473 #define AXP15_LDO6OUT_VOL (0x2A)
474 #define AXP15_DC4OUT_VOL (0x2B)
475 #define AXP15_IPS_SET (0x30)
476 #define AXP15_VOFF_SET (0x31)
477 #define AXP15_OFF_CTL (0x32)
478 #define AXP15_CHARGE1 (0x33)
479 #define AXP15_CHARGE2 (0x34)
480 #define AXP15_BACKUP_CHG (0x35)
481 #define AXP15_POK_SET (0x36)
482 #define AXP15_DCDC_FREQSET (0x37)
483 #define AXP15_VLTF_CHGSET (0x38)
484 #define AXP15_VHTF_CHGSET (0x39)
485 #define AXP15_APS_WARNING1 (0x3A)
486 #define AXP15_APS_WARNING2 (0x3B)
487 #define AXP15_TLTF_DISCHGSET (0x3C)
488 #define AXP15_THTF_DISCHGSET (0x3D)
489 #define AXP15_INTEN1 (0x40)
490 #define AXP15_INTEN2 (0x41)
491 #define AXP15_INTEN3 (0x42)
492 #define AXP15_INTSTS1 (0x48)
493 #define AXP15_INTSTS2 (0x49)
494 #define AXP15_INTSTS3 (0x4A)
495 #define AXP15_DCDC_MODESET (0x80)
496 #define AXP15_ADC_EN1 (0x82)
497 #define AXP15_ADC_EN2 (0x83)
498 #define AXP15_ADC_SPEED (0x84)
499 #define AXP15_ADC_INPUTRANGE (0x85)
500 #define AXP15_ADC_IRQ_RETFSET (0x86)
501 #define AXP15_ADC_IRQ_FETFSET (0x87)
502 #define AXP15_TIMER_CTL (0x8A)
503 #define AXP15_VBUS_DET_SRP (0x8B)
504 #define AXP15_HOTOVER_CTL (0x8F)
505 #define AXP15_GPIO0_CTL (0x90)
506 #define AXP15_GPIO1_CTL (0x91)
507 #define AXP15_GPIO2_CTL (0x92)
508 #define AXP15_GPIO3_CTL (0x93)
509 #define AXP15_GPIO012_SIGNAL (0x94)
510 #define AXP15_GPIO0_VOL (0x96)
511 #define AXP15_GPIO0123_SIGNAL (0x97)
512
513 /* For AXP1530 */
514 #define AXP1530_ON_INDICATE (0x00)
515 #define AXP1530_OFF_INDICATE (0x01)
516 #define AXP1530_IC_TYPE (0x03)
517 #define AXP1530_OUTPUT_CONTROL (0x10)
518 #define AXP1530_DCDC_DVM_PWM (0x12)
519 #define AXP1530_DCDC1_CONRTOL (0x13)
520 #define AXP1530_DCDC2_CONRTOL (0x14)
521 #define AXP1530_DCDC3_CONRTOL (0x15)
522 #define AXP1530_ALDO1_CONRTOL (0x16)
523 #define AXP1530_DLDO1_CONRTOL (0x17)
524 #define AXP1530_POWER_STATUS (0x1A)
525 #define AXP1530_PWROK_SET (0x1B)
526 #define AXP1530_WAKEUP_CONRTOL (0x1C)
527 #define AXP1530_OUTOUT_MONITOR (0x1D)
528 #define AXP1530_POK_CONRTOL (0x1E)
529 #define AXP1530_IRQ_ENABLE1 (0x20)
530 #define AXP1530_IRQ_STATUS1 (0x21)
531 #define AXP1530_LOCK_REG71 (0x70)
532 #define AXP1530_EPROM_SET (0x71)
533 #define AXP1530_DCDC12_DEFAULT (0x80)
534 #define AXP1530_DCDC3_A1D1_DEFAULT (0x81)
535 #define AXP1530_STARTUP_SEQ (0x82)
536 #define AXP1530_STARTUP_RTCLDO (0x83)
537 #define AXP1530_BIAS_I2C_ADDR (0x84)
538 #define AXP1530_VREF_VRPN (0x85)
539 #define AXP1530_VREF_VOL (0x86)
540 #define AXP1530_FREQUENCY (0x87)
541
542 /* For AXP858 */
543 #define AXP858_ON_INDICATE (0x00)
544 #define AXP858_OFF_INDICATE (0x01)
545 #define AXP858_IC_TYPE (0x03)
546 #define AXP858_DATA_BUFFER1 (0x04)
547 #define AXP858_DATA_BUFFER2 (0x05)
548 #define AXP858_DATA_BUFFER3 (0x06)
549 #define AXP858_DATA_BUFFER4 (0x07)
550
551 #define AXP858_OUTPUT_CONTROL1 (0x10)
552 #define AXP858_OUTPUT_CONTROL2 (0x11)
553 #define AXP858_OUTPUT_CONTROL3 (0x12)
554 #define AXP858_DCDC1_CONTROL (0x13)
555 #define AXP858_DCDC2_CONTROL (0x14)
556 #define AXP858_DCDC3_CONTROL (0x15)
557 #define AXP858_DCDC4_CONTROL (0x16)
558 #define AXP858_DCDC5_CONTROL (0x17)
559 #define AXP858_DCDC6_CONTROL (0x18)
560 #define AXP858_ALDO1_CONTROL (0x19)
561 #define AXP858_DCDC_MODE1 (0x1A)
562 #define AXP858_DCDC_MODE2 (0x1B)
563 #define AXP858_DCDC_MODE3 (0x1C)
564 #define AXP858_DCDC_FREQUENCY (0x1D)
565 #define AXP858_OUTPUT_MONITOR (0x1E)
566 #define AXP858_IRQ_PWROK_VOFF (0x1F)
567 #define AXP858_ALDO2_CTL (0x20)
568 #define AXP858_ALDO3_CTL (0x21)
569 #define AXP858_ALDO4_CTL (0x22)
570 #define AXP858_ALDO5_CTL (0x23)
571 #define AXP858_BLDO1_CTL (0x24)
572 #define AXP858_BLDO2_CTL (0x25)
573 #define AXP858_BLDO3_CTL (0x26)
574 #define AXP858_BLDO4_CTL (0x27)
575 #define AXP858_BLDO5_CTL (0x28)
576 #define AXP858_CLDO1_CTL (0x29)
577 #define AXP858_CLDO2_CTL (0x2A)
578 #define AXP858_CLDO3_GPIO1_CTL (0x2B)
579 #define AXP858_CLDO4_GPIO2_CTL (0x2C)
580 #define AXP858_CLDO4_CTL (0x2D)
581 #define AXP858_CPUSLDO_CTL (0x2E)
582 #define AXP858_WKP_CTL_OC_IRQ (0x31)
583 #define AXP858_POWER_DOWN_DIS (0x32)
584 #define AXP858_POK_SET (0x36)
585 #define AXP858_TWI_OR_RSB (0x3E)
586 #define AXP858_IRQ_EN1 (0x40)
587 #define AXP858_IRQ_EN2 (0x41)
588 #define AXP858_IRQ_STS1 (0x48)
589 #define AXP858_IRQ_STS2 (0x49)
590 #define AXP858_DIGITAL_PAT1 (0xF0)
591 #define AXP858_DIGITAL_PAT2 (0xF1)
592 #define AXP858_EPROM_SET (0xF2)
593 #define AXP858_VREF_TEM_SET (0xF3)
594 #define AXP858_LOCK_F0125 (0xF4)
595 #define AXP858_EPROM_TUNE (0xF5)
596 #define AXP858_ADDR_EXTEN (0xFF)
597 #define AXP858_DCDC1_PWRON_DEF (0x100)
598 #define AXP858_DCDC2_DEF (0x101)
599 #define AXP858_DCDC3_DEF (0x102)
600 #define AXP858_DCDC4_DEF (0x103)
601 #define AXP858_DCDC5_DEF (0x104)
602 #define AXP858_DCDC6_DEF (0x105)
603 #define AXP858_ALDO12_DEF (0x106)
604 #define AXP858_ALDO23_DEF (0x107)
605 #define AXP858_ALDO45_DEF (0x108)
606 #define AXP858_ALDO5_BLDO1_DEF (0x109)
607 #define AXP858_BLDO12_DEF (0x10A)
608 #define AXP858_BLDO23_DEF (0x10B)
609 #define AXP858_BLDO45_DEF (0x10C)
610 #define AXP858_BLDO5_CLDO1_DEF (0x10D)
611 #define AXP858_CLDO23_DEF (0x10E)
612 #define AXP858_CLDO34_DEF (0x10F)
613 #define AXP858_START_DCDC123 (0x110)
614 #define AXP858_START_DCDC456 (0x111)
615 #define AXP858_START_ALDO12 (0x112)
616 #define AXP858_START_ALDO345 (0x113)
617 #define AXP858_START_BLDO123 (0x114)
618 #define AXP858_START_BLDO45 (0x115)
619 #define AXP858_START_CLDO123 (0x116)
620 #define AXP858_START_CLDO34_CPUS (0x117)
621 #define AXP858_TWI_RSB_SET1 (0x118)
622 #define AXP858_TWI_RSB_SET2 (0x119)
623 #define AXP858_TWI_SET (0x11A)
624 #define AXP858_VREF_TC_ALDO3 (0x140)
625 #define AXP858_VREF_VOL (0x141)
626 #define AXP858_INTERNAL_ALDO2 (0x142)
627 #define AXP858_FREQUENCY_ALDO2 (0x143)
628
629 /* For AXP803 */
630 #define AXP803_STATUS (0x00)
631 #define AXP803_MODE_CHGSTATUS (0x01)
632 #define AXP803_IC_TYPE (0x03)
633 #define AXP803_BUFFER1 (0x04)
634 #define AXP803_BUFFER2 (0x05)
635 #define AXP803_BUFFER3 (0x06)
636 #define AXP803_BUFFER4 (0x07)
637 #define AXP803_BUFFER5 (0x08)
638 #define AXP803_BUFFER6 (0x09)
639 #define AXP803_BUFFER7 (0x0A)
640 #define AXP803_BUFFER8 (0x0B)
641 #define AXP803_BUFFER9 (0x0C)
642 #define AXP803_BUFFERA (0x0D)
643 #define AXP803_BUFFERB (0x0E)
644 #define AXP803_BUFFERC (0x0F)
645 #define AXP803_LDO_DC_EN1 (0X10)
646 #define AXP803_LDO_DC_EN2 (0X12)
647 #define AXP803_LDO_DC_EN3 (0X13)
648 #define AXP803_DLDO1OUT_VOL (0x15)
649 #define AXP803_DLDO2OUT_VOL (0x16)
650 #define AXP803_DLDO3OUT_VOL (0x17)
651 #define AXP803_DLDO4OUT_VOL (0x18)
652 #define AXP803_ELDO1OUT_VOL (0x19)
653 #define AXP803_ELDO2OUT_VOL (0x1A)
654 #define AXP803_ELDO3OUT_VOL (0x1B)
655 #define AXP803_FLDO1OUT_VOL (0x1C)
656 #define AXP803_FLDO2OUT_VOL (0x1D)
657 #define AXP803_DC1OUT_VOL (0x20)
658 #define AXP803_DC2OUT_VOL (0x21)
659 #define AXP803_DC3OUT_VOL (0x22)
660 #define AXP803_DC4OUT_VOL (0x23)
661 #define AXP803_DC5OUT_VOL (0x24)
662 #define AXP803_DC6OUT_VOL (0x25)
663 #define AXP803_DC7OUT_VOL (0x26)
664 #define AXP803_DCDC_DVM_CTL (0x27)
665 #define AXP803_ALDO1OUT_VOL (0x28)
666 #define AXP803_ALDO2OUT_VOL (0x29)
667 #define AXP803_ALDO3OUT_VOL (0x2A)
668 #define AXP803_BC_CTL (0X2C)
669 #define AXP803_IPS_SET (0x30)
670 #define AXP803_VOFF_SET (0x31)
671 #define AXP803_OFF_CTL (0x32)
672 #define AXP803_CHARGE1 (0x33)
673 #define AXP803_CHARGE2 (0x34)
674 #define AXP803_CHARGE3 (0x35)
675 #define AXP803_POK_SET (0x36)
676 #define AXP803_VLTF_CHARGE (0x38)
677 #define AXP803_VHTF_CHARGE (0x39)
678 #define AXP803_CHARGE_AC_SET (0x3A)
679 #define AXP803_DCDC_FREQSET (0x3B)
680 #define AXP803_VLTF_WORK (0x3C)
681 #define AXP803_VHTF_WORK (0x3D)
682 #define AXP803_INTEN1 (0x40)
683 #define AXP803_INTEN2 (0x41)
684 #define AXP803_INTEN3 (0x42)
685 #define AXP803_INTEN4 (0x43)
686 #define AXP803_INTEN5 (0x44)
687 #define AXP803_INTEN6 (0x45)
688 #define AXP803_INTSTS1 (0x48)
689 #define AXP803_INTSTS2 (0x49)
690 #define AXP803_INTSTS3 (0x4A)
691 #define AXP803_INTSTS4 (0x4B)
692 #define AXP803_INTSTS5 (0x4C)
693 #define AXP803_INTSTS6 (0x4D)
694 #define AXP803_INTTEMP (0x56)
695 #define AXP803_VTS_RES (0x58)
696 #define AXP803_VBATH_RES (0x78)
697 #define AXP803_VBATL_RES (0x79)
698 #define AXP803_IBATH_REG (0x7A)
699 #define AXP803_DISIBATH_REG (0x7C)
700 #define AXP803_DCDC_MODESET (0x80)
701 #define AXP803_ADC_EN (0x82)
702 #define AXP803_ADC_SPEED_SET (0x85)
703 #define AXP803_HOTOVER_CTL (0x8F)
704 #define AXP803_GPIO0_CTL (0x90)
705 #define AXP803_GPIO0LDOOUT_VOL (0x91)
706 #define AXP803_GPIO1_CTL (0x92)
707 #define AXP803_GPIO1LDOOUT_VOL (0x93)
708 #define AXP803_GPIO01_SIGNAL (0x94)
709 #define AXP803_BAT_CHGCOULOMB3 (0xB0)
710 #define AXP803_BAT_CHGCOULOMB2 (0xB1)
711 #define AXP803_BAT_CHGCOULOMB1 (0xB2)
712 #define AXP803_BAT_CHGCOULOMB0 (0xB3)
713 #define AXP803_BAT_DISCHGCOULOMB3 (0xB4)
714 #define AXP803_BAT_DISCHGCOULOMB2 (0xB5)
715 #define AXP803_BAT_DISCHGCOULOMB1 (0xB6)
716 #define AXP803_BAT_DISCHGCOULOMB0 (0xB7)
717 #define AXP803_COULOMB_CTL (0xB8)
718 #define AXP803_CAP (0xB9)
719 #define AXP803_RDC0 (0xBA)
720 #define AXP803_RDC1 (0xBB)
721 #define AXP803_OCVBATH_RES (0xBC)
722 #define AXP803_OCVBATL_RES (0xBD)
723 #define AXP803_OCVCAP (0xC0)
724 #define AXP803_BATCAP0 (0xE0)
725 #define AXP803_BATCAP1 (0xE1)
726 #define AXP803_COUCNT0 (0xE2)
727 #define AXP803_COUCNT1 (0xE3)
728 #define AXP803_OCV_PERCENT (0xE4)
729 #define AXP803_COU_PERCENT (0xE5)
730 #define AXP803_WARNING_LEVEL (0xE6)
731 #define AXP803_ADJUST_PARA (0xE8)
732 #define AXP803_ADJUST_PARA1 (0xE9)
733 #define AXP803_HOTOVER_VAL (0xF3)
734 #define AXP803_REG_ADDR_EXT (0xFF)
735
736 /*
737 * axp2202 define
738 */
739 #define AXP2202_COMM_STAT0 (0x00)
740 #define AXP2202_COMM_STAT1 (0x01)
741 #define AXP2202_CHIP_ID (0x03)
742 #define AXP2202_CHIP_VER (0x04)
743 #define AXP2202_BC_DECT (0x05)
744 #define AXP2202_ILIM_TYPE (0x06)
745 #define AXP2202_COMM_FAULT (0x08)
746 #define AXP2202_ICO_CFG (0x0a)
747 #define AXP2202_CLK_EN (0x0b)
748 #define AXP2202_VBUS_TYPE (0x0f)
749
750 #define AXP2202_COMM_CFG (0x10)
751 #define AXP2202_BATFET_CTRL (0x12)
752 #define AXP2202_RBFET_CTRL (0x13)
753 #define AXP2202_DIE_TEMP_CFG (0x14)
754 #define AXP2202_VSYS_MIN (0x15)
755 #define AXP2202_VINDPM_CFG (0x16)
756 #define AXP2202_IIN_LIM (0x17)
757 #define AXP2202_RESET_CFG (0x18)
758 #define AXP2202_MODULE_EN (0x19)
759 #define AXP2202_WATCHDOG_CFG (0x1a)
760 #define AXP2202_GAUGE_THLD (0x1b)
761 #define AXP2202_GPIO_CTRL (0x1c)
762 #define AXP2202_LOW_POWER_CFG (0x1d)
763 #define AXP2202_BST_CFG0 (0x1e)
764 #define AXP2202_BST_CFG1 (0x1f)
765
766 #define AXP2202_PWRON_STAT (0x20)
767 #define AXP2202_PWROFF_STAT (0x21)
768 #define AXP2202_PWROFF_EN (0x22)
769 #define AXP2202_DCDC_PWROFF_EN (0x23)
770 #define AXP2202_PWR_TIME_CTRL (0x24)
771 #define AXP2202_SLEEP_CFG (0x25)
772 #define AXP2202_PONLEVEL (0x26)
773 #define AXP2202_SOFT_PWROFF (0x27)
774 #define AXP2202_AUTO_SLP_MAP0 (0x28)
775 #define AXP2202_AUTOSLP_MAP1 (0x29)
776 #define AXP2202_AUTOSLP_MAP2 (0x2a)
777 #define AXP2202_FAST_PWRON_CFG0 (0x2b)
778 #define AXP2202_FAST_PWRON_CFG1 (0x2c)
779 #define AXP2202_FAST_PWRON_CFG2 (0x2d)
780 #define AXP2202_FAST_PWRON_CFG3 (0x2e)
781 #define AXP2202_FAST_PWRON_CFG4 (0x2f)
782 #define AXP2202_I2C_CFG (0x30)
783 #define AXP2202_BUS_MODE_SEL (0x3e)
784
785 #define AXP2202_IRQ_EN0 (0x40)
786 #define AXP2202_IRQ_EN1 (0x41)
787 #define AXP2202_IRQ_EN2 (0x42)
788 #define AXP2202_IRQ_EN3 (0x43)
789 #define AXP2202_IRQ_EN4 (0x44)
790 #define AXP2202_IRQ0 (0x48)
791 #define AXP2202_IRQ1 (0x49)
792 #define AXP2202_IRQ2 (0x4a)
793 #define AXP2202_IRQ3 (0x4b)
794 #define AXP2202_IRQ4 (0x4c)
795
796 #define AXP2202_TS_CFG (0x50)
797 #define AXP2202_TS_HYSL2H (0x52)
798 #define AXP2202_TS_HYSH2L (0x53)
799 #define AXP2202_VLTF_CHG (0x54)
800 #define AXP2202_VHTF_CHG (0x55)
801 #define AXP2202_VLTF_WORK (0x56)
802 #define AXP2202_VHTF_WORK (0x57)
803 #define AXP2202_JEITA_CFG (0x58)
804 #define AXP2202_JEITA_CV_CFG (0x59)
805 #define AXP2202_JEITA_COOL (0x5a)
806 #define AXP2202_JEITA_WARM (0x5b)
807 #define AXP2202_TS_CFG_DATA_H (0x5c)
808 #define AXP2202_TS_CFG_DATA_L (0x5d)
809
810 #define AXP2202_RECHG_CFG (0x60)
811 #define AXP2202_IPRECHG_CFG (0x61)
812 #define AXP2202_ICC_CFG (0x62)
813 #define AXP2202_ITERM_CFG (0x63)
814 #define AXP2202_VTERM_CFG (0x64)
815 #define AXP2202_TREGU_THLD (0x65)
816 #define AXP2202_CHG_FREQ (0x66)
817 #define AXP2202_CHG_TMR_CFG (0x67)
818 #define AXP2202_BAT_DET (0x68)
819 #define AXP2202_IR_COMP (0x69)
820 #define AXP2202_BTN_CHG_CFG (0x6a)
821 #define AXP2202_SW_TEST_CFG (0x6b)
822
823 #define AXP2202_CHGLED_CFG (0x70)
824 #define AXP2202_LOW_NUM (0x72)
825 #define AXP2202_HIGH_NUM (0x73)
826 #define AXP2202_TRANS_NUM (0x74)
827 #define AXP2202_DUTY_STEP (0x76)
828 #define AXP2202_DUTY_MIN (0x77)
829 #define AXP2202_PWN_PERIOD (0x78)
830
831 #define AXP2202_DCDC_CFG0 (0x80)
832 #define AXP2202_DCDC_CFG1 (0x81)
833 #define AXP2202_DCDC_CFG2 (0x82)
834 #define AXP2202_DCDC1_CFG (0x83)
835 #define AXP2202_DCDC2_CFG (0x84)
836 #define AXP2202_DCDC3_CFG (0x85)
837 #define AXP2202_DCDC4_CFG (0x86)
838 #define AXP2202_DVM_STAT (0x87)
839 #define AXP2202_DCDC_OC_CFG (0x88)
840 #define AXP2202_DCDC_VDSDT_ADJ (0x89)
841
842 #define AXP2202_LDO_EN_CFG0 (0x90)
843 #define AXP2202_LDO_EN_CFG1 (0x91)
844 #define AXP2202_ALDO1_CFG (0x93)
845 #define AXP2202_ALDO2_CFG (0x94)
846 #define AXP2202_ALDO3_CFG (0x95)
847 #define AXP2202_ALDO4_CFG (0x96)
848 #define AXP2202_BLDO1_CFG (0x97)
849 #define AXP2202_BLDO2_CFG (0x98)
850 #define AXP2202_BLDO3_CFG (0x99)
851 #define AXP2202_BLDO4_CFG (0x9a)
852 #define AXP2202_CLDO1_CFG (0x9b)
853 #define AXP2202_CLDO2_CFG (0x9c)
854 #define AXP2202_CLDO3_CFG (0x9d)
855 #define AXP2202_CLDO4_CFG (0x9e)
856 #define AXP2202_CPUSLDO_CFG (0x9f)
857
858 #define AXP2202_GAUGE_IP_VER (0xa0)
859 #define AXP2202_GAUGE_BROM (0xa1)
860 #define AXP2202_GAUGE_CONFIG (0xa2)
861 #define AXP2202_GAUGE_TEMP (0xa3)
862 #define AXP2202_GAUGE_SOC (0xa4)
863 #define AXP2202_GAUGE_TIME2EMPTY_H (0xa6)
864 #define AXP2202_GAUGE_TIME2EMPTY_L (0xa7)
865 #define AXP2202_GAUGE_TIME2FULL_H (0xa8)
866 #define AXP2202_GAUGE_TIME2FULL_L (0xa9)
867 #define AXP2202_GAUGE_FW_VERSION (0xab)
868 #define AXP2202_GAUGE_INT0_FLAG (0xac)
869 #define AXP2202_GAUGE_COUTER_PERIOD (0xad)
870 #define AXP2202_GAUGE_FG_ADDR (0xb0)
871 #define AXP2202_GAUGE_FG_DATA_H (0xb2)
872 #define AXP2202_GAUGE_FG_DATA_L (0xb3)
873 #define AXP2202_GAUGE_RAM_MBIST (0xb4)
874 #define AXP2202_GAUGE_ROM_TEST (0xb5)
875 #define AXP2202_GAUGE_ROM_TEST_RT0 (0xb6)
876 #define AXP2202_GAUGE_ROM_TEST_RT1 (0xb7)
877 #define AXP2202_GAUGE_ROM_TEST_RT2 (0xb8)
878 #define AXP2202_GAUGE_ROM_TEST_RT3 (0xb9)
879 #define AXP2202_GAUGE_WD_CLR_DIS (0xba)
880
881 #define AXP2202_ADC_CH_EN0 (0xc0)
882 #define AXP2202_ADC_CH_EN1 (0xc1)
883 #define AXP2202_ADC_CH_EN2 (0xc2)
884 #define AXP2202_ADC_CH_EN3 (0xc3)
885 #define AXP2202_VBAT_H (0xc4)
886 #define AXP2202_VBAT_L (0xc5)
887 #define AXP2202_VBUS_H (0xc6)
888 #define AXP2202_VBUS_L (0xc7)
889 #define AXP2202_VSYS_H (0xc8)
890 #define AXP2202_VSYS_L (0xc9)
891 #define AXP2202_ICHG_H (0xca)
892 #define AXP2202_ICHG_L (0xcb)
893 #define AXP2202_CH_DBG_SEL (0xcc)
894 #define AXP2202_ADC_DATA_SEL (0xcd)
895 #define AXP2202_ADC_DATA_H (0xce)
896 #define AXP2202_ADC_DATA_L (0xcf)
897
898 #define AXP2202_BC_CFG0 (0xd0)
899 #define AXP2202_BC_CFG1 (0xd1)
900 #define AXP2202_BC_CFG2 (0xd2)
901 #define AXP2202_BC_CFG3 (0xd3)
902
903 #define AXP2202_CC_VERSION (0xe0)
904 #define AXP2202_CC_GLB_CTRL (0xe1)
905 #define AXP2202_CC_LP_CTRL (0xe2)
906 #define AXP2202_CC_MODE_CTRL (0xe3)
907 #define AXP2202_CC_TGL_CTRL0 (0xe4)
908 #define AXP2202_CC_TGL_CTRL1 (0xe5)
909 #define AXP2202_CC_ANA_CTRL (0xe6)
910 #define AXP2202_CC_STAT0 (0xe7)
911 #define AXP2202_CC_STAT1 (0xe8)
912 #define AXP2202_CC_STAT2 (0xe9)
913 #define AXP2202_CC_STAT3 (0xea)
914 #define AXP2202_CC_STAT4 (0xeb)
915 #define AXP2202_CC_ANA_STAT0 (0xec)
916 #define AXP2202_CC_ANA_STAT1 (0xed)
917 #define AXP2202_CC_ANA_STAT2 (0xee)
918
919 #define AXP2202_EFUS_OP_CFG (0xf0)
920 #define AXP2202_EFREG_CTRL (0xf1)
921 #define AXP2202_TWI_ADDR_EXT (0xff)
922 /*
923 * end of define axp2202
924 */
925
926 /* For axp2585 */
927 #define AXP2585_STATUS (0x00)
928 #define AXP2585_IC_TYPE (0x03)
929 #define AXP2585_ILIMIT (0x10)
930 #define AXP2585_RBFET_SET (0x11)
931 #define AXP2585_POK_SET (0x15)
932 #define AXP2585_GPIO1_CTL (0x18)
933 #define AXP2585_GPIO2_CTL (0x19)
934 #define AXP2585_GPIO1_SIGNAL (0x1A)
935 #define AXP2585_CC_EN (0x22)
936 #define AXP2585_ADC_EN (0x24)
937 #define AXP2585_OFF_CTL (0x28)
938 #define AXP2585_CC_LOW_POWER_CTRL (0x32)
939 #define AXP2585_CC_MODE_CTRL (0x33)
940 #define AXP2585_CC_STATUS0 (0x37)
941 #define AXP2585_INTEN1 (0x40)
942 #define AXP2585_INTEN2 (0x41)
943 #define AXP2585_INTEN3 (0x42)
944 #define AXP2585_INTEN4 (0x43)
945 #define AXP2585_INTEN5 (0x44)
946 #define AXP2585_INTEN6 (0x45)
947 #define AXP2585_INTSTS1 (0x48)
948 #define AXP2585_INTSTS2 (0x49)
949 #define AXP2585_INTSTS3 (0x4A)
950 #define AXP2585_INTSTS4 (0x4B)
951 #define AXP2585_INTSTS5 (0x4C)
952 #define AXP2585_INTSTS6 (0x4D)
953 #define AXP2585_VBATH_REG (0x78)
954 #define AXP2585_IBATH_REG (0x7A)
955 #define AXP2585_DISIBATH_REG (0x7c)
956 #define AXP2585_ADC_CONTROL (0x80)
957 #define AXP2585_TS_PIN_CONTROL (0x81)
958 #define AXP2585_VLTF_CHARGE (0x84)
959 #define AXP2585_VHTF_CHARGE (0x85)
960 #define AXP2585_VLTF_WORK (0x86)
961 #define AXP2585_VHTF_WORK (0x87)
962 #define AXP2585_ICC_CFG (0x8B)
963 #define AXP2585_CHARGE_CONTROL2 (0x8C)
964 #define AXP2585_TIMER2_SET (0x8E)
965 #define AXP2585_COULOMB_CTL (0xB8)
966 #define AXP2585_CAP (0xB9)
967 #define AXP2585_RDC0 (0xBA)
968 #define AXP2585_RDC1 (0xBB)
969 #define AXP2585_BATCAP0 (0xE0)
970 #define AXP2585_BATCAP1 (0xE1)
971 #define AXP2585_WARNING_LEVEL (0xE6)
972 #define AXP2585_ADJUST_PARA (0xE8)
973 #define AXP2585_ADJUST_PARA1 (0xE9)
974 #define AXP2585_ADDR_EXTENSION (0xFF)
975
976 /* Regulators IDs */
977 enum {
978 AXP152_DCDC1 = 0,
979 AXP152_DCDC2,
980 AXP152_DCDC3,
981 AXP152_DCDC4,
982 AXP152_ALDO1,
983 AXP152_ALDO2,
984 AXP152_DLDO1,
985 AXP152_DLDO2,
986 AXP152_LDO0,
987 AXP152_GPIO2_LDO,
988 AXP152_RTC13,
989 AXP152_RTC18,
990 AXP152_REG_ID_MAX,
991 };
992
993 enum {
994 AXP20X_LDO1 = 0,
995 AXP20X_LDO2,
996 AXP20X_LDO3,
997 AXP20X_LDO4,
998 AXP20X_LDO5,
999 AXP20X_DCDC2,
1000 AXP20X_DCDC3,
1001 AXP20X_REG_ID_MAX,
1002 };
1003
1004 enum {
1005 AXP22X_DCDC1 = 0,
1006 AXP22X_DCDC2,
1007 AXP22X_DCDC3,
1008 AXP22X_DCDC4,
1009 AXP22X_DCDC5,
1010 AXP22X_DC1SW,
1011 AXP22X_DC5LDO,
1012 AXP22X_ALDO1,
1013 AXP22X_ALDO2,
1014 AXP22X_ALDO3,
1015 AXP22X_ELDO1,
1016 AXP22X_ELDO2,
1017 AXP22X_ELDO3,
1018 AXP22X_DLDO1,
1019 AXP22X_DLDO2,
1020 AXP22X_DLDO3,
1021 AXP22X_DLDO4,
1022 AXP22X_RTC_LDO,
1023 AXP22X_LDO_IO0,
1024 AXP22X_LDO_IO1,
1025 AXP22X_REG_ID_MAX,
1026 };
1027
1028 enum {
1029 AXP806_DCDCA = 0,
1030 AXP806_DCDCB,
1031 AXP806_DCDCC,
1032 AXP806_DCDCD,
1033 AXP806_DCDCE,
1034 AXP806_ALDO1,
1035 AXP806_ALDO2,
1036 AXP806_ALDO3,
1037 AXP806_BLDO1,
1038 AXP806_BLDO2,
1039 AXP806_BLDO3,
1040 AXP806_BLDO4,
1041 AXP806_CLDO1,
1042 AXP806_CLDO2,
1043 AXP806_CLDO3,
1044 AXP806_SW,
1045 AXP806_REG_ID_MAX,
1046 };
1047
1048 enum {
1049 AXP809_DCDC1 = 0,
1050 AXP809_DCDC2,
1051 AXP809_DCDC3,
1052 AXP809_DCDC4,
1053 AXP809_DCDC5,
1054 AXP809_DC1SW,
1055 AXP809_DC5LDO,
1056 AXP809_ALDO1,
1057 AXP809_ALDO2,
1058 AXP809_ALDO3,
1059 AXP809_ELDO1,
1060 AXP809_ELDO2,
1061 AXP809_ELDO3,
1062 AXP809_DLDO1,
1063 AXP809_DLDO2,
1064 AXP809_RTC_LDO,
1065 AXP809_LDO_IO0,
1066 AXP809_LDO_IO1,
1067 AXP809_SW,
1068 AXP809_REG_ID_MAX,
1069 };
1070
1071 enum {
1072 AXP2101_DCDC1 = 0,
1073 AXP2101_DCDC2,
1074 AXP2101_DCDC3,
1075 AXP2101_DCDC4,
1076 AXP2101_DCDC5,
1077 AXP2101_LDO1, /* RTCLDO */
1078 AXP2101_LDO2, /* RTCLDO1 */
1079 AXP2101_LDO3, /* ALDO1 */
1080 AXP2101_LDO4, /* ALDO2 */
1081 AXP2101_LDO5, /* ALDO3 */
1082 AXP2101_LDO6, /* ALDO4 */
1083 AXP2101_LDO7, /* BLDO1 */
1084 AXP2101_LDO8, /* BLDO2 */
1085 AXP2101_LDO9, /* DLDO1 */
1086 AXP2101_LDO10, /* DLDO2 */
1087 AXP2101_LDO11, /* CPULDOS */
1088 AXP2101_REG_ID_MAX,
1089 };
1090
1091 enum {
1092 AXP15_DCDC1 = 0,
1093 AXP15_DCDC2,
1094 AXP15_DCDC3,
1095 AXP15_DCDC4,
1096 AXP15_DCDC5,
1097 AXP15_LDO1, /* RTCLDO */
1098 AXP15_LDO2, /* RTCLDO1 */
1099 AXP15_LDO3, /* ALDO1 */
1100 AXP15_LDO4, /* ALDO2 */
1101 AXP15_LDO5, /* ALDO3 */
1102 AXP15_LDO6, /* ALDO4 */
1103 AXP15_LDO7, /* BLDO1 */
1104 AXP15_REG_ID_MAX,
1105 };
1106
1107 enum {
1108 AXP1530_DCDC1 = 0,
1109 AXP1530_DCDC2,
1110 AXP1530_DCDC3,
1111 AXP1530_LDO1, /* RTCLDO */
1112 AXP1530_LDO2, /* RTCLDO1 */
1113 AXP1530_REG_ID_MAX,
1114 };
1115
1116 enum {
1117 AXP858_DCDC1 = 0,
1118 AXP858_DCDC2,
1119 AXP858_DCDC3,
1120 AXP858_DCDC4,
1121 AXP858_DCDC5,
1122 AXP858_DCDC6,
1123 AXP858_ALDO1,
1124 AXP858_ALDO2,
1125 AXP858_ALDO3,
1126 AXP858_ALDO4,
1127 AXP858_ALDO5,
1128 AXP858_BLDO1,
1129 AXP858_BLDO2,
1130 AXP858_BLDO3,
1131 AXP858_BLDO4,
1132 AXP858_BLDO5,
1133 AXP858_CLDO1,
1134 AXP858_CLDO2,
1135 AXP858_CLDO3,
1136 AXP858_CLDO4,
1137 AXP858_CPUSLDO,
1138 AXP858_DC1SW,
1139 AXP858_REG_ID_MAX,
1140 };
1141
1142 enum {
1143 AXP803_DCDC1 = 0,
1144 AXP803_DCDC2,
1145 AXP803_DCDC3,
1146 AXP803_DCDC4,
1147 AXP803_DCDC5,
1148 AXP803_DCDC6,
1149 AXP803_DCDC7,
1150 AXP803_RTCLDO,
1151 AXP803_ALDO1,
1152 AXP803_ALDO2,
1153 AXP803_ALDO3,
1154 AXP803_DLDO1,
1155 AXP803_DLDO2,
1156 AXP803_DLDO3,
1157 AXP803_DLDO4,
1158 AXP803_ELDO1,
1159 AXP803_ELDO2,
1160 AXP803_ELDO3,
1161 AXP803_FLDO1,
1162 AXP803_FLDO2,
1163 AXP803_LDOIO0,
1164 AXP803_LDOIO1,
1165 AXP803_DC1SW,
1166 AXP803_REG_ID_MAX,
1167 };
1168
1169 enum {
1170 AXP2585_REG_ID_MAX = 0,
1171 };
1172
1173 /* IRQs */
1174 enum {
1175 AXP152_IRQ_LDO0IN_CONNECT = 1,
1176 AXP152_IRQ_LDO0IN_REMOVAL,
1177 AXP152_IRQ_ALDO0IN_CONNECT,
1178 AXP152_IRQ_ALDO0IN_REMOVAL,
1179 AXP152_IRQ_DCDC1_V_LOW,
1180 AXP152_IRQ_DCDC2_V_LOW,
1181 AXP152_IRQ_DCDC3_V_LOW,
1182 AXP152_IRQ_DCDC4_V_LOW,
1183 AXP152_IRQ_PEK_SHORT,
1184 AXP152_IRQ_PEK_LONG,
1185 AXP152_IRQ_TIMER,
1186 AXP152_IRQ_PEK_RIS_EDGE,
1187 AXP152_IRQ_PEK_FAL_EDGE,
1188 AXP152_IRQ_GPIO3_INPUT,
1189 AXP152_IRQ_GPIO2_INPUT,
1190 AXP152_IRQ_GPIO1_INPUT,
1191 AXP152_IRQ_GPIO0_INPUT,
1192 };
1193
1194 enum {
1195 AXP20X_IRQ_ACIN_OVER_V = 1,
1196 AXP20X_IRQ_ACIN_PLUGIN,
1197 AXP20X_IRQ_ACIN_REMOVAL,
1198 AXP20X_IRQ_VBUS_OVER_V,
1199 AXP20X_IRQ_VBUS_PLUGIN,
1200 AXP20X_IRQ_VBUS_REMOVAL,
1201 AXP20X_IRQ_VBUS_V_LOW,
1202 AXP20X_IRQ_BATT_PLUGIN,
1203 AXP20X_IRQ_BATT_REMOVAL,
1204 AXP20X_IRQ_BATT_ENT_ACT_MODE,
1205 AXP20X_IRQ_BATT_EXIT_ACT_MODE,
1206 AXP20X_IRQ_CHARG,
1207 AXP20X_IRQ_CHARG_DONE,
1208 AXP20X_IRQ_BATT_TEMP_HIGH,
1209 AXP20X_IRQ_BATT_TEMP_LOW,
1210 AXP20X_IRQ_DIE_TEMP_HIGH,
1211 AXP20X_IRQ_CHARG_I_LOW,
1212 AXP20X_IRQ_DCDC1_V_LONG,
1213 AXP20X_IRQ_DCDC2_V_LONG,
1214 AXP20X_IRQ_DCDC3_V_LONG,
1215 AXP20X_IRQ_PEK_SHORT = 22,
1216 AXP20X_IRQ_PEK_LONG,
1217 AXP20X_IRQ_N_OE_PWR_ON,
1218 AXP20X_IRQ_N_OE_PWR_OFF,
1219 AXP20X_IRQ_VBUS_VALID,
1220 AXP20X_IRQ_VBUS_NOT_VALID,
1221 AXP20X_IRQ_VBUS_SESS_VALID,
1222 AXP20X_IRQ_VBUS_SESS_END,
1223 AXP20X_IRQ_LOW_PWR_LVL1,
1224 AXP20X_IRQ_LOW_PWR_LVL2,
1225 AXP20X_IRQ_TIMER,
1226 AXP20X_IRQ_PEK_RIS_EDGE,
1227 AXP20X_IRQ_PEK_FAL_EDGE,
1228 AXP20X_IRQ_GPIO3_INPUT,
1229 AXP20X_IRQ_GPIO2_INPUT,
1230 AXP20X_IRQ_GPIO1_INPUT,
1231 AXP20X_IRQ_GPIO0_INPUT,
1232 };
1233
1234 enum axp22x_irqs {
1235 AXP22X_IRQ_ACIN_OVER_V = 1,
1236 AXP22X_IRQ_ACIN_PLUGIN,
1237 AXP22X_IRQ_ACIN_REMOVAL,
1238 AXP22X_IRQ_VBUS_OVER_V,
1239 AXP22X_IRQ_VBUS_PLUGIN,
1240 AXP22X_IRQ_VBUS_REMOVAL,
1241 AXP22X_IRQ_VBUS_V_LOW,
1242 AXP22X_IRQ_BATT_PLUGIN,
1243 AXP22X_IRQ_BATT_REMOVAL,
1244 AXP22X_IRQ_BATT_ENT_ACT_MODE,
1245 AXP22X_IRQ_BATT_EXIT_ACT_MODE,
1246 AXP22X_IRQ_CHARG,
1247 AXP22X_IRQ_CHARG_DONE,
1248 AXP22X_IRQ_BATT_TEMP_HIGH,
1249 AXP22X_IRQ_BATT_TEMP_LOW,
1250 AXP22X_IRQ_DIE_TEMP_HIGH,
1251 AXP22X_IRQ_PEK_SHORT,
1252 AXP22X_IRQ_PEK_LONG,
1253 AXP22X_IRQ_LOW_PWR_LVL1,
1254 AXP22X_IRQ_LOW_PWR_LVL2,
1255 AXP22X_IRQ_TIMER,
1256 AXP22X_IRQ_PEK_RIS_EDGE,
1257 AXP22X_IRQ_PEK_FAL_EDGE,
1258 AXP22X_IRQ_GPIO1_INPUT,
1259 AXP22X_IRQ_GPIO0_INPUT,
1260 };
1261
1262 enum axp288_irqs {
1263 AXP288_IRQ_VBUS_FALL = 2,
1264 AXP288_IRQ_VBUS_RISE,
1265 AXP288_IRQ_OV,
1266 AXP288_IRQ_FALLING_ALT,
1267 AXP288_IRQ_RISING_ALT,
1268 AXP288_IRQ_OV_ALT,
1269 AXP288_IRQ_DONE = 10,
1270 AXP288_IRQ_CHARGING,
1271 AXP288_IRQ_SAFE_QUIT,
1272 AXP288_IRQ_SAFE_ENTER,
1273 AXP288_IRQ_ABSENT,
1274 AXP288_IRQ_APPEND,
1275 AXP288_IRQ_QWBTU,
1276 AXP288_IRQ_WBTU,
1277 AXP288_IRQ_QWBTO,
1278 AXP288_IRQ_WBTO,
1279 AXP288_IRQ_QCBTU,
1280 AXP288_IRQ_CBTU,
1281 AXP288_IRQ_QCBTO,
1282 AXP288_IRQ_CBTO,
1283 AXP288_IRQ_WL2,
1284 AXP288_IRQ_WL1,
1285 AXP288_IRQ_GPADC,
1286 AXP288_IRQ_OT = 31,
1287 AXP288_IRQ_GPIO0,
1288 AXP288_IRQ_GPIO1,
1289 AXP288_IRQ_POKO,
1290 AXP288_IRQ_POKL,
1291 AXP288_IRQ_POKS,
1292 AXP288_IRQ_POKN,
1293 AXP288_IRQ_POKP,
1294 AXP288_IRQ_TIMER,
1295 AXP288_IRQ_MV_CHNG,
1296 AXP288_IRQ_BC_USB_CHNG,
1297 };
1298
1299 enum axp806_irqs {
1300 AXP806_IRQ_DIE_TEMP_HIGH_LV1,
1301 AXP806_IRQ_DIE_TEMP_HIGH_LV2,
1302 AXP806_IRQ_DCDCA_V_LOW = 3,
1303 AXP806_IRQ_DCDCB_V_LOW,
1304 AXP806_IRQ_DCDCC_V_LOW,
1305 AXP806_IRQ_DCDCD_V_LOW,
1306 AXP806_IRQ_DCDCE_V_LOW,
1307 AXP806_IRQ_PWROK_LONG,
1308 AXP806_IRQ_PWROK_SHORT,
1309 AXP806_IRQ_WAKEUP = 12,
1310 AXP806_IRQ_PWROK_FALL,
1311 AXP806_IRQ_PWROK_RISE,
1312 };
1313
1314 enum axp809_irqs {
1315 AXP809_IRQ_ACIN_OVER_V = 1,
1316 AXP809_IRQ_ACIN_PLUGIN,
1317 AXP809_IRQ_ACIN_REMOVAL,
1318 AXP809_IRQ_VBUS_OVER_V,
1319 AXP809_IRQ_VBUS_PLUGIN,
1320 AXP809_IRQ_VBUS_REMOVAL,
1321 AXP809_IRQ_VBUS_V_LOW,
1322 AXP809_IRQ_BATT_PLUGIN,
1323 AXP809_IRQ_BATT_REMOVAL,
1324 AXP809_IRQ_BATT_ENT_ACT_MODE,
1325 AXP809_IRQ_BATT_EXIT_ACT_MODE,
1326 AXP809_IRQ_CHARG,
1327 AXP809_IRQ_CHARG_DONE,
1328 AXP809_IRQ_BATT_CHG_TEMP_HIGH,
1329 AXP809_IRQ_BATT_CHG_TEMP_HIGH_END,
1330 AXP809_IRQ_BATT_CHG_TEMP_LOW,
1331 AXP809_IRQ_BATT_CHG_TEMP_LOW_END,
1332 AXP809_IRQ_BATT_ACT_TEMP_HIGH,
1333 AXP809_IRQ_BATT_ACT_TEMP_HIGH_END,
1334 AXP809_IRQ_BATT_ACT_TEMP_LOW,
1335 AXP809_IRQ_BATT_ACT_TEMP_LOW_END,
1336 AXP809_IRQ_DIE_TEMP_HIGH,
1337 AXP809_IRQ_LOW_PWR_LVL1,
1338 AXP809_IRQ_LOW_PWR_LVL2,
1339 AXP809_IRQ_TIMER,
1340 AXP809_IRQ_PEK_RIS_EDGE,
1341 AXP809_IRQ_PEK_FAL_EDGE,
1342 AXP809_IRQ_PEK_SHORT,
1343 AXP809_IRQ_PEK_LONG,
1344 AXP809_IRQ_PEK_OVER_OFF,
1345 AXP809_IRQ_GPIO1_INPUT,
1346 AXP809_IRQ_GPIO0_INPUT,
1347 };
1348
1349 enum axp2101_irqs {
1350 /* irq0 */
1351 AXP2101_IRQ_BWUT,
1352 AXP2101_IRQ_BWOT,
1353 AXP2101_IRQ_BCUT,
1354 AXP2101_IRQ_BCOT,
1355 AXP2101_IRQ_NEWSOC,
1356 AXP2101_IRQ_GWDT,
1357 AXP2101_IRQ_SOCWL1,
1358 AXP2101_IRQ_SOCWL2,
1359 /* irq1 */
1360 AXP2101_IRQ_PONP,
1361 AXP2101_IRQ_PONN,
1362 AXP2101_IRQ_PONL,
1363 AXP2101_IRQ_PONS,
1364 AXP2101_IRQ_BREMOV,
1365 AXP2101_IRQ_BINSERT,
1366 AXP2101_IRQ_VREMOV,
1367 AXP2101_IRQ_VINSET,
1368 /* irq2 */
1369 AXP2101_IRQ_BOVP,
1370 AXP2101_IRQ_CHGTE,
1371 AXP2101_IRQ_DOTL1,
1372 AXP2101_IRQ_CHGST,
1373 AXP2101_IRQ_CHGDN,
1374 AXP2101_IRQ_BOCP,
1375 AXP2101_IRQ_LDOOC,
1376 AXP2101_IRQ_WDEXP,
1377 };
1378
1379 enum axp15_irqs {
1380 /* irq0 */
1381 AXP15_IRQ_ALDOIN_H2L = 2,
1382 AXP15_IRQ_ALDOIN_L2H,
1383 AXP15_IRQ_LDO0IN_H2L = 5,
1384 AXP15_IRQ_LDO0IN_L2H,
1385 /* irq1 */
1386 AXP15_IRQ_PEKLO = 8,
1387 AXP15_IRQ_PEKSH,
1388 AXP15_IRQ_DCDC4_V_LOW,
1389 AXP15_IRQ_DCDC3_V_LOW,
1390 AXP15_IRQ_DCDC2_V_LOW,
1391 AXP15_IRQ_DCDC1_V_LOW,
1392
1393 /* irq2 */
1394 AXP15_IRQ_GPIO0 = 16,
1395 AXP15_IRQ_GPIO1,
1396 AXP15_IRQ_GPIO2,
1397 AXP15_IRQ_GPIO3,
1398 AXP15_IRQ_PEKFE = 21,
1399 AXP15_IRQ_PEKRE,
1400 AXP15_IRQ_EVENT_TIMEOUT,
1401 };
1402
1403 enum axp1530_irqs {
1404 /* irq0 */
1405 AXP1530_IRQ_TEMP_OVER,
1406 AXP1530_IRQ_DCDC2_UNDER = 2,
1407 AXP1530_IRQ_DCDC3_UNDER,
1408 AXP1530_IRQ_POKLIRQ_EN,
1409 AXP1530_IRQ_POKSIRQ_EN,
1410 AXP1530_IRQ_KEY_L2H_EN,
1411 AXP1530_IRQ_KEY_H2L_EN,
1412 };
1413
1414 enum axp858_irqs {
1415 /* irq0 */
1416 AXP858_IRQ_TEMP_OVER1 = 0,
1417 AXP858_IRQ_TEMP_OVER2,
1418 AXP858_IRQ_DCDC1_UNDER,
1419 AXP858_IRQ_DCDC2_UNDER,
1420 AXP858_IRQ_DCDC3_UNDER,
1421 AXP858_IRQ_DCDC4_UNDER,
1422 AXP858_IRQ_DCDC5_UNDER,
1423 AXP858_IRQ_DCDC6_UNDER,
1424 /* irq1 */
1425 AXP858_IRQ_POKLIRQ_EN,
1426 AXP858_IRQ_POKSIRQ_EN,
1427 AXP858_IRQ_GPIO1_EN,
1428 AXP858_IRQ_POKNIRQ_EN,
1429 AXP858_IRQ_POKPIRQ_EN,
1430 AXP858_IRQ_GPIO2_EN,
1431 AXP858_IRQ_DCDC2_CUR_OVER,
1432 AXP858_IRQ_DCDC3_CUR_OVER,
1433 };
1434
1435 enum axp803_irqs {
1436 /* irq0 */
1437 AXP803_IRQ_USBRE = 2,
1438 AXP803_IRQ_USBIN,
1439 AXP803_IRQ_USBOV,
1440 AXP803_IRQ_ACRE,
1441 AXP803_IRQ_ACIN,
1442 AXP803_IRQ_ACOV,
1443 /* irq1 */
1444 AXP803_IRQ_CHAOV = 10,
1445 AXP803_IRQ_CHAST,
1446 AXP803_IRQ_BATATOU,
1447 AXP803_IRQ_BATATIN,
1448 AXP803_IRQ_BATRE,
1449 AXP803_IRQ_BATIN,
1450 /* irq2 */
1451 AXP803_IRQ_QBATINWORK,
1452 AXP803_IRQ_BATINWORK,
1453 AXP803_IRQ_QBATOVWORK,
1454 AXP803_IRQ_BATOVWORK,
1455 AXP803_IRQ_QBATINCHG,
1456 AXP803_IRQ_BATINCHG,
1457 AXP803_IRQ_QBATOVCHG,
1458 AXP803_IRQ_BATOVCHG,
1459 /* irq3 */
1460 AXP803_IRQ_LOWN2,
1461 AXP803_IRQ_LOWN1,
1462 /* irq4 */
1463 AXP803_IRQ_GPIO0 = 32,
1464 AXP803_IRQ_GPIO1,
1465 AXP803_IRQ_POKLO = 35,
1466 AXP803_IRQ_POKSH,
1467 AXP803_IRQ_PEKFE,
1468 AXP803_IRQ_PEKRE,
1469 AXP803_IRQ_TIMER,
1470 };
1471
1472 enum {
1473 AXP2202_DCDC1 = 0,
1474 AXP2202_DCDC2,
1475 AXP2202_DCDC3,
1476 AXP2202_DCDC4,
1477 AXP2202_ALDO1,
1478 AXP2202_ALDO2,
1479 AXP2202_ALDO3,
1480 AXP2202_ALDO4,
1481 AXP2202_BLDO1,
1482 AXP2202_BLDO2,
1483 AXP2202_BLDO3,
1484 AXP2202_BLDO4,
1485 AXP2202_CLDO1,
1486 AXP2202_CLDO2,
1487 AXP2202_CLDO3,
1488 AXP2202_CLDO4,
1489 AXP2202_RTCLDO,
1490 AXP2202_CPUSLDO,
1491 AXP2202_REG_ID_MAX,
1492 };
1493
1494 enum axp2202_irqs {
1495 /* irq0 */
1496 AXP2202_IRQ_SOCWL2,
1497 AXP2202_IRQ_SOCWL1,
1498 AXP2202_IRQ_GWDT,
1499 AXP2202_IRQ_NEWSOC,
1500 AXP2202_IRQ_BST_OV,
1501 AXP2202_IRQ_VBUS_OV,
1502 AXP2202_IRQ_VBUS_FAULT,
1503 /* irq1 */
1504 AXP2202_IRQ_VINSERT,
1505 AXP2202_IRQ_VREMOVE,
1506 AXP2202_IRQ_BINSERT,
1507 AXP2202_IRQ_BREMOVE,
1508 AXP2202_IRQ_PONS,
1509 AXP2202_IRQ_PONL,
1510 AXP2202_IRQ_PONN,
1511 AXP2202_IRQ_PONP,
1512 /* irq2 */
1513 AXP2202_IRQ_WDEXP,
1514 AXP2202_IRQ_LDOOC,
1515 AXP2202_IRQ_BOCP,
1516 AXP2202_IRQ_CHGDN,
1517 AXP2202_IRQ_CHGST,
1518 AXP2202_IRQ_DOTL1,
1519 AXP2202_IRQ_CHGTE,
1520 AXP2202_IRQ_BOVP,
1521 /* irq3 */
1522 AXP2202_IRQ_BC_DONE,
1523 AXP2202_IRQ_BC_CHNG,
1524 AXP2202_IRQ_RID_CHNG,
1525 AXP2202_IRQ_BCOTQ,
1526 AXP2202_IRQ_BCOT,
1527 AXP2202_IRQ_BCUT,
1528 AXP2202_IRQ_BWOT,
1529 AXP2202_IRQ_BWUT,
1530 /* irq4 */
1531 AXP2202_IRQ_CREMOVE,
1532 AXP2202_IRQ_CINSERT,
1533 AXP2202_IRQ_TOGGLE_DONE,
1534 AXP2202_IRQ_VBUS_SAFE5V,
1535 AXP2202_IRQ_VBUS_SAFE0V,
1536 AXP2202_IRQ_ERR_GEN,
1537 AXP2202_IRQ_PWR_CHNG,
1538
1539 };
1540
1541 enum axp2585_irqs {
1542 AXP2585_IRQ_Q_DROP2, //7l2
1543 AXP2585_IRQ_Q_DROP1, //6l1
1544 AXP2585_IRQ_Q_CHANGE,
1545 AXP2585_IRQ_Q_GOOD,
1546 AXP2585_IRQ_BAT_DECT,
1547 AXP2585_IRQ_BOOST_OVP,
1548 AXP2585_IRQ_BOOST_OCP,
1549 AXP2585_IRQ_BAT_OCP,
1550 AXP2585_IRQ_BCOT, //15
1551 AXP2585_IRQ_QBCOT, //14
1552 AXP2585_IRQ_BCUT, //13
1553 AXP2585_IRQ_QBCUT,
1554 AXP2585_IRQ_BWOT, //11
1555 AXP2585_IRQ_QBWOT,
1556 AXP2585_IRQ_BWUT, //9
1557 AXP2585_IRQ_QBWUT,
1558 AXP2585_IRQ_VBUS_INSERT, //23ac
1559 AXP2585_IRQ_VBUS_REMOVE, //22ac
1560 AXP2585_IRQ_BAT_INSERT, //21
1561 AXP2585_IRQ_BAT_REMOVE, //20
1562 AXP2585_IRQ_BAT_DB2GD,
1563 AXP2585_IRQ_TJ_OTP,
1564 AXP2585_IRQ_BAT_SMODE,
1565 AXP2585_IRQ_VBUS_OVP,
1566 AXP2585_IRQ_SIRQ,
1567 AXP2585_IRQ_LIRQ,
1568 AXP2585_IRQ_NIRQ, //29
1569 AXP2585_IRQ_PIRQ, //28
1570 AXP2585_IRQ_GPADC_BWOT,
1571 AXP2585_IRQ_GPADC_QBWOT,
1572 AXP2585_IRQ_GPADC_BWUT,
1573 AXP2585_IRQ_GPADC_QBWUT,
1574 AXP2585_IRQ_CHGBG, //39
1575 AXP2585_IRQ_CHGDONE, //38
1576 AXP2585_IRQ_BC_OK,
1577 AXP2585_IRQ_BC_CHANGE,
1578 AXP2585_IRQ_RID_CHANGE,
1579 AXP2585_IRQ_BAT_OVP,
1580 AXP2585_IRQ_REMOVE, //47tc
1581 AXP2585_IRQ_INSERT, //46tc
1582 AXP2585_IRQ_TOGGLE_DONE,
1583 AXP2585_IRQ_VBUS_SAFE5V,
1584 AXP2585_IRQ_ERROR_GEN,
1585 AXP2585_IRQ_POW_CHNG,
1586 };
1587 #define AXP288_TS_ADC_H 0x58
1588 #define AXP288_TS_ADC_L 0x59
1589 #define AXP288_GP_ADC_H 0x5a
1590 #define AXP288_GP_ADC_L 0x5b
1591
1592 struct axp20x_dev {
1593 struct device *dev;
1594 int irq;
1595 struct regmap *regmap;
1596 struct regmap_irq_chip_data *regmap_irqc;
1597 long variant;
1598 int nr_cells;
1599 struct mfd_cell *cells;
1600 const struct regmap_config *regmap_cfg;
1601 const struct regmap_irq_chip *regmap_irq_chip;
1602 void (*dts_parse)(struct axp20x_dev *);
1603 };
1604
1605 #define BATTID_LEN 64
1606 #define OCV_CURVE_SIZE 32
1607 #define MAX_THERM_CURVE_SIZE 25
1608 #define PD_DEF_MIN_TEMP 0
1609 #define PD_DEF_MAX_TEMP 55
1610
1611 struct axp20x_fg_pdata {
1612 char battid[BATTID_LEN + 1];
1613 int design_cap;
1614 int min_volt;
1615 int max_volt;
1616 int max_temp;
1617 int min_temp;
1618 int cap1;
1619 int cap0;
1620 int rdc1;
1621 int rdc0;
1622 int ocv_curve[OCV_CURVE_SIZE];
1623 int tcsz;
1624 int thermistor_curve[MAX_THERM_CURVE_SIZE][2];
1625 };
1626
1627 struct axp20x_chrg_pdata {
1628 int max_cc;
1629 int max_cv;
1630 int def_cc;
1631 int def_cv;
1632 };
1633
1634 struct axp288_extcon_pdata {
1635 /* GPIO pin control to switch D+/D- lines b/w PMIC and SOC */
1636 struct gpio_desc *gpio_mux_cntl;
1637 };
1638
1639 /* generic helper function for reading 9-16 bit wide regs */
axp20x_read_variable_width(struct regmap * regmap,unsigned int reg,unsigned int width)1640 static inline int axp20x_read_variable_width(struct regmap *regmap,
1641 unsigned int reg, unsigned int width)
1642 {
1643 unsigned int reg_val, result;
1644 int err;
1645
1646 err = regmap_read(regmap, reg, ®_val);
1647 if (err)
1648 return err;
1649
1650 result = reg_val << (width - 8);
1651
1652 err = regmap_read(regmap, reg + 1, ®_val);
1653 if (err)
1654 return err;
1655
1656 result |= reg_val;
1657
1658 return result;
1659 }
1660
1661 /**
1662 * axp20x_match_device(): Setup axp20x variant related fields
1663 *
1664 * @axp20x: axp20x device to setup (.dev field must be set)
1665 * @dev: device associated with this axp20x device
1666 *
1667 * This lets the axp20x core configure the mfd cells and register maps
1668 * for later use.
1669 */
1670 int axp20x_match_device(struct axp20x_dev *axp20x);
1671
1672 /**
1673 * axp20x_device_probe(): Probe a configured axp20x device
1674 *
1675 * @axp20x: axp20x device to probe (must be configured)
1676 *
1677 * This function lets the axp20x core register the axp20x mfd devices
1678 * and irqchip. The axp20x device passed in must be fully configured
1679 * with axp20x_match_device, its irq set, and regmap created.
1680 */
1681 int axp20x_device_probe(struct axp20x_dev *axp20x);
1682
1683 /**
1684 * axp20x_device_probe(): Remove a axp20x device
1685 *
1686 * @axp20x: axp20x device to remove
1687 *
1688 * This tells the axp20x core to remove the associated mfd devices
1689 */
1690 int axp20x_device_remove(struct axp20x_dev *axp20x);
1691
1692 #endif /* __LINUX_MFD_AXP20X_H */
1693