1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 ################################################################################
4 #
5 # r8168 is the Linux device driver released for Realtek Gigabit Ethernet
6 # controllers with PCI-Express interface.
7 #
8 # Copyright(c) 2021 Realtek Semiconductor Corp. All rights reserved.
9 #
10 # This program is free software; you can redistribute it and/or modify it
11 # under the terms of the GNU General Public License as published by the Free
12 # Software Foundation; either version 2 of the License, or (at your option)
13 # any later version.
14 #
15 # This program is distributed in the hope that it will be useful, but WITHOUT
16 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 # more details.
19 #
20 # You should have received a copy of the GNU General Public License along with
21 # this program; if not, see <http://www.gnu.org/licenses/>.
22 #
23 # Author:
24 # Realtek NIC software team <nicfae@realtek.com>
25 # No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
26 #
27 ################################################################################
28 */
29
30 /************************************************************************************
31 * This product is covered by one or more of the following patents:
32 * US6,570,884, US6,115,776, and US6,327,625.
33 ***********************************************************************************/
34
35 #include <linux/ethtool.h>
36 #include "r8168_dash.h"
37 #include "r8168_realwow.h"
38 #include "r8168_fiber.h"
39
40 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
41 typedef int netdev_tx_t;
42 #endif
43
44 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
45 #define skb_transport_offset(skb) (skb->h.raw - skb->data)
46 #endif
47
48 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
49 #define device_set_wakeup_enable(dev, val) do {} while (0)
50 #endif
51
52 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)
ether_addr_copy(u8 * dst,const u8 * src)53 static inline void ether_addr_copy(u8 *dst, const u8 *src)
54 {
55 u16 *a = (u16 *)dst;
56 const u16 *b = (const u16 *)src;
57
58 a[0] = b[0];
59 a[1] = b[1];
60 a[2] = b[2];
61 }
62 #endif
63
64 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0)
65 #define IS_ERR_OR_NULL(ptr) (!ptr)
66 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0)
67 #define reinit_completion(x) ((x)->done = 0)
68 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39)
69 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
70 #define pm_runtime_mark_last_busy(x)
71 #define pm_runtime_put_autosuspend(x) pm_runtime_put(x)
72 #define pm_runtime_put_sync_autosuspend(x) pm_runtime_put_sync(x)
73
pm_runtime_suspended(struct device * dev)74 static inline bool pm_runtime_suspended(struct device *dev)
75 {
76 return dev->power.runtime_status == RPM_SUSPENDED
77 && !dev->power.disable_depth;
78 }
79
pm_runtime_active(struct device * dev)80 static inline bool pm_runtime_active(struct device *dev)
81 {
82 return dev->power.runtime_status == RPM_ACTIVE
83 || dev->power.disable_depth;
84 }
85 #endif
86 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
87 #define queue_delayed_work(long_wq, work, delay) schedule_delayed_work(work, delay)
88 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
89 #define netif_printk(priv, type, level, netdev, fmt, args...) \
90 do { \
91 if (netif_msg_##type(priv)) \
92 printk(level "%s: " fmt,(netdev)->name , ##args); \
93 } while (0)
94
95 #define netif_emerg(priv, type, netdev, fmt, args...) \
96 netif_printk(priv, type, KERN_EMERG, netdev, fmt, ##args)
97 #define netif_alert(priv, type, netdev, fmt, args...) \
98 netif_printk(priv, type, KERN_ALERT, netdev, fmt, ##args)
99 #define netif_crit(priv, type, netdev, fmt, args...) \
100 netif_printk(priv, type, KERN_CRIT, netdev, fmt, ##args)
101 #define netif_err(priv, type, netdev, fmt, args...) \
102 netif_printk(priv, type, KERN_ERR, netdev, fmt, ##args)
103 #define netif_warn(priv, type, netdev, fmt, args...) \
104 netif_printk(priv, type, KERN_WARNING, netdev, fmt, ##args)
105 #define netif_notice(priv, type, netdev, fmt, args...) \
106 netif_printk(priv, type, KERN_NOTICE, netdev, fmt, ##args)
107 #define netif_info(priv, type, netdev, fmt, args...) \
108 netif_printk(priv, type, KERN_INFO, (netdev), fmt, ##args)
109 #endif
110 #endif
111 #endif
112 #endif
113 #endif
114
115 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
116 #define setup_timer(_timer, _function, _data) \
117 do { \
118 (_timer)->function = _function; \
119 (_timer)->data = _data; \
120 init_timer(_timer); \
121 } while (0)
122 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
123
124 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
125 #if defined(skb_vlan_tag_present) && !defined(vlan_tx_tag_present)
126 #define vlan_tx_tag_present skb_vlan_tag_present
127 #endif
128 #if defined(skb_vlan_tag_get) && !defined(vlan_tx_tag_get)
129 #define vlan_tx_tag_get skb_vlan_tag_get
130 #endif
131 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
132
133 #define RTL_ALLOC_SKB_INTR(tp, length) dev_alloc_skb(length)
134 #ifdef CONFIG_R8168_NAPI
135 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
136 #undef RTL_ALLOC_SKB_INTR
137 #define RTL_ALLOC_SKB_INTR(tp, length) napi_alloc_skb(&tp->napi, length)
138 #endif
139 #endif
140
141 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
142 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
143 #define netdev_features_t u32
144 #endif
145 #endif
146
147 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0)
148 #define NETIF_F_ALL_CSUM NETIF_F_CSUM_MASK
149 #else
150 #ifndef NETIF_F_ALL_CSUM
151 #define NETIF_F_ALL_CSUM NETIF_F_CSUM_MASK
152 #endif
153 #endif
154
155 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
156 #define ENABLE_R8168_PROCFS
157 #endif
158
159 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
160 #define NETIF_F_HW_VLAN_RX NETIF_F_HW_VLAN_CTAG_RX
161 #define NETIF_F_HW_VLAN_TX NETIF_F_HW_VLAN_CTAG_TX
162 #endif
163
164 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)
165 #define __devinit
166 #define __devexit
167 #define __devexit_p(func) func
168 #endif
169
170 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
171 #define CHECKSUM_PARTIAL CHECKSUM_HW
172 #endif
173
174 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
175 #define irqreturn_t void
176 #define IRQ_HANDLED 1
177 #define IRQ_NONE 0
178 #define IRQ_RETVAL(x)
179 #endif
180
181 #ifndef NETIF_F_RXALL
182 #define NETIF_F_RXALL 0
183 #endif
184
185 #ifndef NETIF_F_RXFCS
186 #define NETIF_F_RXFCS 0
187 #endif
188
189 #ifndef HAVE_FREE_NETDEV
190 #define free_netdev(x) kfree(x)
191 #endif
192
193 #ifndef SET_NETDEV_DEV
194 #define SET_NETDEV_DEV(net, pdev)
195 #endif
196
197 #ifndef SET_MODULE_OWNER
198 #define SET_MODULE_OWNER(dev)
199 #endif
200
201 #ifndef SA_SHIRQ
202 #define SA_SHIRQ IRQF_SHARED
203 #endif
204
205 #ifndef NETIF_F_GSO
206 #define gso_size tso_size
207 #define gso_segs tso_segs
208 #endif
209
210 #ifndef PCI_VENDOR_ID_DLINK
211 #define PCI_VENDOR_ID_DLINK 0x1186
212 #endif
213
214 #ifndef dma_mapping_error
215 #define dma_mapping_error(a,b) 0
216 #endif
217
218 #ifndef netif_err
219 #define netif_err(a,b,c,d)
220 #endif
221
222 #ifndef AUTONEG_DISABLE
223 #define AUTONEG_DISABLE 0x00
224 #endif
225
226 #ifndef AUTONEG_ENABLE
227 #define AUTONEG_ENABLE 0x01
228 #endif
229
230 #ifndef BMCR_SPEED1000
231 #define BMCR_SPEED1000 0x0040
232 #endif
233
234 #ifndef BMCR_SPEED100
235 #define BMCR_SPEED100 0x2000
236 #endif
237
238 #ifndef BMCR_SPEED10
239 #define BMCR_SPEED10 0x0000
240 #endif
241
242 #ifndef SPEED_UNKNOWN
243 #define SPEED_UNKNOWN -1
244 #endif
245
246 #ifndef DUPLEX_UNKNOWN
247 #define DUPLEX_UNKNOWN 0xff
248 #endif
249
250 #ifndef SUPPORTED_Pause
251 #define SUPPORTED_Pause (1 << 13)
252 #endif
253
254 #ifndef SUPPORTED_Asym_Pause
255 #define SUPPORTED_Asym_Pause (1 << 14)
256 #endif
257
258 #ifndef MDIO_EEE_100TX
259 #define MDIO_EEE_100TX 0x0002
260 #endif
261
262 #ifndef MDIO_EEE_1000T
263 #define MDIO_EEE_1000T 0x0004
264 #endif
265
266 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
267 #ifdef CONFIG_NET_POLL_CONTROLLER
268 #define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8168_netpoll
269 #else
270 #define RTL_NET_POLL_CONTROLLER
271 #endif
272
273 #ifdef CONFIG_R8168_VLAN
274 #define RTL_SET_VLAN dev->vlan_rx_register=rtl8168_vlan_rx_register
275 #else
276 #define RTL_SET_VLAN
277 #endif
278
279 #define RTL_NET_DEVICE_OPS(ops) dev->open=rtl8168_open; \
280 dev->hard_start_xmit=rtl8168_start_xmit; \
281 dev->get_stats=rtl8168_get_stats; \
282 dev->stop=rtl8168_close; \
283 dev->tx_timeout=rtl8168_tx_timeout; \
284 dev->set_multicast_list=rtl8168_set_rx_mode; \
285 dev->change_mtu=rtl8168_change_mtu; \
286 dev->set_mac_address=rtl8168_set_mac_address; \
287 dev->do_ioctl=rtl8168_do_ioctl; \
288 RTL_NET_POLL_CONTROLLER; \
289 RTL_SET_VLAN;
290 #else
291 #define RTL_NET_DEVICE_OPS(ops) dev->netdev_ops=&ops
292 #endif
293
294 #ifndef FALSE
295 #define FALSE 0
296 #endif
297
298 #ifndef TRUE
299 #define TRUE 1
300 #endif
301
302 #ifndef false
303 #define false 0
304 #endif
305
306 #ifndef true
307 #define true 1
308 #endif
309
310 //Hardware will continue interrupt 10 times after interrupt finished.
311 #define RTK_KEEP_INTERRUPT_COUNT (10)
312
313 //Due to the hardware design of RTL8111B, the low 32 bit address of receive
314 //buffer must be 8-byte alignment.
315 #ifndef NET_IP_ALIGN
316 #define NET_IP_ALIGN 2
317 #endif
318 #define RTK_RX_ALIGN 8
319
320 #ifdef CONFIG_R8168_NAPI
321 #define NAPI_SUFFIX "-NAPI"
322 #else
323 #define NAPI_SUFFIX ""
324 #endif
325 #ifdef ENABLE_FIBER_SUPPORT
326 #define FIBER_SUFFIX "-FIBER"
327 #else
328 #define FIBER_SUFFIX ""
329 #endif
330 #ifdef ENABLE_REALWOW_SUPPORT
331 #define REALWOW_SUFFIX "-REALWOW"
332 #else
333 #define REALWOW_SUFFIX ""
334 #endif
335 #if defined(ENABLE_DASH_PRINTER_SUPPORT)
336 #define DASH_SUFFIX "-PRINTER"
337 #elif defined(ENABLE_DASH_SUPPORT)
338 #define DASH_SUFFIX "-DASH"
339 #else
340 #define DASH_SUFFIX ""
341 #endif
342
343 #define RTL8168_VERSION "8.049.02" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX
344 #define MODULENAME "r8168"
345 #define PFX MODULENAME ": "
346
347 #define GPL_CLAIM "\
348 r8168 Copyright (C) 2021 Realtek NIC software team <nicfae@realtek.com> \n \
349 This program comes with ABSOLUTELY NO WARRANTY; for details, please see <http://www.gnu.org/licenses/>. \n \
350 This is free software, and you are welcome to redistribute it under certain conditions; see <http://www.gnu.org/licenses/>. \n"
351
352 #ifdef RTL8168_DEBUG
353 #define assert(expr) \
354 if(!(expr)) { \
355 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
356 #expr,__FILE__,__FUNCTION__,__LINE__); \
357 }
358 #define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0)
359 #else
360 #define assert(expr) do {} while (0)
361 #define dprintk(fmt, args...) do {} while (0)
362 #endif /* RTL8168_DEBUG */
363
364 #define R8168_MSG_DEFAULT \
365 (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
366
367 #ifdef CONFIG_R8168_NAPI
368 #define rtl8168_rx_hwaccel_skb vlan_hwaccel_receive_skb
369 #define rtl8168_rx_quota(count, quota) min(count, quota)
370 #else
371 #define rtl8168_rx_hwaccel_skb vlan_hwaccel_rx
372 #define rtl8168_rx_quota(count, quota) count
373 #endif
374
375 /* MAC address length */
376 #ifndef MAC_ADDR_LEN
377 #define MAC_ADDR_LEN 6
378 #endif
379
380 #ifndef MAC_PROTOCOL_LEN
381 #define MAC_PROTOCOL_LEN 2
382 #endif
383
384 #ifndef ETH_FCS_LEN
385 #define ETH_FCS_LEN 4
386 #endif
387
388 #ifndef NETIF_F_TSO6
389 #define NETIF_F_TSO6 0
390 #endif
391
392 #define Reserved2_data 7
393 #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */
394 #define TX_DMA_BURST_unlimited 7
395 #define TX_DMA_BURST_1024 6
396 #define TX_DMA_BURST_512 5
397 #define TX_DMA_BURST_256 4
398 #define TX_DMA_BURST_128 3
399 #define TX_DMA_BURST_64 2
400 #define TX_DMA_BURST_32 1
401 #define TX_DMA_BURST_16 0
402 #define Reserved1_data 0x3F
403 #define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
404 #define Jumbo_Frame_1k ETH_DATA_LEN
405 #define Jumbo_Frame_2k (2*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
406 #define Jumbo_Frame_3k (3*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
407 #define Jumbo_Frame_4k (4*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
408 #define Jumbo_Frame_5k (5*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
409 #define Jumbo_Frame_6k (6*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
410 #define Jumbo_Frame_7k (7*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
411 #define Jumbo_Frame_8k (8*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
412 #define Jumbo_Frame_9k (9*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
413 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
414 #define RxEarly_off_V1 (0x07 << 11)
415 #define RxEarly_off_V2 (1 << 11)
416 #define Rx_Single_fetch_V2 (1 << 14)
417
418 #define R8168_REGS_SIZE (256)
419 #define R8168_MAC_REGS_SIZE (256)
420 #define R8168_PHY_REGS_SIZE (16*2)
421 #define R8168_EPHY_REGS_SIZE (31*2)
422 #define R8168_ERI_REGS_SIZE (0x100)
423 #define R8168_REGS_DUMP_SIZE (0x400)
424 #define R8168_PCI_REGS_SIZE (0x100)
425 #define R8168_NAPI_WEIGHT 64
426
427 #define RTL8168_TX_TIMEOUT (6 * HZ)
428 #define RTL8168_LINK_TIMEOUT (1 * HZ)
429 #define RTL8168_ESD_TIMEOUT (2 * HZ)
430
431 #define NUM_TX_DESC 1024 /* Number of Tx descriptor registers */
432 #define NUM_RX_DESC 1024 /* Number of Rx descriptor registers */
433
434 #define RX_BUF_SIZE 0x05F3 /* 0x05F3 = 1522bye + 1 */
435 #define R8168_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
436 #define R8168_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
437
438 #define OCP_STD_PHY_BASE 0xa400
439
440 #define NODE_ADDRESS_SIZE 6
441
442 #define SHORT_PACKET_PADDING_BUF_SIZE 256
443
444 #define RTK_MAGIC_DEBUG_VALUE 0x0badbeef
445
446 /* write/read MMIO register */
447 #define RTL_W8(tp, reg, val8) writeb((val8), tp->mmio_addr + (reg))
448 #define RTL_W16(tp, reg, val16) writew((val16), tp->mmio_addr + (reg))
449 #define RTL_W32(tp, reg, val32) writel((val32), tp->mmio_addr + (reg))
450 #define RTL_R8(tp, reg) readb(tp->mmio_addr + (reg))
451 #define RTL_R16(tp, reg) readw(tp->mmio_addr + (reg))
452 #define RTL_R32(tp, reg) ((unsigned long) readl(tp->mmio_addr + (reg)))
453
454 #ifndef DMA_64BIT_MASK
455 #define DMA_64BIT_MASK 0xffffffffffffffffULL
456 #endif
457
458 #ifndef DMA_32BIT_MASK
459 #define DMA_32BIT_MASK 0x00000000ffffffffULL
460 #endif
461
462 #ifndef NETDEV_TX_OK
463 #define NETDEV_TX_OK 0 /* driver took care of packet */
464 #endif
465
466 #ifndef NETDEV_TX_BUSY
467 #define NETDEV_TX_BUSY 1 /* driver tx path was busy*/
468 #endif
469
470 #ifndef NETDEV_TX_LOCKED
471 #define NETDEV_TX_LOCKED -1 /* driver tx lock was already taken */
472 #endif
473
474 #ifndef ADVERTISED_Pause
475 #define ADVERTISED_Pause (1 << 13)
476 #endif
477
478 #ifndef ADVERTISED_Asym_Pause
479 #define ADVERTISED_Asym_Pause (1 << 14)
480 #endif
481
482 #ifndef ADVERTISE_PAUSE_CAP
483 #define ADVERTISE_PAUSE_CAP 0x400
484 #endif
485
486 #ifndef ADVERTISE_PAUSE_ASYM
487 #define ADVERTISE_PAUSE_ASYM 0x800
488 #endif
489
490 #ifndef MII_CTRL1000
491 #define MII_CTRL1000 0x09
492 #endif
493
494 #ifndef ADVERTISE_1000FULL
495 #define ADVERTISE_1000FULL 0x200
496 #endif
497
498 #ifndef ADVERTISE_1000HALF
499 #define ADVERTISE_1000HALF 0x100
500 #endif
501
502 #ifndef ETH_MIN_MTU
503 #define ETH_MIN_MTU 68
504 #endif
505
506 /*****************************************************************************/
507
508 //#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3)
509 #if (( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) ) || \
510 (( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ) && \
511 ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) )))
512 /* copied from linux kernel 2.6.20 include/linux/netdev.h */
513 #define NETDEV_ALIGN 32
514 #define NETDEV_ALIGN_CONST (NETDEV_ALIGN - 1)
515
netdev_priv(struct net_device * dev)516 static inline void *netdev_priv(struct net_device *dev)
517 {
518 return (char *)dev + ((sizeof(struct net_device)
519 + NETDEV_ALIGN_CONST)
520 & ~NETDEV_ALIGN_CONST);
521 }
522 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3)
523
524 /*****************************************************************************/
525 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
526 #define RTLDEV tp
527 #else
528 #define RTLDEV dev
529 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
530 /*****************************************************************************/
531
532 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
533 typedef struct net_device *napi_ptr;
534 typedef int *napi_budget;
535
536 #define napi dev
537 #define RTL_NAPI_CONFIG(ndev, priv, function, weig) ndev->poll=function; \
538 ndev->weight=weig;
539 #define RTL_NAPI_QUOTA(budget, ndev) min(*budget, ndev->quota)
540 #define RTL_GET_PRIV(stuct_ptr, priv_struct) netdev_priv(stuct_ptr)
541 #define RTL_GET_NETDEV(priv_ptr)
542 #define RTL_RX_QUOTA(budget) *budget
543 #define RTL_NAPI_QUOTA_UPDATE(ndev, work_done, budget) *budget -= work_done; \
544 ndev->quota -= work_done;
545 #define RTL_NETIF_RX_COMPLETE(dev, napi, work_done) netif_rx_complete(dev)
546 #define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) netif_rx_schedule_prep(dev)
547 #define __RTL_NETIF_RX_SCHEDULE(dev, napi) __netif_rx_schedule(dev)
548 #define RTL_NAPI_RETURN_VALUE work_done >= work_to_do
549 #define RTL_NAPI_ENABLE(dev, napi) netif_poll_enable(dev)
550 #define RTL_NAPI_DISABLE(dev, napi) netif_poll_disable(dev)
551 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
552 #else
553 typedef struct napi_struct *napi_ptr;
554 typedef int napi_budget;
555
556 #define RTL_NAPI_CONFIG(ndev, priv, function, weight) netif_napi_add(ndev, &priv->napi, function, weight)
557 #define RTL_NAPI_QUOTA(budget, ndev) min(budget, budget)
558 #define RTL_GET_PRIV(stuct_ptr, priv_struct) container_of(stuct_ptr, priv_struct, stuct_ptr)
559 #define RTL_GET_NETDEV(priv_ptr) struct net_device *dev = priv_ptr->dev;
560 #define RTL_RX_QUOTA(budget) budget
561 #define RTL_NAPI_QUOTA_UPDATE(ndev, work_done, budget)
562 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
563 #define RTL_NETIF_RX_COMPLETE(dev, napi, work_done) netif_rx_complete(dev, napi)
564 #define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) netif_rx_schedule_prep(dev, napi)
565 #define __RTL_NETIF_RX_SCHEDULE(dev, napi) __netif_rx_schedule(dev, napi)
566 #endif
567 #if LINUX_VERSION_CODE == KERNEL_VERSION(2,6,29)
568 #define RTL_NETIF_RX_COMPLETE(dev, napi, work_done) netif_rx_complete(napi)
569 #define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) netif_rx_schedule_prep(napi)
570 #define __RTL_NETIF_RX_SCHEDULE(dev, napi) __netif_rx_schedule(napi)
571 #endif
572 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,29)
573 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
574 #define RTL_NETIF_RX_COMPLETE(dev, napi, work_done) napi_complete_done(napi, work_done)
575 #else
576 #define RTL_NETIF_RX_COMPLETE(dev, napi, work_done) napi_complete(napi)
577 #endif
578 #define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) napi_schedule_prep(napi)
579 #define __RTL_NETIF_RX_SCHEDULE(dev, napi) __napi_schedule(napi)
580 #endif
581 #define RTL_NAPI_RETURN_VALUE work_done
582 #define RTL_NAPI_ENABLE(dev, napi) napi_enable(napi)
583 #define RTL_NAPI_DISABLE(dev, napi) napi_disable(napi)
584 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
585
586 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
587 #define RTL_NAPI_DEL(priv)
588 #else
589 #define RTL_NAPI_DEL(priv) netif_napi_del(&priv->napi)
590 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
591
592 /*****************************************************************************/
593 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
594 #ifdef __CHECKER__
595 #define __iomem __attribute__((noderef, address_space(2)))
596 extern void __chk_io_ptr(void __iomem *);
597 #define __bitwise __attribute__((bitwise))
598 #else
599 #define __iomem
600 #define __chk_io_ptr(x) (void)0
601 #define __bitwise
602 #endif
603 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
604
605 /*****************************************************************************/
606 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8)
607 #ifdef __CHECKER__
608 #define __force __attribute__((force))
609 #else
610 #define __force
611 #endif
612 #endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8)
613
614 #ifndef module_param
615 #define module_param(v,t,p) MODULE_PARM(v, "i");
616 #endif
617
618 #ifndef PCI_DEVICE
619 #define PCI_DEVICE(vend,dev) \
620 .vendor = (vend), .device = (dev), \
621 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
622 #endif
623
624 /*****************************************************************************/
625 /* 2.5.28 => 2.4.23 */
626 #if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,28) )
627
_kc_synchronize_irq(void)628 static inline void _kc_synchronize_irq(void)
629 {
630 synchronize_irq();
631 }
632 #undef synchronize_irq
633 #define synchronize_irq(X) _kc_synchronize_irq()
634
635 #include <linux/tqueue.h>
636 #define work_struct tq_struct
637 #undef INIT_WORK
638 #define INIT_WORK(a,b,c) INIT_TQUEUE(a,(void (*)(void *))b,c)
639 #undef container_of
640 #define container_of list_entry
641 #define schedule_work schedule_task
642 #define flush_scheduled_work flush_scheduled_tasks
643 #endif /* 2.5.28 => 2.4.17 */
644
645 /*****************************************************************************/
646 /* 2.6.4 => 2.6.0 */
647 #if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) )
648 #define MODULE_VERSION(_version) MODULE_INFO(version, _version)
649 #endif /* 2.6.4 => 2.6.0 */
650 /*****************************************************************************/
651 /* 2.6.0 => 2.5.28 */
652 #if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) )
653 #define MODULE_INFO(version, _version)
654 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
655 #define CONFIG_E1000_DISABLE_PACKET_SPLIT 1
656 #endif
657
658 #define pci_set_consistent_dma_mask(dev,mask) 1
659
660 #undef dev_put
661 #define dev_put(dev) __dev_put(dev)
662
663 #ifndef skb_fill_page_desc
664 #define skb_fill_page_desc _kc_skb_fill_page_desc
665 extern void _kc_skb_fill_page_desc(struct sk_buff *skb, int i, struct page *page, int off, int size);
666 #endif
667
668 #ifndef pci_dma_mapping_error
669 #define pci_dma_mapping_error _kc_pci_dma_mapping_error
_kc_pci_dma_mapping_error(dma_addr_t dma_addr)670 static inline int _kc_pci_dma_mapping_error(dma_addr_t dma_addr)
671 {
672 return dma_addr == 0;
673 }
674 #endif
675
676 #undef ALIGN
677 #define ALIGN(x,a) (((x)+(a)-1)&~((a)-1))
678
679 #endif /* 2.6.0 => 2.5.28 */
680
681 /*****************************************************************************/
682 /* 2.4.22 => 2.4.17 */
683 #if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,22) )
684 #define pci_name(x) ((x)->slot_name)
685 #endif /* 2.4.22 => 2.4.17 */
686
687 /*****************************************************************************/
688 /* 2.6.5 => 2.6.0 */
689 #if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) )
690 #define pci_dma_sync_single_for_cpu pci_dma_sync_single
691 #define pci_dma_sync_single_for_device pci_dma_sync_single_for_cpu
692 #endif /* 2.6.5 => 2.6.0 */
693
694 /*****************************************************************************/
695
696 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
697 /*
698 * initialize a work-struct's func and data pointers:
699 */
700 #define PREPARE_WORK(_work, _func, _data) \
701 do { \
702 (_work)->func = _func; \
703 (_work)->data = _data; \
704 } while (0)
705
706 #endif
707 /*****************************************************************************/
708 /* 2.6.4 => 2.6.0 */
709 #if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,4,25) && \
710 LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)) || \
711 (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) && \
712 LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4)))
713 #define ETHTOOL_OPS_COMPAT
714 #endif /* 2.6.4 => 2.6.0 */
715
716 /*****************************************************************************/
717 /* Installations with ethtool version without eeprom, adapter id, or statistics
718 * support */
719
720 #ifndef ETH_GSTRING_LEN
721 #define ETH_GSTRING_LEN 32
722 #endif
723
724 #ifndef ETHTOOL_GSTATS
725 #define ETHTOOL_GSTATS 0x1d
726 #undef ethtool_drvinfo
727 #define ethtool_drvinfo k_ethtool_drvinfo
728 struct k_ethtool_drvinfo {
729 u32 cmd;
730 char driver[32];
731 char version[32];
732 char fw_version[32];
733 char bus_info[32];
734 char reserved1[32];
735 char reserved2[16];
736 u32 n_stats;
737 u32 testinfo_len;
738 u32 eedump_len;
739 u32 regdump_len;
740 };
741
742 struct ethtool_stats {
743 u32 cmd;
744 u32 n_stats;
745 u64 data[0];
746 };
747 #endif /* ETHTOOL_GSTATS */
748
749 #ifndef ETHTOOL_PHYS_ID
750 #define ETHTOOL_PHYS_ID 0x1c
751 #endif /* ETHTOOL_PHYS_ID */
752
753 #ifndef ETHTOOL_GSTRINGS
754 #define ETHTOOL_GSTRINGS 0x1b
755 enum ethtool_stringset {
756 ETH_SS_TEST = 0,
757 ETH_SS_STATS,
758 };
759 struct ethtool_gstrings {
760 u32 cmd; /* ETHTOOL_GSTRINGS */
761 u32 string_set; /* string set id e.c. ETH_SS_TEST, etc*/
762 u32 len; /* number of strings in the string set */
763 u8 data[0];
764 };
765 #endif /* ETHTOOL_GSTRINGS */
766
767 #ifndef ETHTOOL_TEST
768 #define ETHTOOL_TEST 0x1a
769 enum ethtool_test_flags {
770 ETH_TEST_FL_OFFLINE = (1 << 0),
771 ETH_TEST_FL_FAILED = (1 << 1),
772 };
773 struct ethtool_test {
774 u32 cmd;
775 u32 flags;
776 u32 reserved;
777 u32 len;
778 u64 data[0];
779 };
780 #endif /* ETHTOOL_TEST */
781
782 #ifndef ETHTOOL_GEEPROM
783 #define ETHTOOL_GEEPROM 0xb
784 #undef ETHTOOL_GREGS
785 struct ethtool_eeprom {
786 u32 cmd;
787 u32 magic;
788 u32 offset;
789 u32 len;
790 u8 data[0];
791 };
792
793 struct ethtool_value {
794 u32 cmd;
795 u32 data;
796 };
797 #endif /* ETHTOOL_GEEPROM */
798
799 #ifndef ETHTOOL_GLINK
800 #define ETHTOOL_GLINK 0xa
801 #endif /* ETHTOOL_GLINK */
802
803 #ifndef ETHTOOL_GREGS
804 #define ETHTOOL_GREGS 0x00000004 /* Get NIC registers */
805 #define ethtool_regs _kc_ethtool_regs
806 /* for passing big chunks of data */
807 struct _kc_ethtool_regs {
808 u32 cmd;
809 u32 version; /* driver-specific, indicates different chips/revs */
810 u32 len; /* bytes */
811 u8 data[0];
812 };
813 #endif /* ETHTOOL_GREGS */
814
815 #ifndef ETHTOOL_GMSGLVL
816 #define ETHTOOL_GMSGLVL 0x00000007 /* Get driver message level */
817 #endif
818 #ifndef ETHTOOL_SMSGLVL
819 #define ETHTOOL_SMSGLVL 0x00000008 /* Set driver msg level, priv. */
820 #endif
821 #ifndef ETHTOOL_NWAY_RST
822 #define ETHTOOL_NWAY_RST 0x00000009 /* Restart autonegotiation, priv */
823 #endif
824 #ifndef ETHTOOL_GLINK
825 #define ETHTOOL_GLINK 0x0000000a /* Get link status */
826 #endif
827 #ifndef ETHTOOL_GEEPROM
828 #define ETHTOOL_GEEPROM 0x0000000b /* Get EEPROM data */
829 #endif
830 #ifndef ETHTOOL_SEEPROM
831 #define ETHTOOL_SEEPROM 0x0000000c /* Set EEPROM data */
832 #endif
833 #ifndef ETHTOOL_GCOALESCE
834 #define ETHTOOL_GCOALESCE 0x0000000e /* Get coalesce config */
835 /* for configuring coalescing parameters of chip */
836 #define ethtool_coalesce _kc_ethtool_coalesce
837 struct _kc_ethtool_coalesce {
838 u32 cmd; /* ETHTOOL_{G,S}COALESCE */
839
840 /* How many usecs to delay an RX interrupt after
841 * a packet arrives. If 0, only rx_max_coalesced_frames
842 * is used.
843 */
844 u32 rx_coalesce_usecs;
845
846 /* How many packets to delay an RX interrupt after
847 * a packet arrives. If 0, only rx_coalesce_usecs is
848 * used. It is illegal to set both usecs and max frames
849 * to zero as this would cause RX interrupts to never be
850 * generated.
851 */
852 u32 rx_max_coalesced_frames;
853
854 /* Same as above two parameters, except that these values
855 * apply while an IRQ is being serviced by the host. Not
856 * all cards support this feature and the values are ignored
857 * in that case.
858 */
859 u32 rx_coalesce_usecs_irq;
860 u32 rx_max_coalesced_frames_irq;
861
862 /* How many usecs to delay a TX interrupt after
863 * a packet is sent. If 0, only tx_max_coalesced_frames
864 * is used.
865 */
866 u32 tx_coalesce_usecs;
867
868 /* How many packets to delay a TX interrupt after
869 * a packet is sent. If 0, only tx_coalesce_usecs is
870 * used. It is illegal to set both usecs and max frames
871 * to zero as this would cause TX interrupts to never be
872 * generated.
873 */
874 u32 tx_max_coalesced_frames;
875
876 /* Same as above two parameters, except that these values
877 * apply while an IRQ is being serviced by the host. Not
878 * all cards support this feature and the values are ignored
879 * in that case.
880 */
881 u32 tx_coalesce_usecs_irq;
882 u32 tx_max_coalesced_frames_irq;
883
884 /* How many usecs to delay in-memory statistics
885 * block updates. Some drivers do not have an in-memory
886 * statistic block, and in such cases this value is ignored.
887 * This value must not be zero.
888 */
889 u32 stats_block_coalesce_usecs;
890
891 /* Adaptive RX/TX coalescing is an algorithm implemented by
892 * some drivers to improve latency under low packet rates and
893 * improve throughput under high packet rates. Some drivers
894 * only implement one of RX or TX adaptive coalescing. Anything
895 * not implemented by the driver causes these values to be
896 * silently ignored.
897 */
898 u32 use_adaptive_rx_coalesce;
899 u32 use_adaptive_tx_coalesce;
900
901 /* When the packet rate (measured in packets per second)
902 * is below pkt_rate_low, the {rx,tx}_*_low parameters are
903 * used.
904 */
905 u32 pkt_rate_low;
906 u32 rx_coalesce_usecs_low;
907 u32 rx_max_coalesced_frames_low;
908 u32 tx_coalesce_usecs_low;
909 u32 tx_max_coalesced_frames_low;
910
911 /* When the packet rate is below pkt_rate_high but above
912 * pkt_rate_low (both measured in packets per second) the
913 * normal {rx,tx}_* coalescing parameters are used.
914 */
915
916 /* When the packet rate is (measured in packets per second)
917 * is above pkt_rate_high, the {rx,tx}_*_high parameters are
918 * used.
919 */
920 u32 pkt_rate_high;
921 u32 rx_coalesce_usecs_high;
922 u32 rx_max_coalesced_frames_high;
923 u32 tx_coalesce_usecs_high;
924 u32 tx_max_coalesced_frames_high;
925
926 /* How often to do adaptive coalescing packet rate sampling,
927 * measured in seconds. Must not be zero.
928 */
929 u32 rate_sample_interval;
930 };
931 #endif /* ETHTOOL_GCOALESCE */
932
933 #ifndef ETHTOOL_SCOALESCE
934 #define ETHTOOL_SCOALESCE 0x0000000f /* Set coalesce config. */
935 #endif
936 #ifndef ETHTOOL_GRINGPARAM
937 #define ETHTOOL_GRINGPARAM 0x00000010 /* Get ring parameters */
938 /* for configuring RX/TX ring parameters */
939 #define ethtool_ringparam _kc_ethtool_ringparam
940 struct _kc_ethtool_ringparam {
941 u32 cmd; /* ETHTOOL_{G,S}RINGPARAM */
942
943 /* Read only attributes. These indicate the maximum number
944 * of pending RX/TX ring entries the driver will allow the
945 * user to set.
946 */
947 u32 rx_max_pending;
948 u32 rx_mini_max_pending;
949 u32 rx_jumbo_max_pending;
950 u32 tx_max_pending;
951
952 /* Values changeable by the user. The valid values are
953 * in the range 1 to the "*_max_pending" counterpart above.
954 */
955 u32 rx_pending;
956 u32 rx_mini_pending;
957 u32 rx_jumbo_pending;
958 u32 tx_pending;
959 };
960 #endif /* ETHTOOL_GRINGPARAM */
961
962 #ifndef ETHTOOL_SRINGPARAM
963 #define ETHTOOL_SRINGPARAM 0x00000011 /* Set ring parameters, priv. */
964 #endif
965 #ifndef ETHTOOL_GPAUSEPARAM
966 #define ETHTOOL_GPAUSEPARAM 0x00000012 /* Get pause parameters */
967 /* for configuring link flow control parameters */
968 #define ethtool_pauseparam _kc_ethtool_pauseparam
969 struct _kc_ethtool_pauseparam {
970 u32 cmd; /* ETHTOOL_{G,S}PAUSEPARAM */
971
972 /* If the link is being auto-negotiated (via ethtool_cmd.autoneg
973 * being true) the user may set 'autonet' here non-zero to have the
974 * pause parameters be auto-negotiated too. In such a case, the
975 * {rx,tx}_pause values below determine what capabilities are
976 * advertised.
977 *
978 * If 'autoneg' is zero or the link is not being auto-negotiated,
979 * then {rx,tx}_pause force the driver to use/not-use pause
980 * flow control.
981 */
982 u32 autoneg;
983 u32 rx_pause;
984 u32 tx_pause;
985 };
986 #endif /* ETHTOOL_GPAUSEPARAM */
987
988 #ifndef ETHTOOL_SPAUSEPARAM
989 #define ETHTOOL_SPAUSEPARAM 0x00000013 /* Set pause parameters. */
990 #endif
991 #ifndef ETHTOOL_GRXCSUM
992 #define ETHTOOL_GRXCSUM 0x00000014 /* Get RX hw csum enable (ethtool_value) */
993 #endif
994 #ifndef ETHTOOL_SRXCSUM
995 #define ETHTOOL_SRXCSUM 0x00000015 /* Set RX hw csum enable (ethtool_value) */
996 #endif
997 #ifndef ETHTOOL_GTXCSUM
998 #define ETHTOOL_GTXCSUM 0x00000016 /* Get TX hw csum enable (ethtool_value) */
999 #endif
1000 #ifndef ETHTOOL_STXCSUM
1001 #define ETHTOOL_STXCSUM 0x00000017 /* Set TX hw csum enable (ethtool_value) */
1002 #endif
1003 #ifndef ETHTOOL_GSG
1004 #define ETHTOOL_GSG 0x00000018 /* Get scatter-gather enable
1005 * (ethtool_value) */
1006 #endif
1007 #ifndef ETHTOOL_SSG
1008 #define ETHTOOL_SSG 0x00000019 /* Set scatter-gather enable
1009 * (ethtool_value). */
1010 #endif
1011 #ifndef ETHTOOL_TEST
1012 #define ETHTOOL_TEST 0x0000001a /* execute NIC self-test, priv. */
1013 #endif
1014 #ifndef ETHTOOL_GSTRINGS
1015 #define ETHTOOL_GSTRINGS 0x0000001b /* get specified string set */
1016 #endif
1017 #ifndef ETHTOOL_PHYS_ID
1018 #define ETHTOOL_PHYS_ID 0x0000001c /* identify the NIC */
1019 #endif
1020 #ifndef ETHTOOL_GSTATS
1021 #define ETHTOOL_GSTATS 0x0000001d /* get NIC-specific statistics */
1022 #endif
1023 #ifndef ETHTOOL_GTSO
1024 #define ETHTOOL_GTSO 0x0000001e /* Get TSO enable (ethtool_value) */
1025 #endif
1026 #ifndef ETHTOOL_STSO
1027 #define ETHTOOL_STSO 0x0000001f /* Set TSO enable (ethtool_value) */
1028 #endif
1029
1030 #ifndef ETHTOOL_BUSINFO_LEN
1031 #define ETHTOOL_BUSINFO_LEN 32
1032 #endif
1033
1034 /*****************************************************************************/
1035
1036 enum RTL8168_DSM_STATE {
1037 DSM_MAC_INIT = 1,
1038 DSM_NIC_GOTO_D3 = 2,
1039 DSM_IF_DOWN = 3,
1040 DSM_NIC_RESUME_D3 = 4,
1041 DSM_IF_UP = 5,
1042 };
1043
1044 enum RTL8168_registers {
1045 MAC0 = 0x00, /* Ethernet hardware address. */
1046 MAC4 = 0x04,
1047 MAR0 = 0x08, /* Multicast filter. */
1048 CounterAddrLow = 0x10,
1049 CounterAddrHigh = 0x14,
1050 CustomLED = 0x18,
1051 TxDescStartAddrLow = 0x20,
1052 TxDescStartAddrHigh = 0x24,
1053 TxHDescStartAddrLow = 0x28,
1054 TxHDescStartAddrHigh = 0x2c,
1055 FLASH = 0x30,
1056 ERSR = 0x36,
1057 ChipCmd = 0x37,
1058 TxPoll = 0x38,
1059 IntrMask = 0x3C,
1060 IntrStatus = 0x3E,
1061 TxConfig = 0x40,
1062 RxConfig = 0x44,
1063 TCTR = 0x48,
1064 Cfg9346 = 0x50,
1065 Config0 = 0x51,
1066 Config1 = 0x52,
1067 Config2 = 0x53,
1068 Config3 = 0x54,
1069 Config4 = 0x55,
1070 Config5 = 0x56,
1071 TDFNR = 0x57,
1072 TimeInt0 = 0x58,
1073 TimeInt1 = 0x5C,
1074 PHYAR = 0x60,
1075 CSIDR = 0x64,
1076 CSIAR = 0x68,
1077 PHYstatus = 0x6C,
1078 MACDBG = 0x6D,
1079 GPIO = 0x6E,
1080 PMCH = 0x6F,
1081 ERIDR = 0x70,
1082 ERIAR = 0x74,
1083 EPHY_RXER_NUM = 0x7C,
1084 EPHYAR = 0x80,
1085 TimeInt2 = 0x8C,
1086 OCPDR = 0xB0,
1087 MACOCP = 0xB0,
1088 OCPAR = 0xB4,
1089 SecMAC0 = 0xB4,
1090 SecMAC4 = 0xB8,
1091 PHYOCP = 0xB8,
1092 DBG_reg = 0xD1,
1093 TwiCmdReg = 0xD2,
1094 MCUCmd_reg = 0xD3,
1095 RxMaxSize = 0xDA,
1096 EFUSEAR = 0xDC,
1097 CPlusCmd = 0xE0,
1098 IntrMitigate = 0xE2,
1099 RxDescAddrLow = 0xE4,
1100 RxDescAddrHigh = 0xE8,
1101 MTPS = 0xEC,
1102 FuncEvent = 0xF0,
1103 PPSW = 0xF2,
1104 FuncEventMask = 0xF4,
1105 TimeInt3 = 0xF4,
1106 FuncPresetState = 0xF8,
1107 CMAC_IBCR0 = 0xF8,
1108 CMAC_IBCR2 = 0xF9,
1109 CMAC_IBIMR0 = 0xFA,
1110 CMAC_IBISR0 = 0xFB,
1111 FuncForceEvent = 0xFC,
1112 };
1113
1114 enum RTL8168_register_content {
1115 /* InterruptStatusBits */
1116 SYSErr = 0x8000,
1117 PCSTimeout = 0x4000,
1118 SWInt = 0x0100,
1119 TxDescUnavail = 0x0080,
1120 RxFIFOOver = 0x0040,
1121 LinkChg = 0x0020,
1122 RxDescUnavail = 0x0010,
1123 TxErr = 0x0008,
1124 TxOK = 0x0004,
1125 RxErr = 0x0002,
1126 RxOK = 0x0001,
1127
1128 /* RxStatusDesc */
1129 RxRWT = (1 << 22),
1130 RxRES = (1 << 21),
1131 RxRUNT = (1 << 20),
1132 RxCRC = (1 << 19),
1133
1134 /* ChipCmdBits */
1135 StopReq = 0x80,
1136 CmdReset = 0x10,
1137 CmdRxEnb = 0x08,
1138 CmdTxEnb = 0x04,
1139 RxBufEmpty = 0x01,
1140
1141 /* Cfg9346Bits */
1142 Cfg9346_Lock = 0x00,
1143 Cfg9346_Unlock = 0xC0,
1144 Cfg9346_EEDO = (1 << 0),
1145 Cfg9346_EEDI = (1 << 1),
1146 Cfg9346_EESK = (1 << 2),
1147 Cfg9346_EECS = (1 << 3),
1148 Cfg9346_EEM0 = (1 << 6),
1149 Cfg9346_EEM1 = (1 << 7),
1150
1151 /* rx_mode_bits */
1152 AcceptErr = 0x20,
1153 AcceptRunt = 0x10,
1154 AcceptBroadcast = 0x08,
1155 AcceptMulticast = 0x04,
1156 AcceptMyPhys = 0x02,
1157 AcceptAllPhys = 0x01,
1158
1159 /* Transmit Priority Polling*/
1160 HPQ = 0x80,
1161 NPQ = 0x40,
1162 FSWInt = 0x01,
1163
1164 /* RxConfigBits */
1165 Reserved2_shift = 13,
1166 RxCfgDMAShift = 8,
1167 RxCfg_128_int_en = (1 << 15),
1168 RxCfg_fet_multi_en = (1 << 14),
1169 RxCfg_half_refetch = (1 << 13),
1170 RxCfg_9356SEL = (1 << 6),
1171
1172 /* TxConfigBits */
1173 TxInterFrameGapShift = 24,
1174 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
1175 TxMACLoopBack = (1 << 17), /* MAC loopback */
1176
1177 /* Config1 register */
1178 LEDS1 = (1 << 7),
1179 LEDS0 = (1 << 6),
1180 Speed_down = (1 << 4),
1181 MEMMAP = (1 << 3),
1182 IOMAP = (1 << 2),
1183 VPD = (1 << 1),
1184 PMEnable = (1 << 0), /* Power Management Enable */
1185
1186 /* Config2 register */
1187 ClkReqEn = (1 << 7), /* Clock Request Enable */
1188 PMSTS_En = (1 << 5),
1189
1190 /* Config3 register */
1191 Isolate_en = (1 << 12), /* Isolate enable */
1192 MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */
1193 LinkUp = (1 << 4), /* This bit is reserved in RTL8168B.*/
1194 /* Wake up when the cable connection is re-established */
1195 ECRCEN = (1 << 3), /* This bit is reserved in RTL8168B*/
1196 Jumbo_En0 = (1 << 2), /* This bit is reserved in RTL8168B*/
1197 RDY_TO_L23 = (1 << 1), /* This bit is reserved in RTL8168B*/
1198 Beacon_en = (1 << 0), /* This bit is reserved in RTL8168B*/
1199
1200 /* Config4 register */
1201 Jumbo_En1 = (1 << 1), /* This bit is reserved in RTL8168B*/
1202
1203 /* Config5 register */
1204 BWF = (1 << 6), /* Accept Broadcast wakeup frame */
1205 MWF = (1 << 5), /* Accept Multicast wakeup frame */
1206 UWF = (1 << 4), /* Accept Unicast wakeup frame */
1207 LanWake = (1 << 1), /* LanWake enable/disable */
1208 PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */
1209 ASPM_en = (1 << 0), /* ASPM enable */
1210
1211 /* CPlusCmd */
1212 EnableBist = (1 << 15),
1213 Macdbgo_oe = (1 << 14),
1214 Normal_mode = (1 << 13),
1215 Force_halfdup = (1 << 12),
1216 Force_rxflow_en = (1 << 11),
1217 Force_txflow_en = (1 << 10),
1218 Cxpl_dbg_sel = (1 << 9),//This bit is reserved in RTL8168B
1219 ASF = (1 << 8),//This bit is reserved in RTL8168C
1220 PktCntrDisable = (1 << 7),
1221 RxVlan = (1 << 6),
1222 RxChkSum = (1 << 5),
1223 Macdbgo_sel = 0x001C,
1224 INTT_0 = 0x0000,
1225 INTT_1 = 0x0001,
1226 INTT_2 = 0x0002,
1227 INTT_3 = 0x0003,
1228
1229 /* rtl8168_PHYstatus */
1230 PowerSaveStatus = 0x80,
1231 TxFlowCtrl = 0x40,
1232 RxFlowCtrl = 0x20,
1233 _1000bpsF = 0x10,
1234 _100bps = 0x08,
1235 _10bps = 0x04,
1236 LinkStatus = 0x02,
1237 FullDup = 0x01,
1238
1239 /* DBG_reg */
1240 Fix_Nak_1 = (1 << 4),
1241 Fix_Nak_2 = (1 << 3),
1242 DBGPIN_E2 = (1 << 0),
1243
1244 /* ResetCounterCommand */
1245 CounterReset = 0x1,
1246 /* DumpCounterCommand */
1247 CounterDump = 0x8,
1248
1249 /* PHY access */
1250 PHYAR_Flag = 0x80000000,
1251 PHYAR_Write = 0x80000000,
1252 PHYAR_Read = 0x00000000,
1253 PHYAR_Reg_Mask = 0x1f,
1254 PHYAR_Reg_shift = 16,
1255 PHYAR_Data_Mask = 0xffff,
1256
1257 /* EPHY access */
1258 EPHYAR_Flag = 0x80000000,
1259 EPHYAR_Write = 0x80000000,
1260 EPHYAR_Read = 0x00000000,
1261 EPHYAR_Reg_Mask = 0x3f,
1262 EPHYAR_Reg_shift = 16,
1263 EPHYAR_Data_Mask = 0xffff,
1264
1265 /* CSI access */
1266 CSIAR_Flag = 0x80000000,
1267 CSIAR_Write = 0x80000000,
1268 CSIAR_Read = 0x00000000,
1269 CSIAR_ByteEn = 0x0f,
1270 CSIAR_ByteEn_shift = 12,
1271 CSIAR_Addr_Mask = 0x0fff,
1272
1273 /* ERI access */
1274 ERIAR_Flag = 0x80000000,
1275 ERIAR_Write = 0x80000000,
1276 ERIAR_Read = 0x00000000,
1277 ERIAR_Addr_Align = 4, /* ERI access register address must be 4 byte alignment */
1278 ERIAR_ExGMAC = 0,
1279 ERIAR_MSIX = 1,
1280 ERIAR_ASF = 2,
1281 ERIAR_OOB = 2,
1282 ERIAR_Type_shift = 16,
1283 ERIAR_ByteEn = 0x0f,
1284 ERIAR_ByteEn_shift = 12,
1285
1286 /* OCP GPHY access */
1287 OCPDR_Write = 0x80000000,
1288 OCPDR_Read = 0x00000000,
1289 OCPDR_Reg_Mask = 0xFF,
1290 OCPDR_Data_Mask = 0xFFFF,
1291 OCPDR_GPHY_Reg_shift = 16,
1292 OCPAR_Flag = 0x80000000,
1293 OCPAR_GPHY_Write = 0x8000F060,
1294 OCPAR_GPHY_Read = 0x0000F060,
1295 OCPR_Write = 0x80000000,
1296 OCPR_Read = 0x00000000,
1297 OCPR_Addr_Reg_shift = 16,
1298 OCPR_Flag = 0x80000000,
1299 OCP_STD_PHY_BASE_PAGE = 0x0A40,
1300
1301 /* MCU Command */
1302 Now_is_oob = (1 << 7),
1303 Txfifo_empty = (1 << 5),
1304 Rxfifo_empty = (1 << 4),
1305
1306 /* E-FUSE access */
1307 EFUSE_WRITE = 0x80000000,
1308 EFUSE_WRITE_OK = 0x00000000,
1309 EFUSE_READ = 0x00000000,
1310 EFUSE_READ_OK = 0x80000000,
1311 EFUSE_WRITE_V3 = 0x40000000,
1312 EFUSE_WRITE_OK_V3 = 0x00000000,
1313 EFUSE_READ_V3 = 0x80000000,
1314 EFUSE_READ_OK_V3 = 0x00000000,
1315 EFUSE_Reg_Mask = 0x03FF,
1316 EFUSE_Reg_Shift = 8,
1317 EFUSE_Check_Cnt = 300,
1318 EFUSE_READ_FAIL = 0xFF,
1319 EFUSE_Data_Mask = 0x000000FF,
1320
1321 /* GPIO */
1322 GPIO_en = (1 << 0),
1323
1324 };
1325
1326 enum _DescStatusBit {
1327 DescOwn = (1 << 31), /* Descriptor is owned by NIC */
1328 RingEnd = (1 << 30), /* End of descriptor ring */
1329 FirstFrag = (1 << 29), /* First segment of a packet */
1330 LastFrag = (1 << 28), /* Final segment of a packet */
1331
1332 /* Tx private */
1333 /*------ offset 0 of tx descriptor ------*/
1334 LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */
1335 GiantSendv4 = (1 << 26), /* TCP Giant Send Offload V4 (GSOv4) */
1336 GiantSendv6 = (1 << 25), /* TCP Giant Send Offload V6 (GSOv6) */
1337 LargeSend_DP = (1 << 16), /* TCP Large Send Offload (TSO) */
1338 MSSShift = 16, /* MSS value position */
1339 MSSMask = 0x7FFU, /* MSS value 11 bits */
1340 TxIPCS = (1 << 18), /* Calculate IP checksum */
1341 TxUDPCS = (1 << 17), /* Calculate UDP/IP checksum */
1342 TxTCPCS = (1 << 16), /* Calculate TCP/IP checksum */
1343 TxVlanTag = (1 << 17), /* Add VLAN tag */
1344
1345 /*@@@@@@ offset 4 of tx descriptor => bits for RTL8168C/CP only begin @@@@@@*/
1346 TxUDPCS_C = (1 << 31), /* Calculate UDP/IP checksum */
1347 TxTCPCS_C = (1 << 30), /* Calculate TCP/IP checksum */
1348 TxIPCS_C = (1 << 29), /* Calculate IP checksum */
1349 TxIPV6F_C = (1 << 28), /* Indicate it is an IPv6 packet */
1350 /*@@@@@@ offset 4 of tx descriptor => bits for RTL8168C/CP only end @@@@@@*/
1351
1352
1353 /* Rx private */
1354 /*------ offset 0 of rx descriptor ------*/
1355 PID1 = (1 << 18), /* Protocol ID bit 1/2 */
1356 PID0 = (1 << 17), /* Protocol ID bit 2/2 */
1357
1358 #define RxProtoUDP (PID1)
1359 #define RxProtoTCP (PID0)
1360 #define RxProtoIP (PID1 | PID0)
1361 #define RxProtoMask RxProtoIP
1362
1363 RxIPF = (1 << 16), /* IP checksum failed */
1364 RxUDPF = (1 << 15), /* UDP/IP checksum failed */
1365 RxTCPF = (1 << 14), /* TCP/IP checksum failed */
1366 RxVlanTag = (1 << 16), /* VLAN tag available */
1367
1368 /*@@@@@@ offset 0 of rx descriptor => bits for RTL8168C/CP only begin @@@@@@*/
1369 RxUDPT = (1 << 18),
1370 RxTCPT = (1 << 17),
1371 /*@@@@@@ offset 0 of rx descriptor => bits for RTL8168C/CP only end @@@@@@*/
1372
1373 /*@@@@@@ offset 4 of rx descriptor => bits for RTL8168C/CP only begin @@@@@@*/
1374 RxV6F = (1 << 31),
1375 RxV4F = (1 << 30),
1376 /*@@@@@@ offset 4 of rx descriptor => bits for RTL8168C/CP only end @@@@@@*/
1377 };
1378
1379 enum features {
1380 // RTL_FEATURE_WOL = (1 << 0),
1381 RTL_FEATURE_MSI = (1 << 1),
1382 };
1383
1384 enum wol_capability {
1385 WOL_DISABLED = 0,
1386 WOL_ENABLED = 1
1387 };
1388
1389 enum bits {
1390 BIT_0 = (1 << 0),
1391 BIT_1 = (1 << 1),
1392 BIT_2 = (1 << 2),
1393 BIT_3 = (1 << 3),
1394 BIT_4 = (1 << 4),
1395 BIT_5 = (1 << 5),
1396 BIT_6 = (1 << 6),
1397 BIT_7 = (1 << 7),
1398 BIT_8 = (1 << 8),
1399 BIT_9 = (1 << 9),
1400 BIT_10 = (1 << 10),
1401 BIT_11 = (1 << 11),
1402 BIT_12 = (1 << 12),
1403 BIT_13 = (1 << 13),
1404 BIT_14 = (1 << 14),
1405 BIT_15 = (1 << 15),
1406 BIT_16 = (1 << 16),
1407 BIT_17 = (1 << 17),
1408 BIT_18 = (1 << 18),
1409 BIT_19 = (1 << 19),
1410 BIT_20 = (1 << 20),
1411 BIT_21 = (1 << 21),
1412 BIT_22 = (1 << 22),
1413 BIT_23 = (1 << 23),
1414 BIT_24 = (1 << 24),
1415 BIT_25 = (1 << 25),
1416 BIT_26 = (1 << 26),
1417 BIT_27 = (1 << 27),
1418 BIT_28 = (1 << 28),
1419 BIT_29 = (1 << 29),
1420 BIT_30 = (1 << 30),
1421 BIT_31 = (1 << 31)
1422 };
1423
1424 enum effuse {
1425 EFUSE_NOT_SUPPORT = 0,
1426 EFUSE_SUPPORT_V1,
1427 EFUSE_SUPPORT_V2,
1428 EFUSE_SUPPORT_V3,
1429 };
1430 #define RsvdMask 0x3fffc000
1431
1432 struct TxDesc {
1433 u32 opts1;
1434 u32 opts2;
1435 u64 addr;
1436 };
1437
1438 struct RxDesc {
1439 u32 opts1;
1440 u32 opts2;
1441 u64 addr;
1442 };
1443
1444 struct ring_info {
1445 struct sk_buff *skb;
1446 u32 len;
1447 u8 __pad[sizeof(void *) - sizeof(u32)];
1448 };
1449
1450 struct pci_resource {
1451 u8 cmd;
1452 u8 cls;
1453 u16 io_base_h;
1454 u16 io_base_l;
1455 u16 mem_base_h;
1456 u16 mem_base_l;
1457 u8 ilr;
1458 u16 resv_0x1c_h;
1459 u16 resv_0x1c_l;
1460 u16 resv_0x20_h;
1461 u16 resv_0x20_l;
1462 u16 resv_0x24_h;
1463 u16 resv_0x24_l;
1464 u16 resv_0x2c_h;
1465 u16 resv_0x2c_l;
1466 u32 pci_sn_l;
1467 u32 pci_sn_h;
1468 };
1469
1470 struct rtl8168_private {
1471 void __iomem *mmio_addr; /* memory map physical address */
1472 struct pci_dev *pci_dev; /* Index of PCI device */
1473 struct net_device *dev;
1474 #ifdef CONFIG_R8168_NAPI
1475 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
1476 struct napi_struct napi;
1477 #endif
1478 #endif
1479 struct net_device_stats stats; /* statistics of net device */
1480 spinlock_t lock; /* spin lock flag */
1481 u32 msg_enable;
1482 u32 tx_tcp_csum_cmd;
1483 u32 tx_udp_csum_cmd;
1484 u32 tx_ip_csum_cmd;
1485 u32 tx_ipv6_csum_cmd;
1486 int max_jumbo_frame_size;
1487 int chipset;
1488 u32 mcfg;
1489 u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
1490 u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
1491 u32 dirty_rx;
1492 u32 dirty_tx;
1493 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
1494 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
1495 dma_addr_t TxPhyAddr;
1496 dma_addr_t RxPhyAddr;
1497 struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
1498 struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */
1499 unsigned rx_buf_sz;
1500 struct timer_list esd_timer;
1501 struct timer_list link_timer;
1502 struct pci_resource pci_cfg_space;
1503 unsigned int esd_flag;
1504 unsigned int pci_cfg_is_read;
1505 unsigned int rtl8168_rx_config;
1506 u16 cp_cmd;
1507 u16 intr_mask;
1508 u16 timer_intr_mask;
1509 int phy_auto_nego_reg;
1510 int phy_1000_ctrl_reg;
1511 u8 org_mac_addr[NODE_ADDRESS_SIZE];
1512 struct rtl8168_counters *tally_vaddr;
1513 dma_addr_t tally_paddr;
1514
1515 #ifdef CONFIG_R8168_VLAN
1516 struct vlan_group *vlgrp;
1517 #endif
1518 u8 wol_enabled;
1519 u32 wol_opts;
1520 u8 efuse_ver;
1521 u8 eeprom_type;
1522 u8 autoneg;
1523 u8 duplex;
1524 u32 speed;
1525 u32 advertising;
1526 u16 eeprom_len;
1527 u16 cur_page;
1528 u32 bios_setting;
1529
1530 int (*set_speed)(struct net_device *, u8 autoneg, u32 speed, u8 duplex, u32 adv);
1531 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
1532 void (*get_settings)(struct net_device *, struct ethtool_cmd *);
1533 #else
1534 void (*get_settings)(struct net_device *, struct ethtool_link_ksettings *);
1535 #endif
1536 void (*phy_reset_enable)(struct net_device *);
1537 unsigned int (*phy_reset_pending)(struct net_device *);
1538 unsigned int (*link_ok)(struct net_device *);
1539 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
1540 struct work_struct task;
1541 #else
1542 struct delayed_work task;
1543 #endif
1544 unsigned features;
1545
1546 u8 org_pci_offset_99;
1547 u8 org_pci_offset_180;
1548 u8 issue_offset_99_event;
1549
1550 u8 org_pci_offset_80;
1551 u8 org_pci_offset_81;
1552 u8 use_timer_interrrupt;
1553
1554 u32 keep_intr_cnt;
1555
1556 u8 HwIcVerUnknown;
1557 u8 NotWrRamCodeToMicroP;
1558 u8 NotWrMcuPatchCode;
1559 u8 HwHasWrRamCodeToMicroP;
1560
1561 u16 sw_ram_code_ver;
1562 u16 hw_ram_code_ver;
1563
1564 u8 rtk_enable_diag;
1565
1566 u8 ShortPacketSwChecksum;
1567
1568 u8 UseSwPaddingShortPkt;
1569
1570 u8 RequireAdcBiasPatch;
1571 u16 AdcBiasPatchIoffset;
1572
1573 u8 RequireAdjustUpsTxLinkPulseTiming;
1574 u16 SwrCnt1msIni;
1575
1576 u8 HwSuppNowIsOobVer;
1577
1578 u8 RequiredSecLanDonglePatch;
1579
1580 u32 HwFiberModeVer;
1581 u32 HwFiberStat;
1582 u8 HwSwitchMdiToFiber;
1583
1584 u8 HwSuppSerDesPhyVer;
1585
1586 u8 HwSuppPhyOcpVer;
1587
1588 u8 HwSuppAspmClkIntrLock;
1589
1590 u16 NicCustLedValue;
1591
1592 u8 HwSuppUpsVer;
1593
1594 u8 HwSuppMagicPktVer;
1595
1596 u8 HwSuppCheckPhyDisableModeVer;
1597
1598 u8 random_mac;
1599
1600 u16 phy_reg_aner;
1601 u16 phy_reg_anlpar;
1602 u16 phy_reg_gbsr;
1603
1604 u32 HwPcieSNOffset;
1605
1606 u8 HwSuppEsdVer;
1607 u8 TestPhyOcpReg;
1608 u16 BackupPhyFuseDout_15_0;
1609 u16 BackupPhyFuseDout_47_32;
1610 u16 BackupPhyFuseDout_63_48;
1611
1612 const char *fw_name;
1613 struct rtl8168_fw *rtl_fw;
1614 u32 ocp_base;
1615
1616 //Dash+++++++++++++++++
1617 u8 HwSuppDashVer;
1618 u8 DASH;
1619 u8 dash_printer_enabled;
1620 u8 HwPkgDet;
1621 void __iomem *mapped_cmac_ioaddr; /* mapped cmac memory map physical address */
1622 void __iomem *cmac_ioaddr; /* cmac memory map physical address */
1623
1624 #ifdef ENABLE_DASH_SUPPORT
1625 u16 AfterRecvFromFwBufLen;
1626 u8 AfterRecvFromFwBuf[RECV_FROM_FW_BUF_SIZE];
1627 u16 AfterSendToFwBufLen;
1628 u8 AfterSendToFwBuf[SEND_TO_FW_BUF_SIZE];
1629 u16 SendToFwBufferLen;
1630 u32 SizeOfSendToFwBuffer ;
1631 u32 SizeOfSendToFwBufferMemAlloc ;
1632 u32 NumOfSendToFwBuffer ;
1633
1634 u8 OobReq;
1635 u8 OobAck;
1636 u32 OobReqComplete;
1637 u32 OobAckComplete;
1638
1639 u8 RcvFwReqSysOkEvt;
1640 u8 RcvFwDashOkEvt;
1641 u8 SendFwHostOkEvt;
1642
1643 u8 DashFwDisableRx;
1644
1645 void *SendToFwBuffer ;
1646 dma_addr_t SendToFwBufferPhy ;
1647 u8 SendingToFw;
1648 PTX_DASH_SEND_FW_DESC TxDashSendFwDesc;
1649 dma_addr_t TxDashSendFwDescPhy;
1650 u32 SizeOfTxDashSendFwDescMemAlloc;
1651 u32 SizeOfTxDashSendFwDesc ;
1652 u32 NumTxDashSendFwDesc ;
1653 u32 CurrNumTxDashSendFwDesc ;
1654 u32 LastSendNumTxDashSendFwDesc ;
1655
1656 u32 NumRecvFromFwBuffer ;
1657 u32 SizeOfRecvFromFwBuffer ;
1658 u32 SizeOfRecvFromFwBufferMemAlloc ;
1659 void *RecvFromFwBuffer ;
1660 dma_addr_t RecvFromFwBufferPhy ;
1661
1662 PRX_DASH_FROM_FW_DESC RxDashRecvFwDesc;
1663 dma_addr_t RxDashRecvFwDescPhy;
1664 u32 SizeOfRxDashRecvFwDescMemAlloc;
1665 u32 SizeOfRxDashRecvFwDesc ;
1666 u32 NumRxDashRecvFwDesc ;
1667 u32 CurrNumRxDashRecvFwDesc ;
1668 u8 DashReqRegValue;
1669 u16 HostReqValue;
1670
1671 u32 CmacResetIsrCounter;
1672 u8 CmacResetIntr ;
1673 u8 CmacResetting ;
1674 u8 CmacOobIssueCmacReset ;
1675 u32 CmacResetbyFwCnt;
1676
1677 #if defined(ENABLE_DASH_PRINTER_SUPPORT)
1678 struct completion fw_ack;
1679 struct completion fw_req;
1680 struct completion fw_host_ok;
1681 #endif
1682 //Dash-----------------
1683 #endif //ENABLE_DASH_SUPPORT
1684
1685 //Realwow++++++++++++++
1686 u8 HwSuppKCPOffloadVer;
1687
1688 u8 EnableDhcpTimeoutWake;
1689 u8 EnableTeredoOffload;
1690 u8 EnableKCPOffload;
1691 #ifdef ENABLE_REALWOW_SUPPORT
1692 u32 DhcpTimeout;
1693 MP_KCP_INFO MpKCPInfo;
1694 //Realwow--------------
1695 #endif //ENABLE_REALWOW_SUPPORT
1696
1697 u32 eee_adv_t;
1698 u8 eee_enabled;
1699
1700 u32 dynamic_aspm_packet_count;
1701
1702 #ifdef ENABLE_R8168_PROCFS
1703 //Procfs support
1704 struct proc_dir_entry *proc_dir;
1705 #endif
1706 };
1707
1708 enum eetype {
1709 EEPROM_TYPE_NONE=0,
1710 EEPROM_TYPE_93C46,
1711 EEPROM_TYPE_93C56,
1712 EEPROM_TWSI
1713 };
1714
1715 enum mcfg {
1716 CFG_METHOD_1=0,
1717 CFG_METHOD_2,
1718 CFG_METHOD_3,
1719 CFG_METHOD_4,
1720 CFG_METHOD_5,
1721 CFG_METHOD_6,
1722 CFG_METHOD_7,
1723 CFG_METHOD_8,
1724 CFG_METHOD_9 ,
1725 CFG_METHOD_10,
1726 CFG_METHOD_11,
1727 CFG_METHOD_12,
1728 CFG_METHOD_13,
1729 CFG_METHOD_14,
1730 CFG_METHOD_15,
1731 CFG_METHOD_16,
1732 CFG_METHOD_17,
1733 CFG_METHOD_18,
1734 CFG_METHOD_19,
1735 CFG_METHOD_20,
1736 CFG_METHOD_21,
1737 CFG_METHOD_22,
1738 CFG_METHOD_23,
1739 CFG_METHOD_24,
1740 CFG_METHOD_25,
1741 CFG_METHOD_26,
1742 CFG_METHOD_27,
1743 CFG_METHOD_28,
1744 CFG_METHOD_29,
1745 CFG_METHOD_30,
1746 CFG_METHOD_31,
1747 CFG_METHOD_32,
1748 CFG_METHOD_33,
1749 CFG_METHOD_MAX,
1750 CFG_METHOD_DEFAULT = 0xFF
1751 };
1752
1753 #define LSO_32K 32000
1754 #define LSO_64K 64000
1755
1756 #define NIC_MIN_PHYS_BUF_COUNT (2)
1757 #define NIC_MAX_PHYS_BUF_COUNT_LSO_64K (24)
1758 #define NIC_MAX_PHYS_BUF_COUNT_LSO2 (16*4)
1759
1760 #define GTTCPHO_SHIFT 18
1761 #define GTTCPHO_MAX 0x7fU
1762 #define GTPKTSIZE_MAX 0x3ffffU
1763 #define TCPHO_SHIFT 18
1764 #define TCPHO_MAX 0x3ffU
1765 #define LSOPKTSIZE_MAX 0xffffU
1766 #define MSS_MAX 0x07ffu /* MSS value */
1767
1768 #define OOB_CMD_RESET 0x00
1769 #define OOB_CMD_DRIVER_START 0x05
1770 #define OOB_CMD_DRIVER_STOP 0x06
1771 #define OOB_CMD_SET_IPMAC 0x41
1772
1773 #define WAKEUP_MAGIC_PACKET_NOT_SUPPORT (0)
1774 #define WAKEUP_MAGIC_PACKET_V1 (1)
1775 #define WAKEUP_MAGIC_PACKET_V2 (2)
1776
1777 //Ram Code Version
1778 #define NIC_RAMCODE_VERSION_CFG_METHOD_14 (0x0057)
1779 #define NIC_RAMCODE_VERSION_CFG_METHOD_16 (0x0055)
1780 #define NIC_RAMCODE_VERSION_CFG_METHOD_18 (0x0052)
1781 #define NIC_RAMCODE_VERSION_CFG_METHOD_20 (0x0044)
1782 #define NIC_RAMCODE_VERSION_CFG_METHOD_21 (0x0042)
1783 #define NIC_RAMCODE_VERSION_CFG_METHOD_24 (0x0001)
1784 #define NIC_RAMCODE_VERSION_CFG_METHOD_23 (0x0015)
1785 #define NIC_RAMCODE_VERSION_CFG_METHOD_26 (0x0012)
1786 #define NIC_RAMCODE_VERSION_CFG_METHOD_28 (0x0019)
1787 #define NIC_RAMCODE_VERSION_CFG_METHOD_29 (0x0055)
1788 #define NIC_RAMCODE_VERSION_CFG_METHOD_31 (0x0003)
1789
1790 //hwoptimize
1791 #define HW_PATCH_SOC_LAN (BIT_0)
1792 #define HW_PATCH_SAMSUNG_LAN_DONGLE (BIT_2)
1793
1794 #define HW_PHY_STATUS_INI 1
1795 #define HW_PHY_STATUS_EXT_INI 2
1796 #define HW_PHY_STATUS_LAN_ON 3
1797
1798 void rtl8168_mdio_write(struct rtl8168_private *tp, u16 RegAddr, u16 value);
1799 void rtl8168_mdio_prot_write(struct rtl8168_private *tp, u32 RegAddr, u32 value);
1800 void rtl8168_mdio_prot_direct_write_phy_ocp(struct rtl8168_private *tp, u32 RegAddr, u32 value);
1801 u32 rtl8168_mdio_read(struct rtl8168_private *tp, u16 RegAddr);
1802 u32 rtl8168_mdio_prot_read(struct rtl8168_private *tp, u32 RegAddr);
1803 u32 rtl8168_mdio_prot_direct_read_phy_ocp(struct rtl8168_private *tp, u32 RegAddr);
1804 void rtl8168_ephy_write(struct rtl8168_private *tp, int RegAddr, int value);
1805 void rtl8168_mac_ocp_write(struct rtl8168_private *tp, u16 reg_addr, u16 value);
1806 u16 rtl8168_mac_ocp_read(struct rtl8168_private *tp, u16 reg_addr);
1807 void rtl8168_clear_eth_phy_bit(struct rtl8168_private *tp, u8 addr, u16 mask);
1808 void rtl8168_set_eth_phy_bit(struct rtl8168_private *tp, u8 addr, u16 mask);
1809 void rtl8168_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 data);
1810 void rtl8168_oob_notify(struct rtl8168_private *tp, u8 cmd);
1811 void rtl8168_init_ring_indexes(struct rtl8168_private *tp);
1812 int rtl8168_eri_write(struct rtl8168_private *tp, int addr, int len, u32 value, int type);
1813 void rtl8168_oob_mutex_lock(struct rtl8168_private *tp);
1814 u32 rtl8168_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len);
1815 u32 rtl8168_ocp_read_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 base_address);
1816 u32 rtl8168_ocp_write_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 value, u32 base_address);
1817 u32 rtl8168_eri_read(struct rtl8168_private *tp, int addr, int len, int type);
1818 u32 rtl8168_eri_read_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, int type, u32 base_address);
1819 int rtl8168_eri_write_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, u32 value, int type, u32 base_address);
1820 u16 rtl8168_ephy_read(struct rtl8168_private *tp, int RegAddr);
1821 void rtl8168_wait_txrx_fifo_empty(struct net_device *dev);
1822 void rtl8168_wait_ll_share_fifo_ready(struct net_device *dev);
1823 void rtl8168_enable_now_is_oob(struct rtl8168_private *tp);
1824 void rtl8168_disable_now_is_oob(struct rtl8168_private *tp);
1825 void rtl8168_oob_mutex_unlock(struct rtl8168_private *tp);
1826 void rtl8168_dash2_disable_tx(struct rtl8168_private *tp);
1827 void rtl8168_dash2_enable_tx(struct rtl8168_private *tp);
1828 void rtl8168_dash2_disable_rx(struct rtl8168_private *tp);
1829 void rtl8168_dash2_enable_rx(struct rtl8168_private *tp);
1830 void rtl8168_hw_disable_mac_mcu_bps(struct net_device *dev);
1831
1832 #define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M) ((_M)->HwSuppCheckPhyDisableModeVer > 0 )
1833 #define HW_SUPP_SERDES_PHY(_M) ((_M)->HwSuppSerDesPhyVer > 0)
1834 #define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M) (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0)
1835 #define HW_SUPPORT_UPS_MODE(_M) ((_M)->HwSuppUpsVer > 0)
1836
1837 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
1838 #define netdev_mc_count(dev) ((dev)->mc_count)
1839 #define netdev_mc_empty(dev) (netdev_mc_count(dev) == 0)
1840 #define netdev_for_each_mc_addr(mclist, dev) \
1841 for (mclist = dev->mc_list; mclist; mclist = mclist->next)
1842 #endif
1843