1 /****************************************************************************** 2 * 3 * Copyright(c) 2016 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef __HALBTC_OUT_SRC_H__ 16 #define __HALBTC_OUT_SRC_H__ 17 18 enum { 19 BTC_CCK_1, 20 BTC_CCK_2, 21 BTC_CCK_5_5, 22 BTC_CCK_11, 23 BTC_OFDM_6, 24 BTC_OFDM_9, 25 BTC_OFDM_12, 26 BTC_OFDM_18, 27 BTC_OFDM_24, 28 BTC_OFDM_36, 29 BTC_OFDM_48, 30 BTC_OFDM_54, 31 BTC_MCS_0, 32 BTC_MCS_1, 33 BTC_MCS_2, 34 BTC_MCS_3, 35 BTC_MCS_4, 36 BTC_MCS_5, 37 BTC_MCS_6, 38 BTC_MCS_7, 39 BTC_MCS_8, 40 BTC_MCS_9, 41 BTC_MCS_10, 42 BTC_MCS_11, 43 BTC_MCS_12, 44 BTC_MCS_13, 45 BTC_MCS_14, 46 BTC_MCS_15, 47 BTC_MCS_16, 48 BTC_MCS_17, 49 BTC_MCS_18, 50 BTC_MCS_19, 51 BTC_MCS_20, 52 BTC_MCS_21, 53 BTC_MCS_22, 54 BTC_MCS_23, 55 BTC_MCS_24, 56 BTC_MCS_25, 57 BTC_MCS_26, 58 BTC_MCS_27, 59 BTC_MCS_28, 60 BTC_MCS_29, 61 BTC_MCS_30, 62 BTC_MCS_31, 63 BTC_VHT_1SS_MCS_0, 64 BTC_VHT_1SS_MCS_1, 65 BTC_VHT_1SS_MCS_2, 66 BTC_VHT_1SS_MCS_3, 67 BTC_VHT_1SS_MCS_4, 68 BTC_VHT_1SS_MCS_5, 69 BTC_VHT_1SS_MCS_6, 70 BTC_VHT_1SS_MCS_7, 71 BTC_VHT_1SS_MCS_8, 72 BTC_VHT_1SS_MCS_9, 73 BTC_VHT_2SS_MCS_0, 74 BTC_VHT_2SS_MCS_1, 75 BTC_VHT_2SS_MCS_2, 76 BTC_VHT_2SS_MCS_3, 77 BTC_VHT_2SS_MCS_4, 78 BTC_VHT_2SS_MCS_5, 79 BTC_VHT_2SS_MCS_6, 80 BTC_VHT_2SS_MCS_7, 81 BTC_VHT_2SS_MCS_8, 82 BTC_VHT_2SS_MCS_9, 83 BTC_VHT_3SS_MCS_0, 84 BTC_VHT_3SS_MCS_1, 85 BTC_VHT_3SS_MCS_2, 86 BTC_VHT_3SS_MCS_3, 87 BTC_VHT_3SS_MCS_4, 88 BTC_VHT_3SS_MCS_5, 89 BTC_VHT_3SS_MCS_6, 90 BTC_VHT_3SS_MCS_7, 91 BTC_VHT_3SS_MCS_8, 92 BTC_VHT_3SS_MCS_9, 93 BTC_VHT_4SS_MCS_0, 94 BTC_VHT_4SS_MCS_1, 95 BTC_VHT_4SS_MCS_2, 96 BTC_VHT_4SS_MCS_3, 97 BTC_VHT_4SS_MCS_4, 98 BTC_VHT_4SS_MCS_5, 99 BTC_VHT_4SS_MCS_6, 100 BTC_VHT_4SS_MCS_7, 101 BTC_VHT_4SS_MCS_8, 102 BTC_VHT_4SS_MCS_9, 103 BTC_MCS_32, 104 BTC_UNKNOWN, 105 BTC_PKT_MGNT, 106 BTC_PKT_CTRL, 107 BTC_PKT_UNKNOWN, 108 BTC_PKT_NOT_FOR_ME, 109 BTC_RATE_MAX 110 }; 111 112 enum { 113 BTC_MULTIPORT_SCC, 114 BTC_MULTIPORT_MCC_DUAL_CHANNEL, 115 BTC_MULTIPORT_MCC_DUAL_BAND, 116 BTC_MULTIPORT_MAX 117 }; 118 119 #define BTC_COEX_8822B_COMMON_CODE 0 120 #define BTC_COEX_OFFLOAD 0 121 #define BTC_TMP_BUF_SHORT 20 122 123 extern u1Byte gl_btc_trace_buf[]; 124 #define BTC_SPRINTF rsprintf 125 #define BTC_TRACE(_MSG_)\ 126 do {\ 127 if (GLBtcDbgType[COMP_COEX] & BIT(DBG_LOUD)) {\ 128 RTW_INFO("%s", _MSG_);\ 129 } \ 130 } while (0) 131 #define BT_PrintData(adapter, _MSG_, len, data) RTW_DBG_DUMP((_MSG_), data, len) 132 133 134 #define NORMAL_EXEC FALSE 135 #define FORCE_EXEC TRUE 136 137 #define NM_EXCU FALSE 138 #define FC_EXCU TRUE 139 140 #define BTC_RF_OFF 0x0 141 #define BTC_RF_ON 0x1 142 143 #define BTC_RF_A 0x0 144 #define BTC_RF_B 0x1 145 #define BTC_RF_C 0x2 146 #define BTC_RF_D 0x3 147 148 #define BTC_SMSP SINGLEMAC_SINGLEPHY 149 #define BTC_DMDP DUALMAC_DUALPHY 150 #define BTC_DMSP DUALMAC_SINGLEPHY 151 #define BTC_MP_UNKNOWN 0xff 152 153 #define BT_COEX_ANT_TYPE_PG 0 154 #define BT_COEX_ANT_TYPE_ANTDIV 1 155 #define BT_COEX_ANT_TYPE_DETECTED 2 156 157 #define BTC_MIMO_PS_STATIC 0 /* 1ss */ 158 #define BTC_MIMO_PS_DYNAMIC 1 /* 2ss */ 159 160 #define BTC_RATE_DISABLE 0 161 #define BTC_RATE_ENABLE 1 162 163 /* single Antenna definition */ 164 #define BTC_ANT_PATH_WIFI 0 165 #define BTC_ANT_PATH_BT 1 166 #define BTC_ANT_PATH_PTA 2 167 #define BTC_ANT_PATH_WIFI5G 3 168 #define BTC_ANT_PATH_AUTO 4 169 /* dual Antenna definition */ 170 #define BTC_ANT_WIFI_AT_MAIN 0 171 #define BTC_ANT_WIFI_AT_AUX 1 172 #define BTC_ANT_WIFI_AT_DIVERSITY 2 173 /* coupler Antenna definition */ 174 #define BTC_ANT_WIFI_AT_CPL_MAIN 0 175 #define BTC_ANT_WIFI_AT_CPL_AUX 1 176 177 /* for common code request */ 178 #define REG_LTE_IDR_COEX_CTRL 0x0038 179 #define REG_SYS_SDIO_CTRL 0x0070 180 #define REG_SYS_SDIO_CTRL3 0x0073 181 /* #define REG_RETRY_LIMIT 0x042a */ 182 /* #define REG_DARFRC 0x0430 */ 183 #define REG_DARFRCH 0x0434 184 #define REG_CCK_CHECK 0x0454 185 #define REG_AMPDU_MAX_TIME_V1 0x0455 186 #define REG_TX_HANG_CTRL 0x045E 187 #define REG_LIFETIME_EN 0x0426 188 #define REG_BT_COEX_TABLE0 0x06C0 189 #define REG_BT_COEX_TABLE1 0x06C4 190 #define REG_BT_COEX_BRK_TABLE 0x06C8 191 #define REG_BT_COEX_TABLE_H 0x06CC 192 #define REG_BT_ACT_STATISTICS 0x0770 193 #define REG_BT_ACT_STATISTICS_1 0x0774 194 #define REG_BT_STAT_CTRL 0x0778 195 196 #define BIT_EN_GNT_BT_AWAKE BIT(3) 197 #define BIT_EN_BCN_FUNCTION BIT(3) 198 #define BIT_EN_BCN_PKT_REL BIT(6) 199 #define BIT_FEN_BB_GLB_RST BIT(1) 200 #define BIT_FEN_BB_RSTB BIT(0) 201 202 #define TDMA_4SLOT BIT(8) 203 204 /* for 2T2R -> 2T1R coex MIMO-PS mechanism tranlation */ 205 #define BTC_2GTDD_MAX_TRY 3 /* the max retry count for 1R->2R */ 206 #define BTC_2GFDD_MAX_STAY 300 /* the max stay time at 1R if 2R try-able (unit: 2s) */ 207 208 typedef enum _BTC_POWERSAVE_TYPE { 209 BTC_PS_WIFI_NATIVE = 0, /* wifi original power save behavior */ 210 BTC_PS_LPS_ON = 1, 211 BTC_PS_LPS_OFF = 2, 212 BTC_PS_MAX 213 } BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE; 214 215 typedef enum _BTC_BT_REG_TYPE { 216 BTC_BT_REG_RF = 0, 217 BTC_BT_REG_MODEM = 1, 218 BTC_BT_REG_BLUEWIZE = 2, 219 BTC_BT_REG_VENDOR = 3, 220 BTC_BT_REG_LE = 4, 221 BTC_BT_REG_MAX 222 } BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE; 223 224 typedef enum _BTC_CHIP_INTERFACE { 225 BTC_INTF_UNKNOWN = 0, 226 BTC_INTF_PCI = 1, 227 BTC_INTF_USB = 2, 228 BTC_INTF_SDIO = 3, 229 BTC_INTF_MAX 230 } BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE; 231 232 typedef enum _BTC_CHIP_TYPE { 233 BTC_CHIP_UNDEF = 0, 234 BTC_CHIP_CSR_BC4 = 1, 235 BTC_CHIP_CSR_BC8 = 2, 236 BTC_CHIP_RTL8723A = 3, 237 BTC_CHIP_RTL8821 = 4, 238 BTC_CHIP_RTL8723B = 5, 239 BTC_CHIP_RTL8822B = 6, 240 BTC_CHIP_RTL8822C = 7, 241 BTC_CHIP_RTL8821C = 8, 242 BTC_CHIP_RTL8821A = 9, 243 BTC_CHIP_RTL8723D = 10, 244 BTC_CHIP_RTL8703B = 11, 245 BTC_CHIP_RTL8725A = 12, 246 BTC_CHIP_RTL8723F = 13, 247 BTC_CHIP_MAX 248 } BTC_CHIP_TYPE, *PBTC_CHIP_TYPE; 249 250 /* following is for wifi link status */ 251 #define WIFI_STA_CONNECTED BIT0 252 #define WIFI_AP_CONNECTED BIT1 253 #define WIFI_HS_CONNECTED BIT2 254 #define WIFI_P2P_GO_CONNECTED BIT3 255 #define WIFI_P2P_GC_CONNECTED BIT4 256 257 /* following is for command line utility */ 258 #define CL_SPRINTF rsprintf 259 #define CL_PRINTF DCMD_Printf 260 #define CL_STRNCAT(dst, dst_size, src, src_size) rstrncat(dst, src, src_size) 261 262 static const char *const glbt_info_src[] = { 263 "BT Info[wifi fw]", 264 "BT Info[bt rsp]", 265 "BT Info[bt auto report]", 266 }; 267 268 #define BTC_INFO_FTP BIT(7) 269 #define BTC_INFO_A2DP BIT(6) 270 #define BTC_INFO_HID BIT(5) 271 #define BTC_INFO_SCO_BUSY BIT(4) 272 #define BTC_INFO_ACL_BUSY BIT(3) 273 #define BTC_INFO_INQ_PAGE BIT(2) 274 #define BTC_INFO_SCO_ESCO BIT(1) 275 #define BTC_INFO_CONNECTION BIT(0) 276 277 #define BTC_BTINFO_LENGTH_MAX 10 278 279 enum btc_gnt_setup_state { 280 BTC_GNT_SET_SW_LOW = 0x0, 281 BTC_GNT_SET_SW_HIGH = 0x1, 282 BTC_GNT_SET_HW_PTA = 0x2, 283 BTC_GNT_SET_MAX 284 }; 285 286 enum btc_gnt_setup_state_2 { 287 BTC_GNT_HW_PTA = 0x0, 288 BTC_GNT_SW_LOW = 0x1, 289 BTC_GNT_SW_HIGH = 0x3, 290 BTC_GNT_MAX 291 }; 292 293 enum btc_path_ctrl_owner { 294 BTC_OWNER_BT = 0x0, 295 BTC_OWNER_WL = 0x1, 296 BTC_OWNER_MAX 297 }; 298 299 enum btc_gnt_ctrl_type { 300 BTC_GNT_CTRL_BY_PTA = 0x0, 301 BTC_GNT_CTRL_BY_SW = 0x1, 302 BTC_GNT_CTRL_MAX 303 }; 304 305 enum btc_gnt_ctrl_block { 306 BTC_GNT_BLOCK_RFC_BB = 0x0, 307 BTC_GNT_BLOCK_RFC = 0x1, 308 BTC_GNT_BLOCK_BB = 0x2, 309 BTC_GNT_BLOCK_MAX 310 }; 311 312 enum btc_lte_coex_table_type { 313 BTC_CTT_WL_VS_LTE = 0x0, 314 BTC_CTT_BT_VS_LTE = 0x1, 315 BTC_CTT_MAX 316 }; 317 318 enum btc_lte_break_table_type { 319 BTC_LBTT_WL_BREAK_LTE = 0x0, 320 BTC_LBTT_BT_BREAK_LTE = 0x1, 321 BTC_LBTT_LTE_BREAK_WL = 0x2, 322 BTC_LBTT_LTE_BREAK_BT = 0x3, 323 BTC_LBTT_MAX 324 }; 325 326 enum btc_btinfo_src { 327 BTC_BTINFO_SRC_WL_FW = 0x0, 328 BTC_BTINFO_SRC_BT_RSP = 0x1, 329 BTC_BTINFO_SRC_BT_ACT = 0x2, 330 BTC_BTINFO_SRC_BT_IQK = 0x3, 331 BTC_BTINFO_SRC_BT_SCBD = 0x4, 332 BTC_BTINFO_SRC_H2C60 = 0x5, 333 BTC_BTINFO_SRC_BT_PSD = 0x6, 334 BTC_BTINFO_SRC_BT_SLOT1 = 0x7, 335 BTC_BTINFO_SRC_BT_SLOT2 = 0x8, 336 BTC_BTINFO_SRC_MAX 337 }; 338 339 enum btc_bt_profile { 340 BTC_BTPROFILE_NONE = 0, 341 BTC_BTPROFILE_HFP = BIT(0), 342 BTC_BTPROFILE_HID = BIT(1), 343 BTC_BTPROFILE_A2DP = BIT(2), 344 BTC_BTPROFILE_PAN = BIT(3), 345 BTC_BTPROFILE_MAX = 0xf 346 }; 347 348 static const char *const bt_profile_string[] = { 349 "None", 350 "HFP", 351 "HID", 352 "HID + HFP", 353 "A2DP", 354 "A2DP + HFP", 355 "A2DP + HID", 356 "PAN + HID + HFP", 357 "PAN", 358 "PAN + HFP", 359 "PAN + HID", 360 "PAN + HID + HFP", 361 "PAN + A2DP", 362 "PAN + A2DP + HFP", 363 "PAN + A2DP + HID", 364 "PAN + A2DP + HID + HFP" 365 }; 366 367 enum btc_bt_status { 368 BTC_BTSTATUS_NCON_IDLE = 0x0, 369 BTC_BTSTATUS_CON_IDLE = 0x1, 370 BTC_BTSTATUS_INQ_PAGE = 0x2, 371 BTC_BTSTATUS_ACL_BUSY = 0x3, 372 BTC_BTSTATUS_SCO_BUSY = 0x4, 373 BTC_BTSTATUS_ACL_SCO_BUSY = 0x5, 374 BTC_BTSTATUS_MAX 375 }; 376 377 static const char *const bt_status_string[] = { 378 "BT Non-Connected-idle", 379 "BT Connected-idle", 380 "BT Inq-page", 381 "BT ACL-busy", 382 "BT SCO-busy", 383 "BT ACL-SCO-busy", 384 "BT Non-Defined-state" 385 }; 386 387 enum btc_coex_algo { 388 BTC_COEX_NOPROFILE = 0x0, 389 BTC_COEX_HFP = 0x1, 390 BTC_COEX_HID = 0x2, 391 BTC_COEX_A2DP = 0x3, 392 BTC_COEX_PAN = 0x4, 393 BTC_COEX_A2DP_HID = 0x5, 394 BTC_COEX_A2DP_PAN = 0x6, 395 BTC_COEX_PAN_HID = 0x7, 396 BTC_COEX_A2DP_PAN_HID = 0x8, 397 BTC_COEX_MAX 398 }; 399 400 static const char *const coex_algo_string[] = { 401 "No Profile", 402 "HFP", 403 "HID", 404 "A2DP", 405 "PAN", 406 "A2DP + HID", 407 "A2DP + PAN", 408 "PAN + HID", 409 "A2DP + PAN + HID" 410 }; 411 412 enum btc_ext_ant_switch_type { 413 BTC_SWITCH_NONE = 0x0, 414 BTC_SWITCH_SPDT = 0x1, 415 BTC_SWITCH_SP3T = 0x2, 416 BTC_SWITCH_DPDT = 0x3, 417 BTC_SWITCH_ANTMAX 418 }; 419 420 enum btc_ext_ant_switch_ctrl_type { 421 BTC_SWITCH_CTRL_BY_BBSW = 0x0, 422 BTC_SWITCH_CTRL_BY_PTA = 0x1, 423 BTC_SWITCH_CTRL_BY_ANTDIV = 0x2, 424 BTC_SWITCH_CTRL_BY_MAC = 0x3, 425 BTC_SWITCH_CTRL_BY_BT = 0x4, 426 BTC_SWITCH_CTRL_BY_FW = 0x5, 427 BTC_SWITCH_CTRL_MAX 428 }; 429 430 enum btc_ext_ant_switch_pos_type { 431 BTC_SWITCH_TO_BT = 0x0, 432 BTC_SWITCH_TO_WLG = 0x1, 433 BTC_SWITCH_TO_WLA = 0x2, 434 BTC_SWITCH_TO_NOCARE = 0x3, 435 BTC_SWITCH_TO_WLG_BT = 0x4, 436 BTC_SWITCH_TO_MAX 437 }; 438 439 enum btx_set_ant_phase { 440 BTC_ANT_INIT = 0x0, 441 BTC_ANT_WONLY = 0x1, 442 BTC_ANT_WOFF = 0x2, 443 BTC_ANT_2G = 0x3, 444 BTC_ANT_5G = 0x4, 445 BTC_ANT_BTMP = 0x5, 446 BTC_ANT_POWERON = 0x6, 447 BTC_ANT_2G_WL = 0x7, 448 BTC_ANT_2G_BT = 0x8, 449 BTC_ANT_MCC = 0x9, 450 BTC_ANT_2G_WLBT = 0xa, 451 BTC_ANT_2G_FREERUN = 0xb, 452 BTC_ANT_MAX 453 }; 454 455 /*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/ 456 enum btc_wl2bt_scoreboard { 457 BTC_SCBD_ACTIVE = BIT(0), 458 BTC_SCBD_ON = BIT(1), 459 BTC_SCBD_SCAN = BIT(2), 460 BTC_SCBD_UNDERTEST = BIT(3), 461 BTC_SCBD_RXGAIN = BIT(4), 462 BTC_SCBD_WLBUSY = BIT(7), 463 BTC_SCBD_EXTFEM = BIT(8), 464 BTC_SCBD_TDMA = BIT(9), 465 BTC_SCBD_FIX2M = BIT(10), 466 BTC_SCBD_MAILBOX_DBG = BIT(14), 467 BTC_SCBD_ALL = 0xffff, 468 BTC_SCBD_ALL_32BIT = 0xffffffff 469 }; 470 471 enum btc_bt2wl_scoreboard { 472 BTC_SCBD_BT_ONOFF = BIT(1), 473 BTC_SCBD_BT_LPS = BIT(7) 474 }; 475 enum btc_scoreboard_bit_num { 476 BTC_SCBD_16_BIT = BIT(0), 477 BTC_SCBD_32_BIT = BIT(1) 478 }; 479 480 enum btc_runreason { 481 BTC_RSN_2GSCANSTART = 0x0, 482 BTC_RSN_5GSCANSTART = 0x1, 483 BTC_RSN_SCANFINISH = 0x2, 484 BTC_RSN_2GSWITCHBAND = 0x3, 485 BTC_RSN_5GSWITCHBAND = 0x4, 486 BTC_RSN_2GCONSTART = 0x5, 487 BTC_RSN_5GCONSTART = 0x6, 488 BTC_RSN_2GCONFINISH = 0x7, 489 BTC_RSN_5GCONFINISH = 0x8, 490 BTC_RSN_2GMEDIA = 0x9, 491 BTC_RSN_5GMEDIA = 0xa, 492 BTC_RSN_MEDIADISCON = 0xb, 493 BTC_RSN_2GSPECIALPKT = 0xc, 494 BTC_RSN_5GSPECIALPKT = 0xd, 495 BTC_RSN_BTINFO = 0xe, 496 BTC_RSN_PERIODICAL = 0xf, 497 BTC_RSN_PNP = 0x10, 498 BTC_RSN_LPS = 0x11, 499 BTC_RSN_TIMERUP = 0x12, 500 BTC_RSN_WLSTATUS = 0x13, 501 BTC_RSN_BTCNT = 0x14, 502 BTC_RSN_RFK = 0x15, 503 BTC_RSN_MAX 504 }; 505 506 static const char *const run_reason_string[] = { 507 "2G_SCAN_START", 508 "5G_SCAN_START", 509 "SCAN_FINISH", 510 "2G_SWITCH_BAND", 511 "5G_SWITCH_BAND", 512 "2G_CONNECT_START", 513 "5G_CONNECT_START", 514 "2G_CONNECT_FINISH", 515 "5G_CONNECT_FINISH", 516 "2G_MEDIA_STATUS", 517 "5G_MEDIA_STATUS", 518 "MEDIA_DISCONNECT", 519 "2G_SPECIALPKT", 520 "5G_SPECIALPKT", 521 "BTINFO", 522 "PERIODICAL", 523 "PNPNotify", 524 "LPSNotify", 525 "TimerUp", 526 "WL_STATUS_CHANGE", 527 "BT_CNT_CHANGE", 528 "WL_RFK", 529 "Reason Max" 530 }; 531 532 enum btc_wl_link_mode { 533 BTC_WLINK_2G1PORT = 0x0, 534 BTC_WLINK_2GMPORT = 0x1, 535 BTC_WLINK_25GMPORT = 0x2, 536 BTC_WLINK_5G = 0x3, 537 BTC_WLINK_2GGO = 0x4, 538 BTC_WLINK_2GGC = 0x5, 539 BTC_WLINK_BTMR = 0x6, 540 BTC_WLINK_2GFREE = 0x7, 541 BTC_WLINK_MAX 542 }; 543 544 static const char *const coex_mode_string[] = { 545 "2G-SP", 546 "2G-MP", 547 "25G-MP", 548 "5G", 549 "2G-P2P-GO", 550 "2G-P2P-GC", 551 "BT-MR", 552 "2G1RFREE", 553 "unknow" 554 }; 555 556 enum btc_bt_state_cnt { 557 BTC_CNT_BT_RETRY = 0x0, 558 BTC_CNT_BT_REINIT = 0x1, 559 BTC_CNT_BT_POPEVENT = 0x2, 560 BTC_CNT_BT_SETUPLINK = 0x3, 561 BTC_CNT_BT_IGNWLANACT = 0x4, 562 BTC_CNT_BT_INQ = 0x5, 563 BTC_CNT_BT_PAGE = 0x6, 564 BTC_CNT_BT_ROLESWITCH = 0x7, 565 BTC_CNT_BT_AFHUPDATE = 0x8, 566 BTC_CNT_BT_DISABLE = 0x9, 567 BTC_CNT_BT_INFOUPDATE = 0xa, 568 BTC_CNT_BT_IQK = 0xb, 569 BTC_CNT_BT_IQKFAIL = 0xc, 570 BTC_CNT_BT_TRX = 0xd, 571 BTC_CNT_BT_MAX 572 }; 573 574 enum btc_wl_state_cnt { 575 BTC_CNT_WL_SCANAP = 0x0, 576 BTC_CNT_WL_ARP = 0x1, 577 BTC_CNT_WL_GNTERR = 0x2, 578 BTC_CNT_WL_PSFAIL = 0x3, 579 BTC_CNT_WL_COEXRUN = 0x4, 580 BTC_CNT_WL_COEXINFO1 = 0x5, 581 BTC_CNT_WL_COEXINFO2 = 0x6, 582 BTC_CNT_WL_AUTOSLOT_HANG = 0x7, 583 BTC_CNT_WL_NOISY0 = 0x8, 584 BTC_CNT_WL_NOISY1 = 0x9, 585 BTC_CNT_WL_NOISY2 = 0xa, 586 BTC_CNT_WL_ACTIVEPORT = 0xb, 587 BTC_CNT_WL_LEAKAP_NORX = 0xc, 588 BTC_CNT_WL_FW_NOTIFY = 0xd, 589 BTC_CNT_WL_2G_TDDTRY = 0xe, 590 BTC_CNT_WL_2G_FDDSTAY = 0xf, 591 BTC_CNT_WL_MAX 592 }; 593 594 enum btc_wl_crc_cnt { 595 BTC_WLCRC_11BOK = 0x0, 596 BTC_WLCRC_11GOK = 0x1, 597 BTC_WLCRC_11NOK = 0x2, 598 BTC_WLCRC_11VHTOK = 0x3, 599 BTC_WLCRC_11BERR = 0x4, 600 BTC_WLCRC_11GERR = 0x5, 601 BTC_WLCRC_11NERR = 0x6, 602 BTC_WLCRC_11VHTERR = 0x7, 603 BTC_WLCRC_MAX 604 }; 605 606 enum btc_timer_cnt { 607 BTC_TIMER_WL_STAYBUSY = 0x0, 608 BTC_TIMER_WL_COEXFREEZE = 0x1, 609 BTC_TIMER_WL_SPECPKT = 0x2, 610 BTC_TIMER_WL_CONNPKT = 0x3, 611 BTC_TIMER_WL_PNPWAKEUP = 0x4, 612 BTC_TIMER_WL_CCKLOCK = 0x5, 613 BTC_TIMER_WL_FWDBG = 0x6, 614 BTC_TIMER_BT_RELINK = 0x7, 615 BTC_TIMER_BT_REENABLE = 0x8, 616 BTC_TIMER_BT_MULTILINK = 0x9, 617 BTC_TIMER_BT_INQPAGE = 0xa, 618 BTC_TIMER_BT_A2DP_ACT = 0xb, 619 BTC_TIMER_MAX 620 }; 621 622 enum btc_wl_status_change { 623 BTC_WLSTATUS_CHANGE_TOIDLE = 0x0, 624 BTC_WLSTATUS_CHANGE_TOBUSY = 0x1, 625 BTC_WLSTATUS_CHANGE_RSSI = 0x2, 626 BTC_WLSTATUS_CHANGE_LINKINFO = 0x3, 627 BTC_WLSTATUS_CHANGE_DIR = 0x4, 628 BTC_WLSTATUS_CHANGE_NOISY = 0x5, 629 BTC_WLSTATUS_CHANGE_BTCNT = 0x6, 630 BTC_WLSTATUS_CHANGE_LOCKTRY = 0x7, 631 BTC_WLSTATUS_CHANGE_MAX 632 }; 633 634 enum btc_commom_chip_setup { 635 BTC_CSETUP_INIT_HW = 0x0, 636 BTC_CSETUP_ANT_SWITCH = 0x1, 637 BTC_CSETUP_GNT_FIX = 0x2, 638 BTC_CSETUP_GNT_DEBUG = 0x3, 639 BTC_CSETUP_RFE_TYPE = 0x4, 640 BTC_CSETUP_COEXINFO_HW = 0x5, 641 BTC_CSETUP_WL_TX_POWER = 0x6, 642 BTC_CSETUP_WL_RX_GAIN = 0x7, 643 BTC_CSETUP_WLAN_ACT_IPS = 0x8, 644 BTC_CSETUP_BT_CTRL_ACT = 0x9, 645 BTC_CSETUP_MAX 646 }; 647 648 enum btc_indirect_reg_type { 649 BTC_INDIRECT_1700 = 0x0, 650 BTC_INDIRECT_7C0 = 0x1, 651 BTC_INDIRECT_MAX 652 }; 653 654 enum btc_pstdma_type { 655 BTC_PSTDMA_FORCE_LPSOFF = 0x0, 656 BTC_PSTDMA_FORCE_LPSON = 0x1, 657 BTC_PSTDMA_MAX 658 }; 659 660 enum btc_btrssi_type { 661 BTC_BTRSSI_RATIO = 0x0, 662 BTC_BTRSSI_DBM = 0x1, 663 BTC_BTRSSI_MAX 664 }; 665 666 enum btc_wl_priority_mask { 667 BTC_WLPRI_RX_RSP = 2, 668 BTC_WLPRI_TX_RSP = 3, 669 BTC_WLPRI_TX_BEACON = 4, 670 BTC_WLPRI_TX_OFDM = 11, 671 BTC_WLPRI_TX_CCK = 12, 672 BTC_WLPRI_TX_BEACONQ = 27, 673 BTC_WLPRI_RX_CCK = 28, 674 BTC_WLPRI_RX_OFDM = 29, 675 BTC_WLPRI_MAX 676 }; 677 678 enum btc_ext_chip_id{ 679 BTC_EXT_CHIP_NONE, 680 BTC_EXT_CHIP_RF4CE, 681 BTC_EXT_CHIP_MAX 682 }; 683 684 enum btc_ext_chip_mode{ 685 BTC_EXTMODE_NORMAL, 686 BTC_EXTMODE_VOICE, 687 BTC_EXTMODE_MAX 688 }; 689 690 enum btc_wl_rfk_type { 691 BTC_PWR_TRK = 0, 692 BTC_IQK = 1, 693 BTC_LCK = 2, 694 BTC_DPK = 3, 695 BTC_TXGAPK = 4, 696 BTC_RFK_TYPE_MAX 697 }; 698 699 enum btc_wl_rfk_state { 700 BTC_RFK_START = 0, 701 BTC_RFK_END = 1, 702 BTC_RFK_STATE_MAX 703 }; 704 705 struct btc_board_info { 706 /* The following is some board information */ 707 u8 bt_chip_type; 708 u8 pg_ant_num; /* pg ant number */ 709 u8 btdm_ant_num; /* ant number for btdm */ 710 u8 btdm_ant_num_by_ant_det; /* ant number for btdm after antenna detection */ 711 u8 btdm_ant_pos; /* Bryant Add to indicate Antenna Position for (pg_ant_num = 2) && (btdm_ant_num =1) (DPDT+1Ant case) */ 712 u8 single_ant_path; /* current used for 8723b only, 1=>s0, 0=>s1 */ 713 boolean tfbga_package; /* for Antenna detect threshold */ 714 boolean btdm_ant_det_finish; 715 boolean btdm_ant_det_already_init_phydm; 716 u8 ant_type; 717 u8 rfe_type; 718 u8 ant_div_cfg; 719 boolean btdm_ant_det_complete_fail; 720 u8 ant_det_result; 721 boolean ant_det_result_five_complete; 722 u32 antdetval; 723 u8 customerID; 724 u8 customer_id; 725 u8 ant_distance; /* WL-BT antenna space for non-shared antenna */ 726 u8 ext_chip_id; 727 }; 728 729 struct btc_coex_dm { 730 boolean cur_ignore_wlan_act; 731 boolean cur_ps_tdma_on; 732 boolean cur_low_penalty_ra; 733 boolean cur_wl_rx_low_gain_en; 734 735 u8 bt_rssi_state[4]; 736 u8 wl_rssi_state[4]; 737 u8 cur_ps_tdma; 738 u8 ps_tdma_para[5]; 739 u8 fw_tdma_para[5]; 740 u8 cur_lps; 741 u8 cur_rpwm; 742 u8 cur_bt_pwr_lvl; 743 u8 cur_bt_lna_lvl; 744 u8 cur_wl_pwr_lvl; 745 u8 cur_algorithm; 746 u8 bt_status; 747 u8 wl_chnl_info[3]; 748 u8 cur_toggle_para[6]; 749 u8 bt_slot_length1[10]; 750 u8 bt_slot_length2[10]; 751 u32 cur_ant_pos_type; 752 u32 cur_switch_status; 753 u32 setting_tdma; 754 }; 755 756 struct btc_coex_sta { 757 boolean coex_freeze; 758 boolean coex_freerun; 759 boolean rf4ce_en; 760 boolean force_freerun; 761 boolean force_tdd; 762 763 boolean bt_disabled; 764 boolean bt_disabled_pre; 765 boolean bt_link_exist; 766 boolean bt_whck_test; 767 boolean bt_inq_page; 768 boolean bt_inq_page_pre; 769 boolean bt_inq_page_remain; 770 boolean bt_inq; 771 boolean bt_page; 772 boolean bt_ble_voice; 773 boolean bt_ble_exist; 774 boolean bt_hfp_exist; 775 boolean bt_a2dp_exist; 776 boolean bt_hid_exist; 777 boolean bt_pan_exist; // PAN or OPP 778 boolean bt_opp_exist; //OPP only 779 boolean bt_msft_mr_exist; 780 boolean bt_acl_busy; 781 boolean bt_fix_2M; 782 boolean bt_setup_link; 783 boolean bt_multi_link; 784 boolean bt_multi_link_pre; 785 boolean bt_multi_link_remain; 786 boolean bt_a2dp_sink; 787 boolean bt_reenable; 788 boolean bt_ble_scan_en; 789 boolean bt_slave; 790 boolean bt_a2dp_active; 791 boolean bt_a2dp_active_pre; 792 boolean bt_a2dp_active_remain; 793 boolean bt_slave_latency; 794 boolean bt_init_scan; 795 boolean bt_418_hid_exist; 796 boolean bt_ble_hid_exist; 797 boolean bt_mesh; 798 boolean bt_ctr_ok; 799 800 boolean wl_under_lps; 801 boolean wl_in_lps_enter; 802 boolean wl_under_ips; 803 boolean wl_under_4way; 804 boolean wl_hi_pri_task1; 805 boolean wl_hi_pri_task2; 806 boolean wl_cck_lock; 807 boolean wl_cck_lock_pre; 808 boolean wl_cck_lock_ever; 809 boolean wl_force_lps_ctrl; 810 boolean wl_busy_pre; 811 boolean wl_gl_busy; 812 boolean wl_gl_busy_pre; 813 boolean wl_linkscan_proc; 814 boolean wl_mimo_ps; 815 boolean wl_cck_dead_lock_ap; 816 boolean wl_tx_limit_en; 817 boolean wl_ampdu_limit_en; 818 boolean wl_rxagg_limit_en; 819 boolean wl_connecting; 820 boolean wl_pnp_wakeup; 821 boolean wl_slot_toggle; 822 boolean wl_slot_toggle_change; /* if toggle to no-toggle */ 823 boolean wl_leak_ap; /* !is_no_wl_5ms_extend */ 824 boolean wl_blacklist_ap; 825 boolean wl_rfk; 826 827 u8 coex_table_type; 828 u8 coex_run_reason; 829 u8 tdma_byte4_modify_pre; 830 u8 kt_ver; 831 u8 gnt_workaround_state; 832 u8 tdma_timer_base; 833 u8 bt_rssi; 834 u8 bt_profile_num; 835 u8 bt_profile_num_pre; 836 u8 bt_info_c2h[BTC_BTINFO_SRC_MAX][BTC_BTINFO_LENGTH_MAX]; 837 u8 bt_info_lb2; 838 u8 bt_info_lb3; 839 u8 bt_info_hb0; 840 u8 bt_info_hb1; 841 u8 bt_info_hb2; 842 u8 bt_info_hb3; 843 u8 bt_ble_scan_type; 844 u8 bt_afh_map[10]; 845 u8 bt_a2dp_vendor_id; 846 u8 bt_hid_pair_num; 847 u8 bt_hid_slot; 848 u8 bt_a2dp_bitpool; 849 u8 bt_iqk_state; 850 u8 bt_sut_pwr_lvl[4]; 851 u8 bt_golden_rx_shift[4]; 852 u8 bt_ext_autoslot_thres; 853 u8 ext_chip_mode; 854 855 u8 wl_pnp_state_pre; 856 u8 wl_noisy_level; 857 u8 wl_fw_dbg_info[10]; 858 u8 wl_fw_dbg_info_pre[10]; 859 u8 wl_rx_rate; 860 u8 wl_tx_rate; 861 u8 wl_rts_rx_rate; 862 u8 wl_center_ch; 863 u8 wl_tx_macid; 864 u8 wl_tx_retry_ratio; 865 u8 wl_coex_mode; 866 u8 wl_iot_peer; 867 u8 wl_ra_thres; 868 u8 wl_ampdulen; 869 u8 wl_rxagg_size; 870 u8 wl_toggle_para[6]; 871 u8 wl_toggle_interval; 872 873 u16 score_board_BW; 874 u32 score_board_WB; 875 u16 bt_reg_vendor_ac; 876 u16 bt_reg_vendor_ae; 877 u32 bt_reg_vendor_dac; 878 u16 bt_reg_modem_a; 879 u16 bt_reg_rf_2; 880 u16 bt_reg_rf_9; 881 u16 bt_reg_le_200; 882 u16 wl_txlimit; 883 884 u32 score_board_BW_32bit; 885 u32 score_board_WB_32bit; 886 u32 hi_pri_tx; 887 u32 hi_pri_rx; 888 u32 lo_pri_tx; 889 u32 lo_pri_rx; 890 u32 bt_supported_feature; 891 u32 bt_supported_version; 892 u32 bt_ble_scan_para[3]; 893 u32 bt_a2dp_device_name; 894 u32 bt_a2dp_flush_time; 895 u32 wl_arfb1; 896 u32 wl_arfb2; 897 u32 wl_traffic_dir; 898 u32 wl_bw; 899 u32 cnt_bt_info_c2h[BTC_BTINFO_SRC_MAX]; 900 u32 cnt_bt[BTC_CNT_BT_MAX]; 901 u32 cnt_wl[BTC_CNT_WL_MAX]; 902 u32 cnt_timer[BTC_TIMER_MAX]; 903 }; 904 905 struct btc_rfe_type { 906 boolean ant_switch_exist; 907 boolean ant_switch_diversity; /* If diversity on */ 908 boolean ant_switch_with_bt; /* If WL_2G/BT use ext-switch at shared-ant */ 909 u8 rfe_module_type; 910 u8 ant_switch_type; 911 u8 ant_switch_polarity; 912 913 boolean band_switch_exist; 914 u8 band_switch_type; /* 0:DPDT, 1:SPDT */ 915 u8 band_switch_polarity; 916 917 /* If TRUE: WLG at BTG, If FALSE: WLG at WLAG */ 918 boolean wlg_at_btg; 919 }; 920 921 922 struct btc_wifi_link_info_ext { 923 boolean is_all_under_5g; 924 boolean is_mcc_25g; 925 boolean is_p2p_connected; 926 boolean is_ap_mode; 927 boolean is_scan; 928 boolean is_link; 929 boolean is_roam; 930 boolean is_4way; 931 boolean is_32k; 932 boolean is_connected; 933 u8 num_of_active_port; 934 u32 port_connect_status; 935 u32 traffic_dir; 936 u32 wifi_bw; 937 }; 938 939 struct btc_coex_table_para { 940 u32 bt; //0x6c0 941 u32 wl; //0x6c4 942 }; 943 944 struct btc_tdma_para { 945 u8 para[5]; 946 }; 947 948 struct btc_reg_byte_modify { 949 u32 addr; 950 u8 bitmask; 951 u8 val; 952 }; 953 954 struct btc_5g_afh_map { 955 u32 wl_5g_ch; 956 u8 bt_skip_ch; 957 u8 bt_skip_span; 958 }; 959 960 struct btc_rf_para { 961 u8 wl_pwr_dec_lvl; 962 u8 bt_pwr_dec_lvl; 963 boolean wl_low_gain_en; 964 u8 bt_lna_lvl; 965 }; 966 967 typedef enum _BTC_DBG_OPCODE { 968 BTC_DBG_SET_COEX_NORMAL = 0x0, 969 BTC_DBG_SET_COEX_WIFI_ONLY = 0x1, 970 BTC_DBG_SET_COEX_BT_ONLY = 0x2, 971 BTC_DBG_SET_COEX_DEC_BT_PWR = 0x3, 972 BTC_DBG_SET_COEX_BT_AFH_MAP = 0x4, 973 BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT = 0x5, 974 BTC_DBG_SET_COEX_MANUAL_CTRL = 0x6, 975 BTC_DBG_MAX 976 } BTC_DBG_OPCODE, *PBTC_DBG_OPCODE; 977 978 typedef enum _BTC_RSSI_STATE { 979 BTC_RSSI_STATE_HIGH = 0x0, 980 BTC_RSSI_STATE_MEDIUM = 0x1, 981 BTC_RSSI_STATE_LOW = 0x2, 982 BTC_RSSI_STATE_STAY_HIGH = 0x3, 983 BTC_RSSI_STATE_STAY_MEDIUM = 0x4, 984 BTC_RSSI_STATE_STAY_LOW = 0x5, 985 BTC_RSSI_MAX 986 } BTC_RSSI_STATE, *PBTC_RSSI_STATE; 987 #define BTC_RSSI_HIGH(_rssi_) ((_rssi_ == BTC_RSSI_STATE_HIGH || _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? TRUE:FALSE) 988 #define BTC_RSSI_MEDIUM(_rssi_) ((_rssi_ == BTC_RSSI_STATE_MEDIUM || _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? TRUE:FALSE) 989 #define BTC_RSSI_LOW(_rssi_) ((_rssi_ == BTC_RSSI_STATE_LOW || _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? TRUE:FALSE) 990 991 typedef enum _BTC_WIFI_ROLE { 992 BTC_ROLE_STATION = 0x0, 993 BTC_ROLE_AP = 0x1, 994 BTC_ROLE_IBSS = 0x2, 995 BTC_ROLE_HS_MODE = 0x3, 996 BTC_ROLE_MAX 997 } BTC_WIFI_ROLE, *PBTC_WIFI_ROLE; 998 999 typedef enum _BTC_WIRELESS_FREQ { 1000 BTC_FREQ_2_4G = 0x0, 1001 BTC_FREQ_5G = 0x1, 1002 BTC_FREQ_25G = 0x2, 1003 BTC_FREQ_MAX 1004 } BTC_WIRELESS_FREQ, *PBTC_WIRELESS_FREQ; 1005 1006 typedef enum _BTC_WIFI_BW_MODE { 1007 BTC_WIFI_BW_LEGACY = 0x0, 1008 BTC_WIFI_BW_HT20 = 0x1, 1009 BTC_WIFI_BW_HT40 = 0x2, 1010 BTC_WIFI_BW_HT80 = 0x3, 1011 BTC_WIFI_BW_HT160 = 0x4, 1012 BTC_WIFI_BW_MAX 1013 } BTC_WIFI_BW_MODE, *PBTC_WIFI_BW_MODE; 1014 1015 typedef enum _BTC_WIFI_TRAFFIC_DIR { 1016 BTC_WIFI_TRAFFIC_TX = 0x0, 1017 BTC_WIFI_TRAFFIC_RX = 0x1, 1018 BTC_WIFI_TRAFFIC_MAX 1019 } BTC_WIFI_TRAFFIC_DIR, *PBTC_WIFI_TRAFFIC_DIR; 1020 1021 typedef enum _BTC_WIFI_PNP { 1022 BTC_WIFI_PNP_WAKE_UP = 0x0, 1023 BTC_WIFI_PNP_SLEEP = 0x1, 1024 BTC_WIFI_PNP_SLEEP_KEEP_ANT = 0x2, 1025 BTC_WIFI_PNP_WOWLAN = 0x3, 1026 BTC_WIFI_PNP_MAX 1027 } BTC_WIFI_PNP, *PBTC_WIFI_PNP; 1028 1029 typedef enum _BTC_IOT_PEER { 1030 BTC_IOT_PEER_UNKNOWN = 0, 1031 BTC_IOT_PEER_REALTEK = 1, 1032 BTC_IOT_PEER_REALTEK_92SE = 2, 1033 BTC_IOT_PEER_BROADCOM = 3, 1034 BTC_IOT_PEER_RALINK = 4, 1035 BTC_IOT_PEER_ATHEROS = 5, 1036 BTC_IOT_PEER_CISCO = 6, 1037 BTC_IOT_PEER_MERU = 7, 1038 BTC_IOT_PEER_MARVELL = 8, 1039 BTC_IOT_PEER_REALTEK_SOFTAP = 9, /* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */ 1040 BTC_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */ 1041 BTC_IOT_PEER_AIRGO = 11, 1042 BTC_IOT_PEER_INTEL = 12, 1043 BTC_IOT_PEER_RTK_APCLIENT = 13, 1044 BTC_IOT_PEER_REALTEK_81XX = 14, 1045 BTC_IOT_PEER_REALTEK_WOW = 15, 1046 BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16, 1047 BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17, 1048 BTC_IOT_PEER_MAX, 1049 } BTC_IOT_PEER, *PBTC_IOT_PEER; 1050 1051 /* for 8723b-d cut large current issue */ 1052 typedef enum _BTC_WIFI_COEX_STATE { 1053 BTC_WIFI_STAT_INIT, 1054 BTC_WIFI_STAT_IQK, 1055 BTC_WIFI_STAT_NORMAL_OFF, 1056 BTC_WIFI_STAT_MP_OFF, 1057 BTC_WIFI_STAT_NORMAL, 1058 BTC_WIFI_STAT_ANT_DIV, 1059 BTC_WIFI_STAT_MAX 1060 } BTC_WIFI_COEX_STATE, *PBTC_WIFI_COEX_STATE; 1061 1062 typedef enum _BTC_ANT_TYPE { 1063 BTC_ANT_TYPE_0, 1064 BTC_ANT_TYPE_1, 1065 BTC_ANT_TYPE_2, 1066 BTC_ANT_TYPE_3, 1067 BTC_ANT_TYPE_4, 1068 BTC_ANT_TYPE_MAX 1069 } BTC_ANT_TYPE, *PBTC_ANT_TYPE; 1070 1071 typedef enum _BTC_VENDOR { 1072 BTC_VENDOR_LENOVO, 1073 BTC_VENDOR_ASUS, 1074 BTC_VENDOR_OTHER 1075 } BTC_VENDOR, *PBTC_VENDOR; 1076 1077 1078 /* defined for BFP_BTC_GET */ 1079 typedef enum _BTC_GET_TYPE { 1080 /* type BOOLEAN */ 1081 BTC_GET_BL_HS_OPERATION, 1082 BTC_GET_BL_HS_CONNECTING, 1083 BTC_GET_BL_WIFI_FW_READY, 1084 BTC_GET_BL_WIFI_CONNECTED, 1085 BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED, 1086 BTC_GET_BL_WIFI_LINK_INFO, 1087 BTC_GET_BL_WIFI_BUSY, 1088 BTC_GET_BL_WIFI_SCAN, 1089 BTC_GET_BL_WIFI_LINK, 1090 BTC_GET_BL_WIFI_ROAM, 1091 BTC_GET_BL_WIFI_4_WAY_PROGRESS, 1092 BTC_GET_BL_WIFI_UNDER_5G, 1093 BTC_GET_BL_WIFI_AP_MODE_ENABLE, 1094 BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, 1095 BTC_GET_BL_WIFI_UNDER_B_MODE, 1096 BTC_GET_BL_EXT_SWITCH, 1097 BTC_GET_BL_WIFI_IS_IN_MP_MODE, 1098 BTC_GET_BL_IS_ASUS_8723B, 1099 BTC_GET_BL_RF4CE_CONNECTED, 1100 BTC_GET_BL_WIFI_LW_PWR_STATE, 1101 1102 /* type s4Byte */ 1103 BTC_GET_S4_WIFI_RSSI, 1104 BTC_GET_S4_HS_RSSI, 1105 1106 /* type u4Byte */ 1107 BTC_GET_U4_WIFI_BW, 1108 BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, 1109 BTC_GET_U4_WIFI_TRAFFIC_DIR, 1110 BTC_GET_U4_WIFI_FW_VER, 1111 BTC_GET_U4_WIFI_PHY_VER, 1112 BTC_GET_U4_WIFI_LINK_STATUS, 1113 BTC_GET_U4_BT_PATCH_VER, 1114 BTC_GET_U4_VENDOR, 1115 BTC_GET_U4_SUPPORTED_VERSION, 1116 BTC_GET_U4_SUPPORTED_FEATURE, 1117 BTC_GET_U4_BT_DEVICE_INFO, 1118 BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL, 1119 BTC_GET_U4_BT_A2DP_FLUSH_VAL, 1120 BTC_GET_U4_WIFI_IQK_TOTAL, 1121 BTC_GET_U4_WIFI_IQK_OK, 1122 BTC_GET_U4_WIFI_IQK_FAIL, 1123 1124 /* type u1Byte */ 1125 BTC_GET_U1_WIFI_DOT11_CHNL, 1126 BTC_GET_U1_WIFI_CENTRAL_CHNL, 1127 BTC_GET_U1_WIFI_HS_CHNL, 1128 BTC_GET_U1_WIFI_P2P_CHNL, 1129 BTC_GET_U1_MAC_PHY_MODE, 1130 BTC_GET_U1_AP_NUM, 1131 BTC_GET_U1_ANT_TYPE, 1132 BTC_GET_U1_IOT_PEER, 1133 BTC_GET_BL_WIFI_BSSID, 1134 1135 /* type u2Byte */ 1136 BTC_GET_U2_BEACON_PERIOD, 1137 1138 /*===== for 1Ant ======*/ 1139 BTC_GET_U1_LPS_MODE, 1140 1141 BTC_GET_MAX 1142 } BTC_GET_TYPE, *PBTC_GET_TYPE; 1143 1144 /* defined for BFP_BTC_SET */ 1145 typedef enum _BTC_SET_TYPE { 1146 /* type BOOLEAN */ 1147 BTC_SET_BL_BT_DISABLE, 1148 BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE, 1149 BTC_SET_BL_BT_TRAFFIC_BUSY, 1150 BTC_SET_BL_BT_LIMITED_DIG, 1151 BTC_SET_BL_FORCE_TO_ROAM, 1152 BTC_SET_BL_TO_REJ_AP_AGG_PKT, 1153 BTC_SET_BL_BT_CTRL_AGG_SIZE, 1154 BTC_SET_BL_INC_SCAN_DEV_NUM, 1155 BTC_SET_BL_BT_TX_RX_MASK, 1156 BTC_SET_BL_MIRACAST_PLUS_BT, 1157 BTC_SET_BL_BT_LNA_CONSTRAIN_LEVEL, 1158 BTC_SET_BL_BT_GOLDEN_RX_RANGE, 1159 1160 /* type u1Byte */ 1161 BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, 1162 BTC_SET_U1_AGG_BUF_SIZE, 1163 1164 /* type trigger some action */ 1165 BTC_SET_ACT_GET_BT_RSSI, 1166 BTC_SET_ACT_AGGREGATE_CTRL, 1167 BTC_SET_ACT_ANTPOSREGRISTRY_CTRL, 1168 1169 // for mimo ps mode setting 1170 BTC_SET_MIMO_PS_MODE, 1171 /*===== for 1Ant ======*/ 1172 /* type BOOLEAN */ 1173 1174 /* type u1Byte */ 1175 BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, 1176 BTC_SET_U1_LPS_VAL, 1177 BTC_SET_U1_RPWM_VAL, 1178 /* type trigger some action */ 1179 BTC_SET_ACT_LEAVE_LPS, 1180 BTC_SET_ACT_ENTER_LPS, 1181 BTC_SET_ACT_NORMAL_LPS, 1182 BTC_SET_ACT_PRE_NORMAL_LPS, 1183 BTC_SET_ACT_POST_NORMAL_LPS, 1184 BTC_SET_ACT_DISABLE_LOW_POWER, 1185 BTC_SET_ACT_UPDATE_RAMASK, 1186 BTC_SET_ACT_SEND_MIMO_PS, 1187 /* BT Coex related */ 1188 BTC_SET_ACT_CTRL_BT_INFO, 1189 BTC_SET_ACT_CTRL_BT_COEX, 1190 BTC_SET_ACT_CTRL_8723B_ANT, 1191 BTC_SET_RESET_COEX_VAR, 1192 /*=================*/ 1193 BTC_SET_MAX 1194 } BTC_SET_TYPE, *PBTC_SET_TYPE; 1195 1196 typedef enum _BTC_DBG_DISP_TYPE { 1197 BTC_DBG_DISP_COEX_STATISTICS = 0x0, 1198 BTC_DBG_DISP_BT_LINK_INFO = 0x1, 1199 BTC_DBG_DISP_WIFI_STATUS = 0x2, 1200 BTC_DBG_DISP_MAX 1201 } BTC_DBG_DISP_TYPE, *PBTC_DBG_DISP_TYPE; 1202 1203 typedef enum _BTC_NOTIFY_TYPE_IPS { 1204 BTC_IPS_LEAVE = 0x0, 1205 BTC_IPS_ENTER = 0x1, 1206 BTC_IPS_MAX 1207 } BTC_NOTIFY_TYPE_IPS, *PBTC_NOTIFY_TYPE_IPS; 1208 typedef enum _BTC_NOTIFY_TYPE_LPS { 1209 BTC_LPS_DISABLE = 0x0, 1210 BTC_LPS_ENABLE = 0x1, 1211 BTC_LPS_PRE = 0x2, 1212 BTC_LPS_RET = 0x3, 1213 BTC_LPS_MAX 1214 } BTC_NOTIFY_TYPE_LPS, *PBTC_NOTIFY_TYPE_LPS; 1215 typedef enum _BTC_NOTIFY_TYPE_SCAN { 1216 BTC_SCAN_FINISH = 0x0, 1217 BTC_SCAN_START = 0x1, 1218 BTC_SCAN_START_2G = 0x2, 1219 BTC_SCAN_START_5G = 0x3, 1220 BTC_SCAN_MAX 1221 } BTC_NOTIFY_TYPE_SCAN, *PBTC_NOTIFY_TYPE_SCAN; 1222 typedef enum _BTC_NOTIFY_TYPE_SWITCHBAND { 1223 BTC_NOT_SWITCH = 0x0, 1224 BTC_SWITCH_TO_24G = 0x1, 1225 BTC_SWITCH_TO_5G = 0x2, 1226 BTC_SWITCH_TO_24G_NOFORSCAN = 0x3, 1227 BTC_SWITCH_MAX 1228 } BTC_NOTIFY_TYPE_SWITCHBAND, *PBTC_NOTIFY_TYPE_SWITCHBAND; 1229 typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE { 1230 BTC_ASSOCIATE_FINISH = 0x0, 1231 BTC_ASSOCIATE_START = 0x1, 1232 BTC_ASSOCIATE_5G_FINISH = 0x2, 1233 BTC_ASSOCIATE_5G_START = 0x3, 1234 BTC_ASSOCIATE_MAX 1235 } BTC_NOTIFY_TYPE_ASSOCIATE, *PBTC_NOTIFY_TYPE_ASSOCIATE; 1236 typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS { 1237 BTC_MEDIA_DISCONNECT = 0x0, 1238 BTC_MEDIA_CONNECT = 0x1, 1239 BTC_MEDIA_CONNECT_5G = 0x02, 1240 BTC_MEDIA_MAX 1241 } BTC_NOTIFY_TYPE_MEDIA_STATUS, *PBTC_NOTIFY_TYPE_MEDIA_STATUS; 1242 typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET { 1243 BTC_PACKET_UNKNOWN = 0x0, 1244 BTC_PACKET_DHCP = 0x1, 1245 BTC_PACKET_ARP = 0x2, 1246 BTC_PACKET_EAPOL = 0x3, 1247 BTC_PACKET_MAX 1248 } BTC_NOTIFY_TYPE_SPECIFIC_PACKET, *PBTC_NOTIFY_TYPE_SPECIFIC_PACKET; 1249 typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION { 1250 BTC_STACK_OP_NONE = 0x0, 1251 BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1, 1252 BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2, 1253 BTC_STACK_OP_MAX 1254 } BTC_NOTIFY_TYPE_STACK_OPERATION, *PBTC_NOTIFY_TYPE_STACK_OPERATION; 1255 1256 typedef enum _BTC_LINK_CHANGE_TYPE{ 1257 BTC_LINK_CHANGE_TYPE_NONE = 0x0, 1258 BTC_LINK_CHANGE_TYPE_ECSA_START = 0x1, 1259 BTC_LINK_CHANGE_TYPE_ECSA_DONE = 0x2, 1260 BTC_LINK_CHANGE_TYPE_MAX 1261 }BTC_LINK_CHANGE_TYPE,*PBTC_LINK_CHANGE_TYPE; 1262 1263 /* Bryant Add */ 1264 typedef enum _BTC_ANTENNA_POS { 1265 BTC_ANTENNA_AT_MAIN_PORT = 0x1, 1266 BTC_ANTENNA_AT_AUX_PORT = 0x2, 1267 } BTC_ANTENNA_POS, *PBTC_ANTENNA_POS; 1268 1269 /* Bryant Add */ 1270 typedef enum _BTC_BT_OFFON { 1271 BTC_BT_OFF = 0x0, 1272 BTC_BT_ON = 0x1, 1273 } BTC_BTOFFON, *PBTC_BT_OFFON; 1274 1275 #define BTC_5G_BAND 0x80 1276 1277 /*================================================== 1278 For following block is for coex offload 1279 ==================================================*/ 1280 typedef struct _COL_H2C { 1281 u1Byte opcode; 1282 u1Byte opcode_ver:4; 1283 u1Byte req_num:4; 1284 u1Byte buf[1]; 1285 } COL_H2C, *PCOL_H2C; 1286 1287 #define COL_C2H_ACK_HDR_LEN 3 1288 typedef struct _COL_C2H_ACK { 1289 u1Byte status; 1290 u1Byte opcode_ver:4; 1291 u1Byte req_num:4; 1292 u1Byte ret_len; 1293 u1Byte buf[1]; 1294 } COL_C2H_ACK, *PCOL_C2H_ACK; 1295 1296 #define COL_C2H_IND_HDR_LEN 3 1297 typedef struct _COL_C2H_IND { 1298 u1Byte type; 1299 u1Byte version; 1300 u1Byte length; 1301 u1Byte data[1]; 1302 } COL_C2H_IND, *PCOL_C2H_IND; 1303 1304 /*============================================ 1305 NOTE: for debug message, the following define should match 1306 the strings in coexH2cResultString. 1307 ============================================*/ 1308 typedef enum _COL_H2C_STATUS { 1309 /* c2h status */ 1310 COL_STATUS_C2H_OK = 0x00, /* Wifi received H2C request and check content ok. */ 1311 COL_STATUS_C2H_UNKNOWN = 0x01, /* Not handled routine */ 1312 COL_STATUS_C2H_UNKNOWN_OPCODE = 0x02, /* Invalid OP code, It means that wifi firmware received an undefiend OP code. */ 1313 COL_STATUS_C2H_OPCODE_VER_MISMATCH = 0x03, /* Wifi firmware and wifi driver mismatch, need to update wifi driver or wifi or. */ 1314 COL_STATUS_C2H_PARAMETER_ERROR = 0x04, /* Error paraneter.(ex: parameters = NULL but it should have values) */ 1315 COL_STATUS_C2H_PARAMETER_OUT_OF_RANGE = 0x05, /* Wifi firmware needs to check the parameters from H2C request and return the status.(ex: ch = 500, it's wrong) */ 1316 /* other COL status start from here */ 1317 COL_STATUS_C2H_REQ_NUM_MISMATCH , /* c2h req_num mismatch, means this c2h is not we expected. */ 1318 COL_STATUS_H2C_HALMAC_FAIL , /* HALMAC return fail. */ 1319 COL_STATUS_H2C_TIMTOUT , /* not received the c2h response from fw */ 1320 COL_STATUS_INVALID_C2H_LEN , /* invalid coex offload c2h ack length, must >= 3 */ 1321 COL_STATUS_COEX_DATA_OVERFLOW , /* coex returned length over the c2h ack length. */ 1322 COL_STATUS_MAX 1323 } COL_H2C_STATUS, *PCOL_H2C_STATUS; 1324 1325 #define COL_MAX_H2C_REQ_NUM 16 1326 1327 #define COL_H2C_BUF_LEN 20 1328 typedef enum _COL_OPCODE { 1329 COL_OP_WIFI_STATUS_NOTIFY = 0x0, 1330 COL_OP_WIFI_PROGRESS_NOTIFY = 0x1, 1331 COL_OP_WIFI_INFO_NOTIFY = 0x2, 1332 COL_OP_WIFI_POWER_STATE_NOTIFY = 0x3, 1333 COL_OP_SET_CONTROL = 0x4, 1334 COL_OP_GET_CONTROL = 0x5, 1335 COL_OP_WIFI_OPCODE_MAX 1336 } COL_OPCODE, *PCOL_OPCODE; 1337 1338 typedef enum _COL_IND_TYPE { 1339 COL_IND_BT_INFO = 0x0, 1340 COL_IND_PSTDMA = 0x1, 1341 COL_IND_LIMITED_TX_RX = 0x2, 1342 COL_IND_COEX_TABLE = 0x3, 1343 COL_IND_REQ = 0x4, 1344 COL_IND_MAX 1345 } COL_IND_TYPE, *PCOL_IND_TYPE; 1346 1347 typedef struct _COL_SINGLE_H2C_RECORD { 1348 u1Byte h2c_buf[COL_H2C_BUF_LEN]; /* the latest sent h2c buffer */ 1349 u4Byte h2c_len; 1350 u1Byte c2h_ack_buf[COL_H2C_BUF_LEN]; /* the latest received c2h buffer */ 1351 u4Byte c2h_ack_len; 1352 u4Byte count; /* the total number of the sent h2c command */ 1353 u4Byte status[COL_STATUS_MAX]; /* the c2h status for the sent h2c command */ 1354 } COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD; 1355 1356 typedef struct _COL_SINGLE_C2H_IND_RECORD { 1357 u1Byte ind_buf[COL_H2C_BUF_LEN]; /* the latest received c2h indication buffer */ 1358 u4Byte ind_len; 1359 u4Byte count; /* the total number of the rcvd c2h indication */ 1360 u4Byte status[COL_STATUS_MAX]; /* the c2h indication verified status */ 1361 } COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD; 1362 1363 typedef struct _BTC_OFFLOAD { 1364 /* H2C command related */ 1365 u1Byte h2c_req_num; 1366 u4Byte cnt_h2c_sent; 1367 COL_SINGLE_H2C_RECORD h2c_record[COL_OP_WIFI_OPCODE_MAX]; 1368 1369 /* C2H Ack related */ 1370 u4Byte cnt_c2h_ack; 1371 u4Byte status[COL_STATUS_MAX]; 1372 struct completion c2h_event[COL_MAX_H2C_REQ_NUM]; /* for req_num = 1~COL_MAX_H2C_REQ_NUM */ 1373 u1Byte c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN]; 1374 u1Byte c2h_ack_len[COL_MAX_H2C_REQ_NUM]; 1375 1376 /* C2H Indication related */ 1377 u4Byte cnt_c2h_ind; 1378 COL_SINGLE_C2H_IND_RECORD c2h_ind_record[COL_IND_MAX]; 1379 u4Byte c2h_ind_status[COL_STATUS_MAX]; 1380 u1Byte c2h_ind_buf[COL_H2C_BUF_LEN]; 1381 u1Byte c2h_ind_len; 1382 } BTC_OFFLOAD, *PBTC_OFFLOAD; 1383 extern BTC_OFFLOAD gl_coex_offload; 1384 /*==================================================*/ 1385 1386 /* BTC_LINK_MODE same as WIFI_LINK_MODE */ 1387 typedef enum _BTC_LINK_MODE{ 1388 BTC_LINK_NONE=0, 1389 BTC_LINK_ONLY_GO, 1390 BTC_LINK_ONLY_GC, 1391 BTC_LINK_ONLY_STA, 1392 BTC_LINK_ONLY_AP, 1393 BTC_LINK_2G_MCC_GO_STA, 1394 BTC_LINK_5G_MCC_GO_STA, 1395 BTC_LINK_25G_MCC_GO_STA, 1396 BTC_LINK_2G_MCC_GC_STA, 1397 BTC_LINK_5G_MCC_GC_STA, 1398 BTC_LINK_25G_MCC_GC_STA, 1399 BTC_LINK_2G_SCC_GO_STA, 1400 BTC_LINK_5G_SCC_GO_STA, 1401 BTC_LINK_2G_SCC_GC_STA, 1402 BTC_LINK_5G_SCC_GC_STA, 1403 BTC_LINK_MAX=30 1404 }BTC_LINK_MODE, *PBTC_LINK_MODE; 1405 1406 1407 struct btc_wifi_link_info { 1408 BTC_LINK_MODE link_mode; /* LinkMode */ 1409 u1Byte sta_center_channel; /* StaCenterChannel */ 1410 u1Byte p2p_center_channel; /* P2PCenterChannel */ 1411 BOOLEAN bany_client_join_go; 1412 BOOLEAN benable_noa; 1413 BOOLEAN bhotspot; 1414 }; 1415 1416 #if 0 1417 typedef enum _BTC_MULTI_PORT_TDMA_MODE { 1418 BTC_MULTI_PORT_TDMA_MODE_NONE=0, 1419 BTC_MULTI_PORT_TDMA_MODE_2G_SCC_GO, 1420 BTC_MULTI_PORT_TDMA_MODE_2G_P2P_GO, 1421 BTC_MULTI_PORT_TDMA_MODE_2G_HOTSPOT_GO 1422 } BTC_MULTI_PORT_TDMA_MODE, *PBTC_MULTI_PORT_TDMA_MODE; 1423 1424 typedef struct btc_multi_port_tdma_info { 1425 BTC_MULTI_PORT_TDMA_MODE btc_multi_port_tdma_mode; 1426 u1Byte start_time_from_bcn; 1427 u1Byte bt_time; 1428 } BTC_MULTI_PORT_TDMA_INFO, *PBTC_MULTI_PORT_TDMA_INFO; 1429 #endif 1430 1431 typedef enum _btc_concurrent_mode { 1432 btc_concurrent_mode_none = 0, 1433 btc_concurrent_mode_2g_go_miracast, 1434 btc_concurrent_mode_2g_go_hotspot, 1435 btc_concurrent_mode_2g_scc_go_miracast_sta, 1436 btc_concurrent_mode_2g_scc_go_hotspot_sta, 1437 btc_concurrent_mode_2g_gc, 1438 } btc_concurrent_mode, *pbtc_concurrent_mode; 1439 1440 struct btc_concurrent_setting { 1441 btc_concurrent_mode btc_concurrent_mode; 1442 u1Byte start_time_from_bcn; 1443 u1Byte bt_time; 1444 }; 1445 1446 typedef u1Byte 1447 (*BFP_BTC_R1)( 1448 IN PVOID pBtcContext, 1449 IN u4Byte RegAddr 1450 ); 1451 typedef u2Byte 1452 (*BFP_BTC_R2)( 1453 IN PVOID pBtcContext, 1454 IN u4Byte RegAddr 1455 ); 1456 typedef u4Byte 1457 (*BFP_BTC_R4)( 1458 IN PVOID pBtcContext, 1459 IN u4Byte RegAddr 1460 ); 1461 typedef VOID 1462 (*BFP_BTC_W1)( 1463 IN PVOID pBtcContext, 1464 IN u4Byte RegAddr, 1465 IN u1Byte Data 1466 ); 1467 typedef VOID 1468 (*BFP_BTC_W1_BIT_MASK)( 1469 IN PVOID pBtcContext, 1470 IN u4Byte regAddr, 1471 IN u1Byte bitMask, 1472 IN u1Byte data1b 1473 ); 1474 typedef VOID 1475 (*BFP_BTC_W2)( 1476 IN PVOID pBtcContext, 1477 IN u4Byte RegAddr, 1478 IN u2Byte Data 1479 ); 1480 typedef VOID 1481 (*BFP_BTC_W4)( 1482 IN PVOID pBtcContext, 1483 IN u4Byte RegAddr, 1484 IN u4Byte Data 1485 ); 1486 typedef VOID 1487 (*BFP_BTC_LOCAL_REG_W1)( 1488 IN PVOID pBtcContext, 1489 IN u4Byte RegAddr, 1490 IN u1Byte Data 1491 ); 1492 typedef u4Byte 1493 (*BFP_BTC_R_LINDIRECT)( 1494 IN PVOID pBtcContext, 1495 IN u2Byte reg_addr 1496 ); 1497 typedef u2Byte 1498 (*BFP_BTC_R_SCBD)( 1499 IN PVOID pBtcContext, 1500 IN pu2Byte score_board_val 1501 ); 1502 typedef u4Byte 1503 (*BFP_BTC_R_SCBD_32BIT)( 1504 IN PVOID pBtcContext, 1505 IN pu4Byte score_board_val 1506 ); 1507 typedef VOID 1508 (*BFP_BTC_W_SCBD)( 1509 IN PVOID pBtcContext, 1510 IN u2Byte bitpos, 1511 IN BOOLEAN state 1512 ); 1513 typedef VOID 1514 (*BFP_BTC_W_SCBD_32BIT)( 1515 IN PVOID pBtcContext, 1516 IN u4Byte bitpos, 1517 IN BOOLEAN state 1518 ); 1519 typedef VOID 1520 (*BFP_BTC_W_LINDIRECT)( 1521 IN PVOID pBtcContext, 1522 IN u2Byte reg_addr, 1523 IN u4Byte bit_mask, 1524 IN u4Byte reg_value 1525 ); 1526 typedef VOID 1527 (*BFP_BTC_SET_BB_REG)( 1528 IN PVOID pBtcContext, 1529 IN u4Byte RegAddr, 1530 IN u4Byte BitMask, 1531 IN u4Byte Data 1532 ); 1533 typedef u4Byte 1534 (*BFP_BTC_GET_BB_REG)( 1535 IN PVOID pBtcContext, 1536 IN u4Byte RegAddr, 1537 IN u4Byte BitMask 1538 ); 1539 typedef VOID 1540 (*BFP_BTC_SET_RF_REG)( 1541 IN PVOID pBtcContext, 1542 IN enum rf_path eRFPath, 1543 IN u4Byte RegAddr, 1544 IN u4Byte BitMask, 1545 IN u4Byte Data 1546 ); 1547 typedef u4Byte 1548 (*BFP_BTC_GET_RF_REG)( 1549 IN PVOID pBtcContext, 1550 IN enum rf_path eRFPath, 1551 IN u4Byte RegAddr, 1552 IN u4Byte BitMask 1553 ); 1554 typedef VOID 1555 (*BFP_BTC_FILL_H2C)( 1556 IN PVOID pBtcContext, 1557 IN u1Byte elementId, 1558 IN u4Byte cmdLen, 1559 IN pu1Byte pCmdBuffer 1560 ); 1561 1562 typedef BOOLEAN 1563 (*BFP_BTC_GET)( 1564 IN PVOID pBtCoexist, 1565 IN u1Byte getType, 1566 OUT PVOID pOutBuf 1567 ); 1568 1569 typedef BOOLEAN 1570 (*BFP_BTC_SET)( 1571 IN PVOID pBtCoexist, 1572 IN u1Byte setType, 1573 OUT PVOID pInBuf 1574 ); 1575 typedef u2Byte 1576 (*BFP_BTC_SET_BT_REG)( 1577 IN PVOID pBtcContext, 1578 IN u1Byte regType, 1579 IN u4Byte offset, 1580 IN u4Byte value 1581 ); 1582 typedef BOOLEAN 1583 (*BFP_BTC_SET_BT_ANT_DETECTION)( 1584 IN PVOID pBtcContext, 1585 IN u1Byte txTime, 1586 IN u1Byte btChnl 1587 ); 1588 1589 typedef BOOLEAN 1590 (*BFP_BTC_SET_BT_TRX_MASK)( 1591 IN PVOID pBtcContext, 1592 IN u1Byte bt_trx_mask 1593 ); 1594 1595 typedef u4Byte 1596 (*BFP_BTC_GET_BT_REG)( 1597 IN PVOID pBtcContext, 1598 IN u1Byte regType, 1599 IN u4Byte offset 1600 ); 1601 typedef VOID 1602 (*BFP_BTC_DISP_DBG_MSG)( 1603 IN PVOID pBtCoexist, 1604 IN u1Byte dispType 1605 ); 1606 1607 typedef COL_H2C_STATUS 1608 (*BFP_BTC_COEX_H2C_PROCESS)( 1609 IN PVOID pBtCoexist, 1610 IN u1Byte opcode, 1611 IN u1Byte opcode_ver, 1612 IN pu1Byte ph2c_par, 1613 IN u1Byte h2c_par_len 1614 ); 1615 1616 typedef u4Byte 1617 (*BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE)( 1618 IN PVOID pBtcContext 1619 ); 1620 1621 typedef u4Byte 1622 (*BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION)( 1623 IN PVOID pBtcContext 1624 ); 1625 1626 typedef u4Byte 1627 (*BFP_BTC_GET_PHYDM_VERSION)( 1628 IN PVOID pBtcContext 1629 ); 1630 1631 typedef u1Byte 1632 (*BFP_BTC_SET_TIMER) ( 1633 IN PVOID pBtcContext, 1634 IN u4Byte type, 1635 IN u4Byte val 1636 ); 1637 1638 typedef u4Byte 1639 (*BFP_BTC_SET_ATOMIC) ( 1640 IN PVOID pBtcContext, 1641 IN pu4Byte target, 1642 IN u4Byte val 1643 ); 1644 1645 1646 typedef VOID 1647 (*BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD)( 1648 IN PVOID pDM_Odm, 1649 IN u1Byte RA_offset_direction, 1650 IN u1Byte RA_threshold_offset 1651 ); 1652 1653 typedef u4Byte 1654 (*BTC_PHYDM_CMNINFOQUERY)( 1655 IN PVOID pDM_Odm, 1656 IN u1Byte info_type 1657 ); 1658 1659 typedef VOID 1660 (*BTC_REDUCE_WL_TX_POWER)( 1661 IN PVOID pDM_Odm, 1662 IN s1Byte tx_power 1663 ); 1664 1665 typedef VOID 1666 (*BTC_PHYDM_MODIFY_ANTDIV_HWSW)( 1667 IN PVOID pDM_Odm, 1668 IN u1Byte type 1669 ); 1670 1671 typedef u1Byte 1672 (*BFP_BTC_GET_ANT_DET_VAL_FROM_BT)( 1673 1674 IN PVOID pBtcContext 1675 ); 1676 1677 typedef u1Byte 1678 (*BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT)( 1679 IN PVOID pBtcContext 1680 ); 1681 1682 typedef u4Byte 1683 (*BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT)( 1684 IN PVOID pBtcContext, 1685 IN u1Byte scanType 1686 ); 1687 1688 typedef BOOLEAN 1689 (*BFP_BTC_GET_BT_AFH_MAP_FROM_BT)( 1690 IN PVOID pBtcContext, 1691 IN u1Byte mapType, 1692 OUT pu1Byte afhMap 1693 ); 1694 1695 struct btc_bt_info { 1696 boolean bt_disabled; 1697 boolean bt_enable_disable_change; 1698 u8 rssi_adjust_for_agc_table_on; 1699 u8 rssi_adjust_for_1ant_coex_type; 1700 boolean pre_bt_ctrl_agg_buf_size; 1701 boolean bt_ctrl_agg_buf_size; 1702 boolean pre_reject_agg_pkt; 1703 boolean reject_agg_pkt; 1704 boolean increase_scan_dev_num; 1705 boolean bt_tx_rx_mask; 1706 u8 pre_agg_buf_size; 1707 u8 agg_buf_size; 1708 boolean bt_busy; 1709 boolean limited_dig; 1710 u16 bt_hci_ver; 1711 u32 bt_real_fw_ver; 1712 u32 get_bt_fw_ver_cnt; 1713 u32 bt_get_fw_ver; 1714 boolean miracast_plus_bt; 1715 1716 boolean bt_disable_low_pwr; 1717 1718 boolean bt_ctrl_lps; 1719 boolean bt_lps_on; 1720 boolean force_to_roam; /* for 1Ant solution */ 1721 u8 lps_val; 1722 u8 rpwm_val; 1723 u32 ra_mask; 1724 }; 1725 1726 struct btc_stack_info { 1727 boolean profile_notified; 1728 u16 hci_version; /* stack hci version */ 1729 u8 num_of_link; 1730 boolean bt_link_exist; 1731 boolean sco_exist; 1732 boolean acl_exist; 1733 boolean a2dp_exist; 1734 boolean hid_exist; 1735 u8 num_of_hid; 1736 boolean pan_exist; 1737 boolean unknown_acl_exist; 1738 s8 min_bt_rssi; 1739 }; 1740 1741 struct btc_bt_link_info { 1742 boolean bt_link_exist; 1743 boolean bt_hi_pri_link_exist; 1744 boolean sco_exist; 1745 boolean sco_only; 1746 boolean a2dp_exist; 1747 boolean a2dp_only; 1748 boolean hid_exist; 1749 boolean hid_only; 1750 boolean pan_exist; 1751 boolean pan_only; 1752 boolean slave_role; 1753 boolean acl_busy; 1754 }; 1755 1756 #ifdef CONFIG_RF4CE_COEXIST 1757 struct btc_rf4ce_info { 1758 u8 link_state; 1759 }; 1760 #endif 1761 1762 struct btc_statistics { 1763 u32 cnt_bind; 1764 u32 cnt_power_on; 1765 u32 cnt_pre_load_firmware; 1766 u32 cnt_init_hw_config; 1767 u32 cnt_init_coex_dm; 1768 u32 cnt_ips_notify; 1769 u32 cnt_lps_notify; 1770 u32 cnt_scan_notify; 1771 u32 cnt_connect_notify; 1772 u32 cnt_media_status_notify; 1773 u32 cnt_specific_packet_notify; 1774 u32 cnt_bt_info_notify; 1775 u32 cnt_rf_status_notify; 1776 u32 cnt_periodical; 1777 u32 cnt_coex_dm_switch; 1778 u32 cnt_stack_operation_notify; 1779 u32 cnt_dbg_ctrl; 1780 u32 cnt_rate_id_notify; 1781 u32 cnt_halt_notify; 1782 u32 cnt_pnp_notify; 1783 }; 1784 1785 struct btc_coexist { 1786 BOOLEAN bBinded; /*make sure only one adapter can bind the data context*/ 1787 PVOID Adapter; /*default adapter*/ 1788 struct btc_board_info board_info; 1789 struct btc_bt_info bt_info; /*some bt info referenced by non-bt module*/ 1790 struct btc_stack_info stack_info; 1791 struct btc_bt_link_info bt_link_info; 1792 struct btc_wifi_link_info wifi_link_info; 1793 struct btc_wifi_link_info_ext wifi_link_info_ext; 1794 struct btc_coex_dm coex_dm; 1795 struct btc_coex_sta coex_sta; 1796 struct btc_rfe_type rfe_type; 1797 const struct btc_chip_para *chip_para; 1798 u8 wifi_black_bssid[6]; 1799 u8 wifi_bssid[6]; 1800 1801 #ifdef CONFIG_RF4CE_COEXIST 1802 struct btc_rf4ce_info rf4ce_info; 1803 #endif 1804 BTC_CHIP_INTERFACE chip_interface; 1805 PVOID odm_priv; 1806 1807 BOOLEAN initilized; 1808 BOOLEAN stop_coex_dm; 1809 BOOLEAN manual_control; 1810 BOOLEAN bdontenterLPS; 1811 pu1Byte cli_buf; 1812 struct btc_statistics statistics; 1813 u1Byte pwrModeVal[10]; 1814 BOOLEAN dbg_mode; 1815 BOOLEAN auto_report; 1816 u8 chip_type; 1817 BOOLEAN wl_rf_state_off; 1818 1819 /* function pointers */ 1820 /* io related */ 1821 BFP_BTC_R1 btc_read_1byte; 1822 BFP_BTC_W1 btc_write_1byte; 1823 BFP_BTC_W1_BIT_MASK btc_write_1byte_bitmask; 1824 BFP_BTC_R2 btc_read_2byte; 1825 BFP_BTC_W2 btc_write_2byte; 1826 BFP_BTC_R4 btc_read_4byte; 1827 BFP_BTC_W4 btc_write_4byte; 1828 BFP_BTC_LOCAL_REG_W1 btc_write_local_reg_1byte; 1829 BFP_BTC_R_LINDIRECT btc_read_linderct; 1830 BFP_BTC_W_LINDIRECT btc_write_linderct; 1831 BFP_BTC_R_SCBD btc_read_scbd; 1832 BFP_BTC_R_SCBD_32BIT btc_read_scbd_32bit; 1833 BFP_BTC_W_SCBD btc_write_scbd; 1834 BFP_BTC_W_SCBD_32BIT btc_write_scbd_32bit; 1835 1836 /* read/write bb related */ 1837 BFP_BTC_SET_BB_REG btc_set_bb_reg; 1838 BFP_BTC_GET_BB_REG btc_get_bb_reg; 1839 1840 /* read/write rf related */ 1841 BFP_BTC_SET_RF_REG btc_set_rf_reg; 1842 BFP_BTC_GET_RF_REG btc_get_rf_reg; 1843 1844 /* fill h2c related */ 1845 BFP_BTC_FILL_H2C btc_fill_h2c; 1846 /* other */ 1847 BFP_BTC_DISP_DBG_MSG btc_disp_dbg_msg; 1848 /* normal get/set related */ 1849 BFP_BTC_GET btc_get; 1850 BFP_BTC_SET btc_set; 1851 1852 BFP_BTC_GET_BT_REG btc_get_bt_reg; 1853 BFP_BTC_SET_BT_REG btc_set_bt_reg; 1854 1855 BFP_BTC_SET_BT_ANT_DETECTION btc_set_bt_ant_detection; 1856 1857 BFP_BTC_COEX_H2C_PROCESS btc_coex_h2c_process; 1858 BFP_BTC_SET_BT_TRX_MASK btc_set_bt_trx_mask; 1859 BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE btc_get_bt_coex_supported_feature; 1860 BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION btc_get_bt_coex_supported_version; 1861 BFP_BTC_GET_PHYDM_VERSION btc_get_bt_phydm_version; 1862 BFP_BTC_SET_TIMER btc_set_timer; 1863 BFP_BTC_SET_ATOMIC btc_set_atomic; 1864 BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD btc_phydm_modify_RA_PCR_threshold; 1865 BTC_PHYDM_CMNINFOQUERY btc_phydm_query_PHY_counter; 1866 BTC_REDUCE_WL_TX_POWER btc_reduce_wl_tx_power; 1867 BTC_PHYDM_MODIFY_ANTDIV_HWSW btc_phydm_modify_antdiv_hwsw; 1868 BFP_BTC_GET_ANT_DET_VAL_FROM_BT btc_get_ant_det_val_from_bt; 1869 BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT btc_get_ble_scan_type_from_bt; 1870 BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT btc_get_ble_scan_para_from_bt; 1871 BFP_BTC_GET_BT_AFH_MAP_FROM_BT btc_get_bt_afh_map_from_bt; 1872 1873 union { 1874 #ifdef CONFIG_RTL8822B 1875 struct coex_dm_8822b_1ant coex_dm_8822b_1ant; 1876 struct coex_dm_8822b_2ant coex_dm_8822b_2ant; 1877 #endif /* 8822B */ 1878 #ifdef CONFIG_RTL8821C 1879 struct coex_dm_8821c_1ant coex_dm_8821c_1ant; 1880 struct coex_dm_8821c_2ant coex_dm_8821c_2ant; 1881 #endif /* 8821C */ 1882 #ifdef CONFIG_RTL8723D 1883 struct coex_dm_8723d_1ant coex_dm_8723d_1ant; 1884 struct coex_dm_8723d_2ant coex_dm_8723d_2ant; 1885 #endif /* 8723D */ 1886 }; 1887 1888 union { 1889 #ifdef CONFIG_RTL8822B 1890 struct coex_sta_8822b_1ant coex_sta_8822b_1ant; 1891 struct coex_sta_8822b_2ant coex_sta_8822b_2ant; 1892 #endif /* 8822B */ 1893 #ifdef CONFIG_RTL8821C 1894 struct coex_sta_8821c_1ant coex_sta_8821c_1ant; 1895 struct coex_sta_8821c_2ant coex_sta_8821c_2ant; 1896 #endif /* 8821C */ 1897 #ifdef CONFIG_RTL8723D 1898 struct coex_sta_8723d_1ant coex_sta_8723d_1ant; 1899 struct coex_sta_8723d_2ant coex_sta_8723d_2ant; 1900 #endif /* 8723D */ 1901 }; 1902 1903 union { 1904 #ifdef CONFIG_RTL8822B 1905 struct rfe_type_8822b_1ant rfe_type_8822b_1ant; 1906 struct rfe_type_8822b_2ant rfe_type_8822b_2ant; 1907 #endif /* 8822B */ 1908 #ifdef CONFIG_RTL8821C 1909 struct rfe_type_8821c_1ant rfe_type_8821c_1ant; 1910 struct rfe_type_8821c_2ant rfe_type_8821c_2ant; 1911 #endif /* 8821C */ 1912 }; 1913 1914 union { 1915 #ifdef CONFIG_RTL8822B 1916 struct wifi_link_info_8822b_1ant wifi_link_info_8822b_1ant; 1917 struct wifi_link_info_8822b_2ant wifi_link_info_8822b_2ant; 1918 #endif /* 8822B */ 1919 #ifdef CONFIG_RTL8821C 1920 struct wifi_link_info_8821c_1ant wifi_link_info_8821c_1ant; 1921 struct wifi_link_info_8821c_2ant wifi_link_info_8821c_2ant; 1922 #endif /* 8821C */ 1923 }; 1924 1925 }; 1926 typedef struct btc_coexist *PBTC_COEXIST; 1927 1928 extern struct btc_coexist GLBtCoexist; 1929 1930 typedef void 1931 (*BFP_BTC_CHIP_SETUP)( 1932 IN PBTC_COEXIST pBtCoexist, 1933 IN u1Byte setType 1934 ); 1935 1936 struct btc_chip_para { 1937 const char *chip_name; 1938 u32 para_ver_date; 1939 u32 para_ver; 1940 u32 bt_desired_ver; 1941 u32 wl_desired_ver; 1942 boolean scbd_support; 1943 u32 scbd_reg; 1944 u8 scbd_bit_num; 1945 boolean mailbox_support; 1946 boolean lte_indirect_access; 1947 boolean new_scbd10_def; /* TRUE: 1:fix 2M(8822c) */ 1948 u8 indirect_type; /* 0:17xx, 1:7cx */ 1949 u8 pstdma_type; /* 0: LPSoff, 1:LPSon */ 1950 u8 bt_rssi_type; 1951 u8 ant_isolation; 1952 u8 rssi_tolerance; 1953 u8 rx_path_num; 1954 u8 wl_rssi_step_num; 1955 const u8 *wl_rssi_step; 1956 u8 bt_rssi_step_num; 1957 const u8 *bt_rssi_step; 1958 u8 table_sant_num; 1959 const struct btc_coex_table_para *table_sant; 1960 u8 table_nsant_num; 1961 const struct btc_coex_table_para *table_nsant; 1962 u8 tdma_sant_num; 1963 const struct btc_tdma_para *tdma_sant; 1964 u8 tdma_nsant_num; 1965 const struct btc_tdma_para *tdma_nsant; 1966 u8 wl_rf_para_tx_num; 1967 const struct btc_rf_para *wl_rf_para_tx; 1968 const struct btc_rf_para *wl_rf_para_rx; 1969 u8 bt_afh_span_bw20; 1970 u8 bt_afh_span_bw40; 1971 u8 afh_5g_num; 1972 const struct btc_5g_afh_map *afh_5g; 1973 BFP_BTC_CHIP_SETUP chip_setup; 1974 }; 1975 1976 BOOLEAN 1977 EXhalbtcoutsrc_InitlizeVariables( 1978 IN PVOID Adapter 1979 ); 1980 VOID 1981 EXhalbtcoutsrc_PowerOnSetting( 1982 IN PBTC_COEXIST pBtCoexist 1983 ); 1984 VOID 1985 EXhalbtcoutsrc_PreLoadFirmware( 1986 IN PBTC_COEXIST pBtCoexist 1987 ); 1988 VOID 1989 EXhalbtcoutsrc_InitHwConfig( 1990 IN PBTC_COEXIST pBtCoexist, 1991 IN BOOLEAN bWifiOnly 1992 ); 1993 VOID 1994 EXhalbtcoutsrc_InitCoexDm( 1995 IN PBTC_COEXIST pBtCoexist 1996 ); 1997 VOID 1998 EXhalbtcoutsrc_IpsNotify( 1999 IN PBTC_COEXIST pBtCoexist, 2000 IN u1Byte type 2001 ); 2002 VOID 2003 EXhalbtcoutsrc_LpsNotify( 2004 IN PBTC_COEXIST pBtCoexist, 2005 IN u1Byte type 2006 ); 2007 VOID 2008 EXhalbtcoutsrc_ScanNotify( 2009 IN PBTC_COEXIST pBtCoexist, 2010 IN u1Byte type 2011 ); 2012 VOID 2013 EXhalbtcoutsrc_SetAntennaPathNotify( 2014 IN PBTC_COEXIST pBtCoexist, 2015 IN u1Byte type 2016 ); 2017 VOID 2018 EXhalbtcoutsrc_ConnectNotify( 2019 IN PBTC_COEXIST pBtCoexist, 2020 IN u1Byte action 2021 ); 2022 VOID 2023 EXhalbtcoutsrc_MediaStatusNotify( 2024 IN PBTC_COEXIST pBtCoexist, 2025 IN RT_MEDIA_STATUS mediaStatus 2026 ); 2027 VOID 2028 EXhalbtcoutsrc_SpecificPacketNotify( 2029 IN PBTC_COEXIST pBtCoexist, 2030 IN u1Byte pktType 2031 ); 2032 VOID 2033 EXhalbtcoutsrc_BtInfoNotify( 2034 IN PBTC_COEXIST pBtCoexist, 2035 IN pu1Byte tmpBuf, 2036 IN u1Byte length 2037 ); 2038 VOID 2039 EXhalbtcoutsrc_RfStatusNotify( 2040 IN PBTC_COEXIST pBtCoexist, 2041 IN u1Byte type 2042 ); 2043 u4Byte 2044 EXhalbtcoutsrc_CoexTimerCheck( 2045 IN PBTC_COEXIST pBtCoexist 2046 ); 2047 u4Byte 2048 EXhalbtcoutsrc_WLStatusCheck( 2049 IN PBTC_COEXIST pBtCoexist 2050 ); 2051 VOID 2052 EXhalbtcoutsrc_WlFwDbgInfoNotify( 2053 IN PBTC_COEXIST pBtCoexist, 2054 IN pu1Byte tmpBuf, 2055 IN u1Byte length 2056 ); 2057 VOID 2058 EXhalbtcoutsrc_rx_rate_change_notify( 2059 IN PBTC_COEXIST pBtCoexist, 2060 IN BOOLEAN is_data_frame, 2061 IN u1Byte btc_rate_id 2062 ); 2063 VOID 2064 EXhalbtcoutsrc_StackOperationNotify( 2065 IN PBTC_COEXIST pBtCoexist, 2066 IN u1Byte type 2067 ); 2068 VOID 2069 EXhalbtcoutsrc_HaltNotify( 2070 IN PBTC_COEXIST pBtCoexist 2071 ); 2072 VOID 2073 EXhalbtcoutsrc_PnpNotify( 2074 IN PBTC_COEXIST pBtCoexist, 2075 IN u1Byte pnpState 2076 ); 2077 VOID 2078 EXhalbtcoutsrc_TimerNotify( 2079 IN PBTC_COEXIST pBtCoexist, 2080 IN u4Byte timer_type 2081 ); 2082 VOID 2083 EXhalbtcoutsrc_WLStatusChangeNotify( 2084 IN PBTC_COEXIST pBtCoexist, 2085 IN u4Byte change_type 2086 ); 2087 VOID 2088 EXhalbtcoutsrc_WL_RFK_Notify( 2089 IN PBTC_COEXIST pBtCoexist, 2090 IN u1Byte path, 2091 IN u1Byte type, 2092 IN u1Byte state 2093 ); 2094 VOID 2095 EXhalbtcoutsrc_CoexDmSwitch( 2096 IN PBTC_COEXIST pBtCoexist 2097 ); 2098 VOID 2099 EXhalbtcoutsrc_Periodical( 2100 IN PBTC_COEXIST pBtCoexist 2101 ); 2102 VOID 2103 EXhalbtcoutsrc_DbgControl( 2104 IN PBTC_COEXIST pBtCoexist, 2105 IN u1Byte opCode, 2106 IN u1Byte opLen, 2107 IN pu1Byte pData 2108 ); 2109 VOID 2110 EXhalbtcoutsrc_AntennaDetection( 2111 IN PBTC_COEXIST pBtCoexist, 2112 IN u4Byte centFreq, 2113 IN u4Byte offset, 2114 IN u4Byte span, 2115 IN u4Byte seconds 2116 ); 2117 VOID 2118 EXhalbtcoutsrc_StackUpdateProfileInfo( 2119 VOID 2120 ); 2121 VOID 2122 EXhalbtcoutsrc_SetHciVersion( 2123 IN u2Byte hciVersion 2124 ); 2125 VOID 2126 EXhalbtcoutsrc_SetBtPatchVersion( 2127 IN u2Byte btHciVersion, 2128 IN u2Byte btPatchVersion 2129 ); 2130 VOID 2131 EXhalbtcoutsrc_UpdateMinBtRssi( 2132 IN s1Byte btRssi 2133 ); 2134 #if 0 2135 VOID 2136 EXhalbtcoutsrc_SetBtExist( 2137 IN BOOLEAN bBtExist 2138 ); 2139 #endif 2140 VOID 2141 EXhalbtcoutsrc_SetChipType( 2142 IN u1Byte chipType 2143 ); 2144 VOID 2145 EXhalbtcoutsrc_SetAntNum( 2146 IN u1Byte type, 2147 IN u1Byte antNum 2148 ); 2149 VOID 2150 EXhalbtcoutsrc_SetSingleAntPath( 2151 IN u1Byte singleAntPath 2152 ); 2153 VOID 2154 EXhalbtcoutsrc_DisplayBtCoexInfo( 2155 IN PBTC_COEXIST pBtCoexist 2156 ); 2157 VOID 2158 EXhalbtcoutsrc_DisplayAntDetection( 2159 IN PBTC_COEXIST pBtCoexist 2160 ); 2161 2162 #define MASKBYTE0 0xff 2163 #define MASKBYTE1 0xff00 2164 #define MASKBYTE2 0xff0000 2165 #define MASKBYTE3 0xff000000 2166 #define MASKHWORD 0xffff0000 2167 #define MASKLWORD 0x0000ffff 2168 #define MASKDWORD 0xffffffff 2169 #define MASK12BITS 0xfff 2170 #define MASKH4BITS 0xf0000000 2171 #define MASKOFDM_D 0xffc00000 2172 #define MASKCCK 0x3f3f3f3f 2173 2174 #endif 2175