1 /* 2 * Copyright (c) 2021-2022 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 9 #ifndef HPM_DMAMUX_H 10 #define HPM_DMAMUX_H 11 12 typedef struct { 13 __RW uint32_t MUXCFG[16]; /* 0x0 - 0x3C: HDMA MUX0 Configuration */ 14 } DMAMUX_Type; 15 16 17 /* Bitfield definition for register array: MUXCFG */ 18 /* 19 * ENABLE (RW) 20 * 21 * DMA Mux Channel Enable 22 * Enables the channel for DMA Mux. The DMA has separate channel enables/disables, which should be 23 * used to disable or reconfigure a DMA channel. 24 * 0b - DMA Mux channel is disabled 25 * 1b - DMA Mux channel is enabled 26 */ 27 #define DMAMUX_MUXCFG_ENABLE_MASK (0x80000000UL) 28 #define DMAMUX_MUXCFG_ENABLE_SHIFT (31U) 29 #define DMAMUX_MUXCFG_ENABLE_SET(x) (((uint32_t)(x) << DMAMUX_MUXCFG_ENABLE_SHIFT) & DMAMUX_MUXCFG_ENABLE_MASK) 30 #define DMAMUX_MUXCFG_ENABLE_GET(x) (((uint32_t)(x) & DMAMUX_MUXCFG_ENABLE_MASK) >> DMAMUX_MUXCFG_ENABLE_SHIFT) 31 32 /* 33 * SOURCE (RW) 34 * 35 * DMA Channel Source 36 * Specifies which DMA source, if any, is routed to a particular DMA channel. See the "DMA MUX Mapping" 37 */ 38 #define DMAMUX_MUXCFG_SOURCE_MASK (0x7FU) 39 #define DMAMUX_MUXCFG_SOURCE_SHIFT (0U) 40 #define DMAMUX_MUXCFG_SOURCE_SET(x) (((uint32_t)(x) << DMAMUX_MUXCFG_SOURCE_SHIFT) & DMAMUX_MUXCFG_SOURCE_MASK) 41 #define DMAMUX_MUXCFG_SOURCE_GET(x) (((uint32_t)(x) & DMAMUX_MUXCFG_SOURCE_MASK) >> DMAMUX_MUXCFG_SOURCE_SHIFT) 42 43 44 45 /* MUXCFG register group index macro definition */ 46 #define DMAMUX_MUXCFG_HDMA_MUX0 (0UL) 47 #define DMAMUX_MUXCFG_HDMA_MUX1 (1UL) 48 #define DMAMUX_MUXCFG_HDMA_MUX2 (2UL) 49 #define DMAMUX_MUXCFG_HDMA_MUX3 (3UL) 50 #define DMAMUX_MUXCFG_HDMA_MUX4 (4UL) 51 #define DMAMUX_MUXCFG_HDMA_MUX5 (5UL) 52 #define DMAMUX_MUXCFG_HDMA_MUX6 (6UL) 53 #define DMAMUX_MUXCFG_HDMA_MUX7 (7UL) 54 #define DMAMUX_MUXCFG_XDMA_MUX0 (8UL) 55 #define DMAMUX_MUXCFG_XDMA_MUX1 (9UL) 56 #define DMAMUX_MUXCFG_XDMA_MUX2 (10UL) 57 #define DMAMUX_MUXCFG_XDMA_MUX3 (11UL) 58 #define DMAMUX_MUXCFG_XDMA_MUX4 (12UL) 59 #define DMAMUX_MUXCFG_XDMA_MUX5 (13UL) 60 #define DMAMUX_MUXCFG_XDMA_MUX6 (14UL) 61 #define DMAMUX_MUXCFG_XDMA_MUX7 (15UL) 62 63 64 #endif /* HPM_DMAMUX_H */