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Searched defs:Disp (Results 1 – 25 of 38) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp187 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding() local
197 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding() local
207 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding() local
218 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr20Encoding() local
230 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDLAddr12Len4Encoding() local
241 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDLAddr12Len8Encoding() local
252 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDRAddr12Encoding() local
263 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDVAddr12Encoding() local
DSystemZInstPrinter.cpp26 void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp, in printAddress()
202 uint64_t Disp = MI->getOperand(OpNum + 1).getImm(); in printBDLAddrOperand() local
213 uint64_t Disp = MI->getOperand(OpNum + 1).getImm(); in printBDRAddrOperand() local
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DLowLevel.cpp137 #define TestRegAbsoluteAddr(Inst, Dst, Disp, OpType, ByteCountUntyped, ...) \ in TEST_F() argument
151 #define TestRegAddrBase(Inst, Dst, Base, Disp, OpType, ByteCountUntyped, ...) \ in TEST_F() argument
166 #define TestRegAddrScaledIndex(Inst, Dst, Index, Scale, Disp, OpType, \ in TEST_F() argument
182 #define TestRegAddrBaseScaledIndex(Inst, Dst, Base, Index, Scale, Disp, \ in TEST_F() argument
199 #define TestAddrBaseScaledIndexImm(Inst, Base, Index, Scale, Disp, Imm, \ in TEST_F() argument
217 #define TestAddrBaseScaledIndexReg(Inst, Base, Index, Scale, Disp, Src, \ in TEST_F() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp60 int64_t Disp; member
214 bool selectBDXAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp, in selectBDXAddr12Only()
220 bool selectBDXAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp, in selectBDXAddr12Pair()
226 bool selectDynAlloc12Only(SDValue Addr, SDValue &Base, SDValue &Disp, in selectDynAlloc12Only()
232 bool selectBDXAddr20Only(SDValue Addr, SDValue &Base, SDValue &Disp, in selectBDXAddr20Only()
238 bool selectBDXAddr20Only128(SDValue Addr, SDValue &Base, SDValue &Disp, in selectBDXAddr20Only128()
244 bool selectBDXAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp, in selectBDXAddr20Pair()
250 bool selectLAAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp, in selectLAAddr12Pair()
256 bool selectLAAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp, in selectLAAddr20Pair()
517 static bool shouldUseLA(SDNode *Base, int64_t Disp, SDNode *Index) { in shouldUseLA()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DLowLevel.cpp183 #define TestRegAbsoluteAddr(Inst, Dst, Disp, OpType, ByteCountUntyped, ...) \ in TEST_F() argument
196 #define TestRegAddrBase(Inst, Dst, Base, Disp, OpType, ByteCountUntyped, ...) \ in TEST_F() argument
210 #define TestRegAddrScaledIndex(Inst, Dst, Index, Scale, Disp, OpType, \ in TEST_F() argument
226 #define TestRegAddrBaseScaledIndex(Inst, Dst, Base, Index, Scale, Disp, \ in TEST_F() argument
242 #define TestAddrBaseScaledIndexImm(Inst, Base, Index, Scale, Disp, Imm, \ in TEST_F() argument
259 #define TestAddrBaseScaledIndexReg(Inst, Base, Index, Scale, Disp, Src, \ in TEST_F() argument
DGPRArith.cpp112 #define TestLeaBaseDisp(Base, BaseValue, Disp, Dst) \ in TEST_F() argument
129 #define TestLeaIndex32bitDisp(Index, IndexValue, Disp, Dst0, Dst1, Dst2, Dst3) \ in TEST_F() argument
162 #define TestLeaBaseIndexDisp(Base, BaseValue, Index, IndexValue, Disp, Dst0, \ in TEST_F() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp200 uint64_t Disp = Imm & 0xFFFF; in decodeMemRIOperands() local
235 uint64_t Disp = Imm & 0x3FFF; in decodeMemRIXOperands() local
256 uint64_t Disp = Imm & 0xFFF; in decodeMemRIX16Operands() local
271 uint64_t Disp = Imm & 0x1F; in decodeSPE8Operands() local
286 uint64_t Disp = Imm & 0x1F; in decodeSPE4Operands() local
301 uint64_t Disp = Imm & 0x1F; in decodeSPE2Operands() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/Disassembler/
DSystemZDisassembler.cpp294 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
304 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); in decodeBDAddr20Operand() local
315 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
327 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); in decodeBDXAddr20Operand() local
339 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len4Operand() local
351 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len8Operand() local
363 uint64_t Disp = Field & 0xfff; in decodeBDRAddr12Operand() local
375 uint64_t Disp = Field & 0xfff; in decodeBDVAddr12Operand() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelDAGToDAG.cpp65 SDValue &Disp) { in SelectAddr()
225 SDValue Base, Disp; in SelectInlineAsmMemoryOperand() local
263 SDValue Base, Disp; in SelectInlineAsmMemoryOperand() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp47 int16_t Disp = 0; member
245 SDValue &Base, SDValue &Disp) { in SelectAddr()
DMSP430AsmPrinter.cpp110 const MachineOperand &Disp = MI->getOperand(OpNum+1); in printSrcMemOperand() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/MCTargetDesc/
DMSP430InstPrinter.cpp71 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
Draw_ostream.cpp520 sys::fs::CreationDisposition Disp, sys::fs::FileAccess Access, in getFD()
552 sys::fs::CreationDisposition Disp) in raw_fd_ostream()
566 sys::fs::CreationDisposition Disp, in raw_fd_ostream()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp67 int32_t Disp; member
252 SDValue &Index, SDValue &Disp, in tryFoldLoad()
271 SDValue &Index, SDValue &Disp, in getAddressOperands()
1996 uint64_t Disp = (uint64_t)AddVal->getSExtValue() << Val; in matchAddressRecursively() local
2062 uint64_t Disp = AddVal->getSExtValue() * CN->getZExtValue(); in matchAddressRecursively() local
2285 SDValue &Disp, SDValue &Segment) { in selectVectorAddr()
2319 SDValue &Disp, SDValue &Segment) { in selectAddr()
2377 SDValue &Disp, SDValue &Segment, in selectScalarSSELoad()
2460 SDValue &Disp, SDValue &Segment) { in selectLEA64_32Addr()
2497 SDValue &Index, SDValue &Disp, in selectLEAAddr()
[all …]
DX86OptimizeLEAs.cpp85 const MachineOperand *Disp) in MemOpKey()
110 const MachineOperand *Disp; member in __anon487a58810111::MemOpKey
DX86InstrBuilder.h55 int Disp; member
DX86AvoidStoreForwardingBlocks.cpp314 MachineOperand &Disp = getDispOperand(MI); in isRelevantAddressingMode() local
667 for (auto Disp : DispSizeStack) in removeRedundantBlockingStores() local
DX86FixupLEAs.cpp360 const MachineOperand &Disp = MI.getOperand(1 + X86::AddrDisp); in optTwoAddrLEA() local
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceAssemblerX8632.h175 void SetBase(GPRRegister Base, int32_t Disp, AssemblerFixup *Fixup) { in SetBase()
195 void SetIndex(GPRRegister Index, ScaleFactor Scale, int32_t Disp, in SetIndex()
206 int32_t Disp, AssemblerFixup *Fixup) { in SetBaseIndex()
DIceAssemblerX8664.h182 void SetBase(GPRRegister Base, int32_t Disp, AssemblerFixup *Fixup) { in SetBase()
203 void SetIndex(GPRRegister Index, ScaleFactor Scale, int32_t Disp, in SetIndex()
214 int32_t Disp, AssemblerFixup *Fixup) { in SetBaseIndex()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/AsmParser/
DSystemZAsmParser.cpp119 const MCExpr *Disp; member
185 const MCExpr *Disp, unsigned Index, const MCExpr *LengthImm, in createMem()
837 const MCExpr *&Disp, in parseAddress()
902 const MCExpr *Disp; in parseAddress() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1265 const MCExpr *Disp = MCConstantExpr::create(0, getContext()); in DefaultMemSIOperand() local
1274 const MCExpr *Disp = MCConstantExpr::create(0, getContext()); in DefaultMemDIOperand() local
1409 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForInlineAsm()
1946 const MCExpr *Disp = SM.getSym(); in ParseIntelOperand() local
2210 const MCExpr *&Disp, in ParseMemOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp188 const MCOperand &Disp = MI.getOperand(Op + X86::AddrDisp); in is16BitMemOperand() local
374 const MCOperand &Disp = MI.getOperand(Op + X86::AddrDisp); in emitMemModRMByte() local
DX86MCTargetDesc.cpp534 const MCOperand &Disp = Inst.getOperand(MemOpStart + X86::AddrDisp); in evaluateMemoryOperandAddress() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCOptAddrMode.cpp171 int64_t Disp) { in isLoadStoreThatCanHandleDisplacement()

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