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1 /*
2  * Copyright (c) 2022 ASR Microelectronics (Shanghai) Co., Ltd. All rights reserved.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef __PSRAM_PSRAM_H
17 #define __PSRAM_PSRAM_H
18 
19 #ifdef PSRAM_CHIP_APS1604_SQR
20 #define PSRAM_FLASH_SIZE                    0x200000
21 #elif PSRAM_CHIP_LY68L6400
22 #define PSRAM_FLASH_SIZE                    0x800000
23 #else
24 #error No any psram chip defined!!!
25 #endif
26 #define PSRAM_AMBA_BASE          0x30000000 // AHB base addr
27 #define PSRAM_FLASH_A1_BASE      PSRAM_AMBA_BASE
28 #define PSRAM_FLASH_A1_TOP       (PSRAM_FLASH_A1_BASE + PSRAM_FLASH_SIZE)
29 #define PSRAM_FLASH_A2_BASE      PSRAM_FLASH_A1_TOP
30 #define PSRAM_FLASH_A2_TOP       PSRAM_FLASH_A1_TOP
31 #define PSRAM_FLASH_B1_BASE      PSRAM_FLASH_A1_TOP
32 #define PSRAM_FLASH_B1_TOP       PSRAM_FLASH_A1_TOP
33 #define PSRAM_FLASH_B2_BASE      PSRAM_FLASH_A1_TOP
34 #define PSRAM_FLASH_B2_TOP       PSRAM_FLASH_A1_TOP
35 
36 /**
37  *APS1604-SQR
38  */
39 #define FLASH_CMD_READ_ID           0x9F
40 #define FLASH_CMD_READ              0x03
41 #define FLASH_CMD_FAST_READ         0x0B
42 #define FLASH_CMD_FAST_READ_QUAD    0xEB
43 #define FLASH_CMD_WRITE             0x02
44 #define FLASH_CMD_QUAD_WRITE        0x38
45 #define FLASH_CMD_WRAPPED_READ      0x8B
46 #define FLASH_CMD_WRAPPED_WRITE     0x82
47 #define FLASH_CMD_MODE_REG_READ     0xB5
48 #define FLASH_CMD_MODE_REG_WRITE    0xB1
49 #define FLASH_CMD_ENTER_QUAD_MODE   0x35
50 #define FLASH_CMD_EXIT_QUAD_MODE    0xF5
51 #define FLASH_CMD_RESET_ENABLE      0x66
52 #define FLASH_CMD_RESET             0x99
53 #define FLASH_CMD_BURST_LENGTH_TOGGLE   0xC0
54 
55 typedef enum {
56     PSRAM_CHANNEL_4_9,
57     PSRAM_CHANNEL_16_21
58 } duet_psram_channel;
59 typedef enum {
60     PSRAM_MODE_SPI,
61     PSRAM_MODE_QSPI
62 } duet_psram_mode;
63 /**
64  * psram set the channel used
65  * @note  this function must be called before psram config
66  * @param[in]  channel  The sets of gpio pads used for psram
67  * @return  0 : On success, EIO : If an error occurred with any step
68  */
69 int psram_set_channel(duet_psram_channel channel);
70 
71 /**
72  * psram config
73  * @note  this function must be called before use psram address space
74  * @param[in]  mode  The psram config mode
75  * @return  0 : On success, EIO : If an error occurred with any step
76  */
77 int psram_config(duet_psram_mode mode);
78 
79 #endif // __PSRAM_PSRAM_H
80