1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #ifndef __HAL_COMMON_H__
16 #define __HAL_COMMON_H__
17
18 #include "HalVerDef.h"
19 #include "hal_pg.h"
20 #include "hal_phy.h"
21 #include "hal_phy_reg.h"
22 #include "hal_com_reg.h"
23 #include "hal_com_phycfg.h"
24 #include "../hal/hal_com_c2h.h"
25
26 /*------------------------------ Tx Desc definition Macro ------------------------*/
27 /* #pragma mark -- Tx Desc related definition. -- */
28 /* ----------------------------------------------------------------------------
29 * -----------------------------------------------------------
30 * Rate
31 * -----------------------------------------------------------
32 * CCK Rates, TxHT = 0 */
33 #define DESC_RATE1M 0x00
34 #define DESC_RATE2M 0x01
35 #define DESC_RATE5_5M 0x02
36 #define DESC_RATE11M 0x03
37
38 /* OFDM Rates, TxHT = 0 */
39 #define DESC_RATE6M 0x04
40 #define DESC_RATE9M 0x05
41 #define DESC_RATE12M 0x06
42 #define DESC_RATE18M 0x07
43 #define DESC_RATE24M 0x08
44 #define DESC_RATE36M 0x09
45 #define DESC_RATE48M 0x0a
46 #define DESC_RATE54M 0x0b
47
48 /* MCS Rates, TxHT = 1 */
49 #define DESC_RATEMCS0 0x0c
50 #define DESC_RATEMCS1 0x0d
51 #define DESC_RATEMCS2 0x0e
52 #define DESC_RATEMCS3 0x0f
53 #define DESC_RATEMCS4 0x10
54 #define DESC_RATEMCS5 0x11
55 #define DESC_RATEMCS6 0x12
56 #define DESC_RATEMCS7 0x13
57 #define DESC_RATEMCS8 0x14
58 #define DESC_RATEMCS9 0x15
59 #define DESC_RATEMCS10 0x16
60 #define DESC_RATEMCS11 0x17
61 #define DESC_RATEMCS12 0x18
62 #define DESC_RATEMCS13 0x19
63 #define DESC_RATEMCS14 0x1a
64 #define DESC_RATEMCS15 0x1b
65 #define DESC_RATEMCS16 0x1C
66 #define DESC_RATEMCS17 0x1D
67 #define DESC_RATEMCS18 0x1E
68 #define DESC_RATEMCS19 0x1F
69 #define DESC_RATEMCS20 0x20
70 #define DESC_RATEMCS21 0x21
71 #define DESC_RATEMCS22 0x22
72 #define DESC_RATEMCS23 0x23
73 #define DESC_RATEMCS24 0x24
74 #define DESC_RATEMCS25 0x25
75 #define DESC_RATEMCS26 0x26
76 #define DESC_RATEMCS27 0x27
77 #define DESC_RATEMCS28 0x28
78 #define DESC_RATEMCS29 0x29
79 #define DESC_RATEMCS30 0x2A
80 #define DESC_RATEMCS31 0x2B
81 #define DESC_RATEVHTSS1MCS0 0x2C
82 #define DESC_RATEVHTSS1MCS1 0x2D
83 #define DESC_RATEVHTSS1MCS2 0x2E
84 #define DESC_RATEVHTSS1MCS3 0x2F
85 #define DESC_RATEVHTSS1MCS4 0x30
86 #define DESC_RATEVHTSS1MCS5 0x31
87 #define DESC_RATEVHTSS1MCS6 0x32
88 #define DESC_RATEVHTSS1MCS7 0x33
89 #define DESC_RATEVHTSS1MCS8 0x34
90 #define DESC_RATEVHTSS1MCS9 0x35
91 #define DESC_RATEVHTSS2MCS0 0x36
92 #define DESC_RATEVHTSS2MCS1 0x37
93 #define DESC_RATEVHTSS2MCS2 0x38
94 #define DESC_RATEVHTSS2MCS3 0x39
95 #define DESC_RATEVHTSS2MCS4 0x3A
96 #define DESC_RATEVHTSS2MCS5 0x3B
97 #define DESC_RATEVHTSS2MCS6 0x3C
98 #define DESC_RATEVHTSS2MCS7 0x3D
99 #define DESC_RATEVHTSS2MCS8 0x3E
100 #define DESC_RATEVHTSS2MCS9 0x3F
101 #define DESC_RATEVHTSS3MCS0 0x40
102 #define DESC_RATEVHTSS3MCS1 0x41
103 #define DESC_RATEVHTSS3MCS2 0x42
104 #define DESC_RATEVHTSS3MCS3 0x43
105 #define DESC_RATEVHTSS3MCS4 0x44
106 #define DESC_RATEVHTSS3MCS5 0x45
107 #define DESC_RATEVHTSS3MCS6 0x46
108 #define DESC_RATEVHTSS3MCS7 0x47
109 #define DESC_RATEVHTSS3MCS8 0x48
110 #define DESC_RATEVHTSS3MCS9 0x49
111 #define DESC_RATEVHTSS4MCS0 0x4A
112 #define DESC_RATEVHTSS4MCS1 0x4B
113 #define DESC_RATEVHTSS4MCS2 0x4C
114 #define DESC_RATEVHTSS4MCS3 0x4D
115 #define DESC_RATEVHTSS4MCS4 0x4E
116 #define DESC_RATEVHTSS4MCS5 0x4F
117 #define DESC_RATEVHTSS4MCS6 0x50
118 #define DESC_RATEVHTSS4MCS7 0x51
119 #define DESC_RATEVHTSS4MCS8 0x52
120 #define DESC_RATEVHTSS4MCS9 0x53
121 #define DESC_RATE_NUM 0x54
122
123 #define IS_CCK_HRATE(_rate) ((_rate) <= DESC_RATE11M)
124 #define IS_OFDM_HRATE(_rate) ((_rate) >= DESC_RATE6M && (_rate) <= DESC_RATE54M)
125 #define IS_LEGACY_HRATE(_rate) ((_rate) <= DESC_RATE54M)
126 #define IS_HT_HRATE(_rate) ((_rate) >= DESC_RATEMCS0 && (_rate) <= DESC_RATEMCS31)
127 #define IS_VHT_HRATE(_rate) ((_rate) >= DESC_RATEVHTSS1MCS0 && (_rate) <= DESC_RATEVHTSS4MCS9)
128
129 #define IS_HT1SS_HRATE(_rate) ((_rate) >= DESC_RATEMCS0 && (_rate) <= DESC_RATEMCS7)
130 #define IS_HT2SS_HRATE(_rate) ((_rate) >= DESC_RATEMCS8 && (_rate) <= DESC_RATEMCS15)
131 #define IS_HT3SS_HRATE(_rate) ((_rate) >= DESC_RATEMCS16 && (_rate) <= DESC_RATEMCS23)
132 #define IS_HT4SS_HRATE(_rate) ((_rate) >= DESC_RATEMCS24 && (_rate) <= DESC_RATEMCS31)
133
134 #define IS_VHT1SS_HRATE(_rate) ((_rate) >= DESC_RATEVHTSS1MCS0 && (_rate) <= DESC_RATEVHTSS1MCS9)
135 #define IS_VHT2SS_HRATE(_rate) ((_rate) >= DESC_RATEVHTSS2MCS0 && (_rate) <= DESC_RATEVHTSS2MCS9)
136 #define IS_VHT3SS_HRATE(_rate) ((_rate) >= DESC_RATEVHTSS3MCS0 && (_rate) <= DESC_RATEVHTSS3MCS9)
137 #define IS_VHT4SS_HRATE(_rate) ((_rate) >= DESC_RATEVHTSS4MCS0 && (_rate) <= DESC_RATEVHTSS4MCS9)
138
139 #define IS_1SS_HRATE(_rate) (IS_CCK_HRATE((_rate)) || IS_OFDM_HRATE((_rate)) || IS_HT1SS_HRATE((_rate)) || IS_VHT1SS_HRATE((_rate)))
140 #define IS_2SS_HRATE(_rate) (IS_HT2SS_HRATE((_rate)) || IS_VHT2SS_HRATE((_rate)))
141 #define IS_3SS_HRATE(_rate) (IS_HT3SS_HRATE((_rate)) || IS_VHT3SS_HRATE((_rate)))
142 #define IS_4SS_HRATE(_rate) (IS_HT4SS_HRATE((_rate)) || IS_VHT4SS_HRATE((_rate)))
143
144 #define HRARE_SS_NUM(_rate) (IS_1SS_HRATE(_rate) ? 1 : (IS_2SS_HRATE(_rate) ? 2 : (IS_3SS_HRATE(_rate) ? 3 : (IS_4SS_HRATE(_rate) ? 4 : 0))))
145
146 extern const char * const _HDATA_RATE[];
147 #define HDATA_RATE(rate) ((rate) >= DESC_RATE_NUM ? _HDATA_RATE[DESC_RATE_NUM] : _HDATA_RATE[rate])
148
149 enum {
150 UP_LINK,
151 DOWN_LINK,
152 };
153 typedef enum _RT_MEDIA_STATUS {
154 RT_MEDIA_DISCONNECT = 0,
155 RT_MEDIA_CONNECT = 1
156 } RT_MEDIA_STATUS;
157
158 #define MAX_DLFW_PAGE_SIZE 4096 /* @ page : 4k bytes */
159 typedef enum _FIRMWARE_SOURCE {
160 FW_SOURCE_IMG_FILE = 0,
161 FW_SOURCE_HEADER_FILE = 1, /* from header file */
162 } FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
163
164 typedef enum _CH_SW_USE_CASE {
165 CH_SW_USE_CASE_TDLS = 0,
166 CH_SW_USE_CASE_MCC = 1
167 } CH_SW_USE_CASE;
168
169 typedef enum _WAKEUP_REASON{
170 RX_PAIRWISEKEY = 0x01,
171 RX_GTK = 0x02,
172 RX_FOURWAY_HANDSHAKE = 0x03,
173 RX_DISASSOC = 0x04,
174 RX_DEAUTH = 0x08,
175 RX_ARP_REQUEST = 0x09,
176 FW_DECISION_DISCONNECT = 0x10,
177 RX_MAGIC_PKT = 0x21,
178 RX_UNICAST_PKT = 0x22,
179 RX_PATTERN_PKT = 0x23,
180 RTD3_SSID_MATCH = 0x24,
181 RX_REALWOW_V2_WAKEUP_PKT = 0x30,
182 RX_REALWOW_V2_ACK_LOST = 0x31,
183 ENABLE_FAIL_DMA_IDLE = 0x40,
184 ENABLE_FAIL_DMA_PAUSE = 0x41,
185 RTIME_FAIL_DMA_IDLE = 0x42,
186 RTIME_FAIL_DMA_PAUSE = 0x43,
187 RX_PNO = 0x55,
188 #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN
189 WOW_KEEPALIVE_ACK_TIMEOUT = 0x60,
190 WOW_KEEPALIVE_WAKE = 0x61,
191 #endif/*CONFIG_WOW_KEEP_ALIVE_PATTERN*/
192 AP_OFFLOAD_WAKEUP = 0x66,
193 NO_WAKE_RX_PAIRWISEKEY = 0xB0,
194 NO_WAKE_RX_GTK = 0xB1,
195 NO_WAKE_RX_DISASSOC = 0xB2,
196 NO_WAKE_RX_DEAUTH = 0xB3,
197 NO_WAKE_RX_EAPREQ_IDENTIFY = 0xB4,
198 NO_WAKE_FW_DECISION_DISCONNECT = 0xB5,
199 CLK_32K_UNLOCK = 0xFD,
200 CLK_32K_LOCK = 0xFE
201 }WAKEUP_REASON;
202
203 typedef enum _BCN_EARLY_INT_CASE{
204 TDLS_BCN_ERLY_ON,
205 TDLS_BCN_ERLY_OFF
206 }BCN_EARLY_INT_CASE;
207
208 /*
209 * Queue Select Value in TxDesc
210 * */
211 #define QSLT_BK 0x2/* 0x01 */
212 #define QSLT_BE 0x0
213 #define QSLT_VI 0x5/* 0x4 */
214 #define QSLT_VO 0x7/* 0x6 */
215 #define QSLT_BEACON 0x10
216 #define QSLT_HIGH 0x11
217 #define QSLT_MGNT 0x12
218 #define QSLT_CMD 0x13
219
220 /* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON.
221 * #define MAX_TX_QUEUE 9 */
222
223 #define TX_SELE_HQ BIT(0) /* High Queue */
224 #define TX_SELE_LQ BIT(1) /* Low Queue */
225 #define TX_SELE_NQ BIT(2) /* Normal Queue */
226 #define TX_SELE_EQ BIT(3) /* Extern Queue */
227
228 #define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0))
229 #define PageNum_256(_Len) (u32)(((_Len)>>8) + ((_Len) & 0xFF ? 1 : 0))
230 #define PageNum_512(_Len) (u32)(((_Len)>>9) + ((_Len) & 0x1FF ? 1 : 0))
231 #define PageNum(_Len, _Size) (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1 : 0))
232
233 struct dbg_rx_counter {
234 u32 rx_pkt_ok;
235 u32 rx_pkt_crc_error;
236 u32 rx_pkt_drop;
237 u32 rx_ofdm_fa;
238 u32 rx_cck_fa;
239 u32 rx_ht_fa;
240 };
241
242 u8 rtw_hal_get_port(_adapter *adapter);
243
244 #ifdef CONFIG_MBSSID_CAM
245 /*#define DBG_MBID_CAM_DUMP*/
246
247 void rtw_mbid_cam_init(struct dvobj_priv *dvobj);
248 void rtw_mbid_cam_deinit(struct dvobj_priv *dvobj);
249 void rtw_mbid_cam_reset(_adapter *adapter);
250 u8 rtw_get_max_mbid_cam_id(_adapter *adapter);
251 u8 rtw_get_mbid_cam_entry_num(_adapter *adapter);
252 int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name , _adapter *adapter);
253 int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter);
254 void rtw_mi_set_mbid_cam(_adapter *adapter);
255 u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr);
256 void rtw_ap_set_mbid_num(_adapter *adapter, u8 ap_num);
257 void rtw_mbid_cam_enable(_adapter *adapter);
258 #endif
259
260 #ifdef CONFIG_MI_WITH_MBSSID_CAM
261 void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr);
262 void rtw_hal_change_macaddr_mbid(_adapter *adapter, u8 *mac_addr);
263 #ifdef CONFIG_SWTIMER_BASED_TXBCN
264 u16 rtw_hal_bcn_interval_adjust(_adapter *adapter, u16 bcn_interval);
265 #endif
266 void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode);
267 #endif
268
269 void rtw_dump_mac_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
270 void rtw_dump_phy_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
271 void rtw_reset_mac_rx_counters(_adapter *padapter);
272 void rtw_reset_phy_rx_counters(_adapter *padapter);
273 void rtw_reset_phy_trx_ok_counters(_adapter *padapter);
274
275 #ifdef DBG_RX_COUNTER_DUMP
276 #define DUMP_DRV_RX_COUNTER BIT0
277 #define DUMP_MAC_RX_COUNTER BIT1
278 #define DUMP_PHY_RX_COUNTER BIT2
279 #define DUMP_DRV_TRX_COUNTER_DATA BIT3
280
281 void rtw_dump_phy_rxcnts_preprocess(_adapter *padapter, u8 rx_cnt_mode);
282 void rtw_dump_rx_counters(_adapter *padapter);
283 #endif
284
285 void dump_chip_info(HAL_VERSION ChipVersion);
286
287 #define BAND_CAP_2G BIT0
288 #define BAND_CAP_5G BIT1
289 #define BAND_CAP_6G BIT2
290 #define BAND_CAP_BIT_NUM 3
291
292 #define BW_CAP_5M BIT0
293 #define BW_CAP_10M BIT1
294 #define BW_CAP_20M BIT2
295 #define BW_CAP_40M BIT3
296 #define BW_CAP_80M BIT4
297 #define BW_CAP_160M BIT5
298 #define BW_CAP_80_80M BIT6
299 #define BW_CAP_BIT_NUM 7
300
301 #define PROTO_CAP_11B BIT0
302 #define PROTO_CAP_11G BIT1
303 #define PROTO_CAP_11N BIT2
304 #define PROTO_CAP_11AC BIT3
305 #define PROTO_CAP_BIT_NUM 4
306
307 #define WL_FUNC_P2P BIT0
308 #define WL_FUNC_MIRACAST BIT1
309 #define WL_FUNC_TDLS BIT2
310 #define WL_FUNC_FTM BIT3
311 #define WL_FUNC_BIT_NUM 4
312
313 #define TBTT_PROHIBIT_SETUP_TIME 0x04 /* 128us, unit is 32us */
314 #define TBTT_PROHIBIT_HOLD_TIME 0x80 /* 4ms, unit is 32us*/
315 #define TBTT_PROHIBIT_HOLD_TIME_STOP_BCN 0x64 /* 3.2ms unit is 32us*/
316
317 int hal_spec_init(_adapter *adapter);
318 void dump_hal_spec(void *sel, _adapter *adapter);
319
320 bool hal_chk_band_cap(_adapter *adapter, u8 cap);
321 bool hal_chk_bw_cap(_adapter *adapter, u8 cap);
322 bool hal_chk_proto_cap(_adapter *adapter, u8 cap);
323 bool hal_is_band_support(_adapter *adapter, u8 band);
324 bool hal_is_bw_support(_adapter *adapter, u8 bw);
325 bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode);
326 bool hal_is_mimo_support(_adapter *adapter);
327 u8 hal_largest_bw(_adapter *adapter, u8 in_bw);
328
329 bool hal_chk_wl_func(_adapter *adapter, u8 func);
330
331 void hal_com_config_channel_plan(
332 PADAPTER padapter,
333 const char *hw_alpha2,
334 u8 hw_chplan,
335 u8 hw_chplan_6g,
336 BOOLEAN AutoLoadFail
337 );
338
339 int hal_config_macaddr(_adapter *adapter, bool autoload_fail);
340 #ifdef RTW_HALMAC
341 void rtw_hal_hw_port_enable(_adapter *adapter);
342 void rtw_hal_hw_port_disable(_adapter *adapter);
343 #endif
344
345 BOOLEAN
346 HAL_IsLegalChannel(
347 PADAPTER Adapter,
348 u32 Channel
349 );
350
351 u8 MRateToHwRate(enum MGN_RATE rate);
352
353 u8 hw_rate_to_m_rate(u8 hw_rate);
354 #ifdef CONFIG_RTW_DEBUG
355 void dump_hw_rate_map_test(void *sel);
356 #endif
357
358 void HalSetBrateCfg(
359 PADAPTER Adapter,
360 u8 *mBratesOS,
361 u16 *pBrateCfg);
362
363 BOOLEAN
364 Hal_MappingOutPipe(
365 PADAPTER pAdapter,
366 u8 NumOutPipe
367 );
368
369 void rtw_dump_fw_info(void *sel, _adapter *adapter);
370 void rtw_restore_hw_port_cfg(_adapter *adapter);
371 void rtw_mi_set_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/
372 void rtw_hal_dump_macaddr(void *sel, _adapter *adapter);
373 void rtw_hal_set_hw_macaddr(PADAPTER adapter, u8 *mac_addr);
374
375 void rtw_init_hal_com_default_value(PADAPTER Adapter);
376
377 #ifdef CONFIG_FW_C2H_REG
378 void c2h_evt_clear(_adapter *adapter);
379 s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf);
380 #endif
381
382 #ifdef CONFIG_FW_C2H_PKT
383 void rtw_hal_c2h_pkt_pre_hdl(_adapter *adapter, u8 *buf, u16 len);
384 void rtw_hal_c2h_pkt_hdl(_adapter *adapter, u8 *buf, u16 len);
385 #endif
386
387 u8 rtw_get_mgntframe_raid(_adapter *adapter, unsigned char network_type);
388
389 void rtw_hal_update_sta_wset(_adapter *adapter, struct sta_info *psta);
390 s8 rtw_get_sta_rx_nss(_adapter *adapter, struct sta_info *psta);
391 s8 rtw_get_sta_tx_nss(_adapter *adapter, struct sta_info *psta);
392 void rtw_hal_update_sta_ra_info(PADAPTER padapter, struct sta_info *psta);
393
394 /* access HW only */
395 u32 rtw_sec_read_cam(_adapter *adapter, u8 addr);
396 void rtw_sec_write_cam(_adapter *adapter, u8 addr, u32 wdata);
397 void rtw_sec_read_cam_ent(_adapter *adapter, u8 id, u8 *ctrl, u8 *mac, u8 *key);
398 void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key);
399 void rtw_sec_clr_cam_ent(_adapter *adapter, u8 id);
400 bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id);
401
402 u8 rtw_hal_rcr_check(_adapter *adapter, u32 check_bit);
403
404 u8 rtw_hal_rcr_add(_adapter *adapter, u32 add);
405 u8 rtw_hal_rcr_clear(_adapter *adapter, u32 clear);
406 void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action);
407 void rtw_hal_rcr_set_chk_bssid_act_non(_adapter *adapter);
408
409 void rtw_iface_enable_tsf_update(_adapter *adapter);
410 void rtw_iface_disable_tsf_update(_adapter *adapter);
411 void rtw_hal_periodic_tsf_update_chk(_adapter *adapter);
412 void rtw_hal_periodic_tsf_update_end_timer_hdl(void *ctx);
413
414 #if CONFIG_TX_AC_LIFETIME
415 #define TX_ACLT_CONF_DEFAULT 0
416 #define TX_ACLT_CONF_AP_M2U 1
417 #define TX_ACLT_CONF_MESH 2
418 #define TX_ACLT_CONF_NUM 3
419
420 extern const char *const _tx_aclt_conf_str[];
421 #define tx_aclt_conf_str(conf) (((conf) >= TX_ACLT_CONF_NUM) ? _tx_aclt_conf_str[TX_ACLT_CONF_NUM] : _tx_aclt_conf_str[(conf)])
422
423 struct tx_aclt_conf_t {
424 u8 en;
425 u32 vo_vi;
426 u32 be_bk;
427 };
428
429 void dump_tx_aclt_force_val(void *sel, struct dvobj_priv *dvobj);
430 void rtw_hal_set_tx_aclt_force_val(_adapter *adapter, struct tx_aclt_conf_t *input, u8 arg_num);
431 void dump_tx_aclt_confs(void *sel, struct dvobj_priv *dvobj);
432 void rtw_hal_set_tx_aclt_conf(_adapter *adapter, u8 conf_idx, struct tx_aclt_conf_t *input, u8 arg_num);
433 void rtw_hal_update_tx_aclt(_adapter *adapter);
434 #endif
435
436 void hw_var_port_switch(_adapter *adapter);
437 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
438 u8 rtw_hal_set_ap_bcn_imr_cmd(struct _ADAPTER *adapter, u8 enable);
439 #endif
440 void rtw_var_set_basic_rate(PADAPTER padapter, u8 *val);
441 u8 SetHwReg(PADAPTER padapter, u8 variable, u8 *val);
442 void GetHwReg(PADAPTER padapter, u8 variable, u8 *val);
443 void rtw_hal_check_rxfifo_full(_adapter *adapter);
444 void rtw_hal_reqtxrpt(_adapter *padapter, u8 macid);
445 int rtw_get_sta_tx_stat(_adapter *adapter, u8 mac_id, u8 *macaddr);
446
447 u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
448 u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
449
450 u32
451 MapCharToHexDigit(
452 char chTmp
453 );
454
455 BOOLEAN
456 GetHexValueFromString(
457 char *szStr,
458 u32 *pu4bVal,
459 u32 *pu4bMove
460 );
461
462 BOOLEAN
463 GetFractionValueFromString(
464 char *szStr,
465 u8 *pInteger,
466 u8 *pFraction,
467 u32 *pu4bMove
468 );
469
470 BOOLEAN
471 IsCommentString(
472 char *szStr
473 );
474
475 BOOLEAN
476 ParseQualifiedString(
477 char *In,
478 u32 *Start,
479 char *Out,
480 char LeftQualifier,
481 char RightQualifier
482 );
483
484 BOOLEAN
485 GetU1ByteIntegerFromStringInDecimal(
486 char *Str,
487 u8 *pInt
488 );
489
490 BOOLEAN
491 isAllSpaceOrTab(
492 u8 *data,
493 u8 size
494 );
495
496 void linked_info_dump(_adapter *padapter, u8 benable);
497 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
498 void rtw_get_raw_rssi_info(void *sel, _adapter *padapter);
499 void rtw_dump_raw_rssi_info(_adapter *padapter, void *sel);
500 #endif
501
502 #ifdef DBG_RX_DFRAME_RAW_DATA
503 void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel);
504 #endif
505 void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe);
506 #define HWSET_MAX_SIZE 1024
507
508 #ifdef CONFIG_EFUSE_CONFIG_FILE
509 u32 Hal_readPGDataFromConfigFile(PADAPTER padapter);
510 u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr);
511 #endif /* CONFIG_EFUSE_CONFIG_FILE */
512
513 int hal_efuse_macaddr_offset(_adapter *adapter);
514 int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr);
515 void rtw_dump_cur_efuse(PADAPTER padapter);
516
517 #ifdef CONFIG_RF_POWER_TRIM
518 void rtw_bb_rf_gain_offset(_adapter *padapter);
519 #endif /*CONFIG_RF_POWER_TRIM*/
520
521 void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer);
522 u8 rtw_hal_busagg_qsel_check(_adapter *padapter, u8 pre_qsel, u8 next_qsel);
523
524 u8 rtw_get_current_tx_rate(_adapter *padapter, struct sta_info *psta);
525 u8 rtw_get_current_tx_sgi(_adapter *padapter, struct sta_info *psta);
526 #ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
527 void rtw_hal_set_pathb_phase(_adapter *adapter, u8 phase_idx);
528 #endif
529 void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished);
530 u8 rtw_hal_get_rsvd_page_num(struct _ADAPTER *adapter);
531
532 #ifdef CONFIG_TSF_RESET_OFFLOAD
533 int rtw_hal_reset_tsf(_adapter *adapter, u8 reset_port);
534 #endif
535 u64 rtw_hal_get_tsftr_by_port(_adapter *adapter, u8 port);
536
537 #ifdef CONFIG_TDLS
538 #ifdef CONFIG_TDLS_CH_SW
539 s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode);
540 #endif
541 #endif
542 #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
543 s32 rtw_hal_set_wifi_btc_port_id_cmd(_adapter *adapter);
544 #endif
545
546 void rtw_lps_state_chk(_adapter *adapter, u8 ps_mode);
547
548 #ifdef CONFIG_GPIO_API
549 u8 rtw_hal_get_gpio(_adapter *adapter, u8 gpio_num);
550 int rtw_hal_set_gpio_output_value(_adapter *adapter, u8 gpio_num, bool isHigh);
551 int rtw_hal_config_gpio(_adapter *adapter, u8 gpio_num, bool isOutput);
552 int rtw_hal_register_gpio_interrupt(_adapter *adapter, int gpio_num, void(*callback)(u8 level));
553 int rtw_hal_disable_gpio_interrupt(_adapter *adapter, int gpio_num);
554 #endif
555
556 s8 rtw_hal_ch_sw_iqk_info_search(_adapter *padapter, u8 central_chnl, u8 bw_mode);
557 void rtw_hal_ch_sw_iqk_info_backup(_adapter *adapter);
558 void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case);
559
560 #ifdef CONFIG_GPIO_WAKEUP
561 void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable);
562 void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval);
563 void rtw_hal_set_input_gpio(_adapter *padapter, u8 index);
564 #define GPIO_OUTPUT_LOW 0
565 #define GPIO_OUTPUT_HIGH 1
566 #endif
567
568 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
569 extern char *rtw_phy_file_path;
570 extern char rtw_phy_para_file_path[PATH_LENGTH_MAX];
571 #define GetLineFromBuffer(buffer) strsep(&buffer, "\r\n")
572 #endif
573
574 void update_IOT_info(_adapter *padapter);
575 #ifdef CONFIG_RTS_FULL_BW
576 void rtw_set_rts_bw(_adapter *padapter);
577 #endif/*CONFIG_RTS_FULL_BW*/
578
579 void ResumeTxBeacon(_adapter *padapter);
580 void StopTxBeacon(_adapter *padapter);
581
582 #ifdef CONFIG_ANTENNA_DIVERSITY
583 u8 rtw_hal_antdiv_before_linked(_adapter *padapter);
584 void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
585 #endif
586
587 #ifdef DBG_SEC_CAM_MOVE
588 void rtw_hal_move_sta_gk_to_dk(_adapter *adapter);
589 void rtw_hal_read_sta_dk_key(_adapter *adapter, u8 key_id);
590 #endif
591
592 #ifdef CONFIG_LPS_PG
593 #define LPSPG_RSVD_PAGE_SET_MACID(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 0, 8, _value)/*used macid*/
594 #define LPSPG_RSVD_PAGE_SET_MBSSCAMID(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 8, 8, _value)/*used BSSID CAM entry*/
595 #define LPSPG_RSVD_PAGE_SET_PMC_NUM(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 16, 8, _value)/*Max used Pattern Match CAM entry*/
596 #define LPSPG_RSVD_PAGE_SET_MU_RAID_GID(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 24, 8, _value)/*Max MU rate table Group ID*/
597 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_NUM(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 0, 8, _value)/*used Security CAM entry number*/
598 #define LPSPG_RSVD_PAGE_SET_DRV_RSVDPAGE_NUM(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 8, 8, _value)/*Txbuf used page number for fw offload*/
599 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID1(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 0, 8, _value)/*used Security CAM entry -1*/
600 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID2(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 8, 8, _value)/*used Security CAM entry -2*/
601 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID3(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 16, 8, _value)/*used Security CAM entry -3*/
602 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID4(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 24, 8, _value)/*used Security CAM entry -4*/
603 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID5(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 0, 8, _value)/*used Security CAM entry -5*/
604 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID6(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 8, 8, _value)/*used Security CAM entry -6*/
605 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID7(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 16, 8, _value)/*used Security CAM entry -7*/
606 #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID8(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 24, 8, _value)/*used Security CAM entry -8*/
607 enum lps_pg_hdl_id {
608 LPS_PG_INFO_CFG = 0,
609 LPS_PG_REDLEMEM,
610 LPS_PG_PHYDM_DIS,
611 LPS_PG_PHYDM_EN,
612 };
613
614 u8 rtw_hal_set_lps_pg_info_cmd(_adapter *adapter);
615 u8 rtw_hal_set_lps_pg_info(_adapter *adapter);
616 #endif
617
618 int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset, u32 page_num, u8 *buffer, u32 buffer_size);
619 void rtw_hal_construct_beacon(_adapter *padapter, u8 *pframe, u32 *pLength);
620 void rtw_hal_construct_NullFunctionData(PADAPTER, u8 *pframe, u32 *pLength,
621 u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave);
622
623 bool _rtw_wow_chk_cap(_adapter *adapter, u8 cap);
624 #ifdef CONFIG_WOWLAN
625 struct rtl_wow_pattern {
626 u16 crc;
627 u8 type;
628 u32 mask[4];
629 };
630 void rtw_wow_pattern_cam_dump(_adapter *adapter);
631
632 void rtw_dump_wow_pattern(void *sel, struct rtl_wow_pattern *pwow_pattern, u8 idx);
633 #ifdef CONFIG_WOW_PATTERN_HW_CAM
634 void rtw_wow_pattern_read_cam_ent(_adapter *adapter, u8 id, struct rtl_wow_pattern *context);
635 #endif
636
637 #ifdef CONFIG_PNO_SUPPORT
638 struct pno_ssid;
639 void rtw_hal_construct_ProbeReq(_adapter *padapter, u8 *pframe,
640 u32 *pLength, struct pno_ssid *ssid);
641 #endif
642
643 struct rtw_ndp_info {
644 u8 enable:1;
645 u8 check_remote_ip:1; /* Need to Check Sender IP or not */
646 u8 rsvd:6;
647 u8 num_of_target_ip; /* Number of Check IP which NA query IP */
648 u8 target_link_addr[6]; /* DUT's MAC address */
649 u8 remote_ipv6_addr[16]; /* Just respond IP */
650 u8 target_ipv6_addr[16]; /* target IP */
651 };
652 #define REMOTE_INFO_CTRL_SET_VALD_EN(target, _value) \
653 SET_BITS_TO_LE_4BYTE(target + 0, 0, 8, _value)
654 #define REMOTE_INFO_CTRL_SET_PTK_EN(target, _value) \
655 SET_BITS_TO_LE_4BYTE(target + 1, 0, 1, _value)
656 #define REMOTE_INFO_CTRL_SET_GTK_EN(target, _value) \
657 SET_BITS_TO_LE_4BYTE(target + 1, 1, 1, _value)
658 #define REMOTE_INFO_CTRL_SET_GTK_IDX(target, _value) \
659 SET_BITS_TO_LE_4BYTE(target + 2, 0, 8, _value)
660 #endif /*CONFIG_WOWLAN*/
661
662 #ifdef CONFIG_PROC_DEBUG
663 void rtw_dump_phy_cap(void *sel, _adapter *adapter);
664 #endif
665 void rtw_dump_rsvd_page(void *sel, _adapter *adapter, u8 page_offset, u8 page_num);
666 #ifdef CONFIG_SUPPORT_FIFO_DUMP
667 void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32 fifo_size);
668 #endif
669
670 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
671 s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id);
672 s32 rtw_set_default_port_id(_adapter *adapter);
673 s32 rtw_set_ps_rsvd_page(_adapter *adapter);
674
675 #define get_dft_portid(adapter) (adapter_to_dvobj(adapter)->dft.port_id)
676 #define get_dft_macid(adapter) (adapter_to_dvobj(adapter)->dft.mac_id)
677
678 /*void rtw_search_default_port(_adapter *adapter);*/
679 #endif
680
681 #ifdef CONFIG_P2P_PS
682 #ifdef RTW_HALMAC
683 void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state);
684 #endif
685 #endif
686
687 #ifdef RTW_CHANNEL_SWITCH_OFFLOAD
688 void rtw_hal_switch_chnl_and_set_bw_offload(_adapter *adapter, u8 central_ch, u8 pri_ch_idx, u8 bw);
689 #endif
690
691 s16 translate_dbm_to_percentage(s16 signal);
692
693 #ifdef CONFIG_SUPPORT_MULTI_BCN
694 void rtw_ap_multi_bcn_cfg(_adapter *adapter);
695 #endif
696
697 #ifdef CONFIG_SWTIMER_BASED_TXBCN
698 #ifdef CONFIG_BCN_RECOVERY
699 u8 rtw_ap_bcn_recovery(_adapter *padapter);
700 #endif
701 #ifdef CONFIG_BCN_XMIT_PROTECT
702 u8 rtw_ap_bcn_queue_empty_check(_adapter *padapter, u32 txbcn_timer_ms);
703 #endif
704 #endif /*CONFIG_SWTIMER_BASED_TXBCN*/
705
706 #ifdef CONFIG_FW_HANDLE_TXBCN
707 void rtw_ap_mbid_bcn_en(_adapter *adapter, u8 mbcn_id);
708 void rtw_ap_mbid_bcn_dis(_adapter *adapter, u8 mbcn_id);
709 #endif
710
711 void rtw_hal_get_trx_path(struct dvobj_priv *d, enum rf_type *type,
712 enum bb_path *tx, enum bb_path *rx);
713 #ifdef CONFIG_BEAMFORMING
714 #ifdef RTW_BEAMFORMING_VERSION_2
715 void rtw_hal_beamforming_config_csirate(PADAPTER adapter);
716 #endif
717 #endif
718
719 u8 phy_get_capable_tx_num(_adapter *adapter, enum MGN_RATE rate);
720 u8 phy_get_current_tx_num(_adapter *adapter, enum MGN_RATE rate);
721
722 #ifdef CONFIG_RTL8812A
723 u8 * rtw_hal_set_8812a_vendor_ie(_adapter *padapter , u8 *pframe ,uint *frlen );
724 #endif
725
726 #ifdef CONFIG_PROTSEL_PORT
727 void rtw_enter_protsel_port(_adapter *padapter, u8 port_sel);
728 bool rtw_assert_protsel_port(_adapter *padapter, u32 addr, u8 len);
729 void rtw_leave_protsel_port(_adapter *padapter);
730 #else
rtw_enter_protsel_port(_adapter * padapter,u8 port_sel)731 static inline void rtw_enter_protsel_port(_adapter *padapter, u8 port_sel) {}
rtw_assert_protsel_port(_adapter * padapter,u32 addr,u8 len)732 static inline bool rtw_assert_protsel_port(_adapter *padapter, u32 addr, u8 len) {return true; }
rtw_leave_protsel_port(_adapter * padapter)733 static inline void rtw_leave_protsel_port(_adapter *padapter) {}
734 #endif
735 #ifdef CONFIG_PROTSEL_ATIMDTIM
736 void rtw_enter_protsel_atimdtim(_adapter *padapter, u8 port_sel);
737 bool rtw_assert_protsel_atimdtim(_adapter *padapter, u32 addr, u8 len);
738 void rtw_leave_protsel_atimdtim(_adapter *padapter);
739 #else
rtw_enter_protsel_atimdtim(_adapter * padapter,u8 port_sel)740 static inline void rtw_enter_protsel_atimdtim(_adapter *padapter, u8 port_sel) {}
rtw_assert_protsel_atimdtim(_adapter * padapter,u32 addr,u8 len)741 static inline bool rtw_assert_protsel_atimdtim(_adapter *padapter, u32 addr, u8 len) {return true; }
rtw_leave_protsel_atimdtim(_adapter * padapter)742 static inline void rtw_leave_protsel_atimdtim(_adapter *padapter) {}
743 #endif
744 #ifdef CONFIG_PROTSEL_MACSLEEP
745 void rtw_enter_protsel_macsleep(_adapter *padapter, u8 sel);
746 bool rtw_assert_protsel_macsleep(_adapter *padapter, u32 addr, u8 len);
747 void rtw_leave_protsel_macsleep(_adapter *padapter);
748 #else
rtw_enter_protsel_macsleep(_adapter * padapter,u8 port_sel)749 static inline void rtw_enter_protsel_macsleep(_adapter *padapter, u8 port_sel) {}
rtw_assert_protsel_macsleep(_adapter * padapter,u32 addr,u8 len)750 static inline bool rtw_assert_protsel_macsleep(_adapter *padapter, u32 addr, u8 len) {return true; }
rtw_leave_protsel_macsleep(_adapter * padapter)751 static inline void rtw_leave_protsel_macsleep(_adapter *padapter) {}
752 #endif
753
754 #ifndef RTW_HALMAC
755 void rtw_hal_init_sifs_backup(_adapter *adapter);
756 #endif
757
758 #endif /* __HAL_COMMON_H__ */
759