1 /* 2 * Copyright (c) 2021 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 #ifndef HPM_OV7725_H 9 #define HPM_OV7725_H 10 #include "hpm_common.h" 11 #include "hpm_camera_config.h" 12 13 #define OV7725_ACTIVE_IMAGE_WIDTH (480U) 14 #define OV7725_ACTIVE_IMAGE_HEIGHT (480U) 15 #define OV7725_I2C_ADDR (0x21U) 16 #define OV7725_CHIP_ID_HIGH_BYTE_ADDR (0x0A) 17 #define OV7725_CHIP_ID_HIGH_BYTE_VALUE (0x77) 18 #define OV7725_CHIP_ID_LOW_BYTE_ADDR (0x0B) 19 #define OV7725_CHIP_ID_LOW_BYTE_VALUE (0x21) /* need to check */ 20 21 #define OV7725_RST_ACTIVE 0 22 #define OV7725_RST_INACTIVE 1 23 #define OV7725_PWDN_ACTIVE 1 24 #define OV7725_PWDN_INACTIVE 0 25 26 #define GAIN (0x00U) /* AGC – Gain control gain setting */ 27 #define BLUE (0x01U) /* AWB – Blue channel gain setting */ 28 #define RED (0x02U) /* AWB – Red channel gain setting */ 29 #define GREEN (0x03U) /* AWB – Green channel gain setting */ 30 31 #define BAVG (0x05U) /* U/B Average Level */ 32 #define GAVG (0x06U) /* Y/Gb Average Level */ 33 #define RAVG (0x07U) /* V/R Average Level */ 34 #define AECH (0x08U) /* Exposure Value – AEC MSBs */ 35 36 #define COM2 (0x09U) /* Common Control 2 */ 37 #define COM2_SOFT_SLEEP (0x10U) /* Soft sleep mode */ 38 #define COM2_OUT_DRIVE_1x (0x00U) /* Output drive capability 1x */ 39 #define COM2_OUT_DRIVE_2x (0x01U) /* Output drive capability 2x */ 40 #define COM2_OUT_DRIVE_3x (0x02U) /* Output drive capability 3x */ 41 #define COM2_OUT_DRIVE_4x (0x03U) /* Output drive capability 4x */ 42 43 #define PID (0x0AU) /* Product ID Number MSB */ 44 #define VER (0x0BU) /* Product ID Number LSB */ 45 46 #define COM3 (0x0CU) /* Common Control 3 */ 47 #define COM3_VFLIP (0x80U) /* Vertical flip image ON/OFF selection */ 48 #define COM3_MIRROR (0x40U) /* Horizontal mirror image ON/OFF selection */ 49 #define COM3_SWAP_BR (0x20U) /* Swap B/R output sequence in RGB output mode */ 50 #define COM3_SWAP_YUV (0x10U) /* Swap Y/UV output sequence in YUV output mode */ 51 #define COM3_SWAP_MSB (0x08U) /* Swap output MSB/LSB */ 52 #define COM3_TRI_CLOCK (0x04U) /* Tri-state option for output clock at power-down period */ 53 #define COM3_TRI_DATA (0x02U) /* Tri-state option for output data at power-down period */ 54 #define COM3_COLOR_BAR (0x01U) /* Sensor color bar test pattern output enable */ 55 56 #define COM4 (0x0DU) /* Common Control 4 */ 57 #define COM4_PLL_BYPASS (0x00U) /* Bypass PLL */ 58 #define COM4_PLL_4x (0x40U) /* PLL frequency 4x */ 59 #define COM4_PLL_6x (0x80U) /* PLL frequency 6x */ 60 #define COM4_PLL_8x (0xc0U) /* PLL frequency 8x */ 61 #define COM4_AEC_FULL (0x00U) /* AEC evaluate full window */ 62 #define COM4_AEC_1_2 (0x10U) /* AEC evaluate 1/2 window */ 63 #define COM4_AEC_1_4 (0x20U) /* AEC evaluate 1/4 window */ 64 #define COM4_AEC_2_3 (0x30U) /* AEC evaluate 2/3 window */ 65 66 #define COM5 (0x0EU) /* Common Control 5 */ 67 #define COM5_AFR (0x80U) /* Auto frame rate control ON/OFF selection (night mode) */ 68 #define COM5_AFR_SPEED (0x40U) /* Auto frame rate control speed selection */ 69 #define COM5_AFR_0 (0x00U) /* No reduction of frame rate */ 70 #define COM5_AFR_1_2 (0x10U) /* Max reduction to 1/2 frame rate */ 71 #define COM5_AFR_1_4 (0x20U) /* Max reduction to 1/4 frame rate */ 72 #define COM5_AFR_1_8 (0x30U) /* Max reduction to 1/8 frame rate */ 73 #define COM5_AFR_4x (0x04U) /* Add frame when AGC reaches 4x gain */ 74 #define COM5_AFR_8x (0x08U) /* Add frame when AGC reaches 8x gain */ 75 #define COM5_AFR_16x (0x0cU) /* Add frame when AGC reaches 16x gain */ 76 #define COM5_AEC_NO_LIMIT (0x01U) /* No limit to AEC increase step */ 77 78 #define COM6 (0x0FU) /* Common Control 6 */ 79 #define COM6_AUTO_WINDOW (0x01U) /* Auto window setting ON/OFF selection when format changes */ 80 81 #define AEC (0x10U) /* AEC[7:0] (see register AECH for AEC[15:8]) */ 82 #define CLKRC (0x11U) /* Internal Clock */ 83 84 #define COM7 (0x12U) /* Common Control 7 */ 85 #define COM7_RESET (0x80U) /* SCCB Register Reset */ 86 #define COM7_RES_VGA (0x00U) /* Resolution VGA */ 87 #define COM7_RES_QVGA (0x40U) /* Resolution QVGA */ 88 #define COM7_BT656 (0x20U) /* BT.656 protocol ON/OFF */ 89 #define COM7_SENSOR_RAW (0x10U) /* Sensor RAW */ 90 #define COM7_FMT_GBR422 (0x02U) /* RGB output format GBR422 */ 91 #define COM7_FMT_RGB565 (0x06U) /* RGB output format RGB565 */ 92 #define COM7_FMT_RGB555 (0x0AU) /* RGB output format RGB555 */ 93 #define COM7_FMT_RGB444 (0x0EU) /* RGB output format RGB444 */ 94 #define COM7_FMT_YUV (0x00U) /* Output format YUV */ 95 #define COM7_FMT_P_BAYER (0x01U) /* Output format Processed Bayer RAW */ 96 #define COM7_FMT_R_BAYER (0x03U) /* Output format Bayer RAW */ 97 98 #define COM8 (0x13U) /* Common Control 8 */ 99 #define COM8_FAST_AUTO (0x80U) /* Enable fast AGC/AEC algorithm */ 100 #define COM8_STEP_VSYNC (0x00U) /* AEC - Step size limited to vertical blank */ 101 #define COM8_STEP_UNLIMIT (0x40U) /* AEC - Step size unlimited step size */ 102 #define COM8_BANDF_EN (0x20U) /* Banding filter ON/OFF */ 103 #define COM8_AEC_BANDF (0x10U) /* Enable AEC below banding value */ 104 #define COM8_AEC_FINE_EN (0x08U) /* Fine AEC ON/OFF control */ 105 #define COM8_AGC_EN (0x04U) /* AGC Enable */ 106 #define COM8_AWB_EN (0x02U) /* AWB Enable */ 107 #define COM8_AEC_EN (0x01U) /* AEC Enable */ 108 109 #define COM9 (0x14U) /* Common Control 9 */ 110 #define COM9_HISTO_AVG (0x80U) /* Histogram or average based AEC/AGC selection */ 111 #define COM9_AGC_GAIN_2x (0x00U) /* Automatic Gain Ceiling 2x */ 112 #define COM9_AGC_GAIN_4x (0x10U) /* Automatic Gain Ceiling 4x */ 113 #define COM9_AGC_GAIN_8x (0x20U) /* Automatic Gain Ceiling 8x */ 114 #define COM9_AGC_GAIN_16x (0x30U) /* Automatic Gain Ceiling 16x */ 115 #define COM9_AGC_GAIN_32x (0x40U) /* Automatic Gain Ceiling 32x */ 116 #define COM9_DROP_VSYNC (0x04U) /* Drop VSYNC output of corrupt frame */ 117 #define COM9_DROP_HREF (0x02U) /* Drop HREF output of corrupt frame */ 118 119 #define COM10 (0x15U) /* Common Control 10 */ 120 #define COM10_NEGATIVE (0x80U) /* Output negative data */ 121 #define COM10_HSYNC_EN (0x40U) /* HREF changes to HSYNC */ 122 #define COM10_PCLK_FREE (0x00U) /* PCLK output option: free running PCLK */ 123 #define COM10_PCLK_MASK (0x20U) /* PCLK output option: masked during horizontal blank */ 124 #define COM10_PCLK_REV (0x10U) /* PCLK reverse */ 125 #define COM10_HREF_REV (0x08U) /* HREF reverse */ 126 #define COM10_VSYNC_FALLING (0x00U) /* VSYNC changes on falling edge of PCLK */ 127 #define COM10_VSYNC_RISING (0x04U) /* VSYNC changes on rising edge of PCLK */ 128 #define COM10_VSYNC_NEG (0x02U) /* VSYNC negative */ 129 #define COM10_OUT_RANGE_8 (0x01U) /* Output data range: Full range */ 130 #define COM10_OUT_RANGE_10 (0x00U) /* Output data range: Data from [10] to [F0] (8 MSBs) */ 131 132 #define REG16 (0x16U) /* Register 16 */ 133 #define REG16_BIT_SHIFT (0x80U) /* Bit shift test pattern options */ 134 #define HSTART (0x17U) /* Horizontal Frame (HREF column) Start 8 MSBs (2 LSBs are at HREF[5:4]) */ 135 #define HSIZE (0x18U) /* Horizontal Sensor Size (2 LSBs are at HREF[1:0]) */ 136 #define VSTART (0x19U) /* Vertical Frame (row) Start 8 MSBs (1 LSB is at HREF[6]) */ 137 #define VSIZE (0x1AU) /* Vertical Sensor Size (1 LSB is at HREF[2]) */ 138 #define PSHFT (0x1BU) /* Data Format - Pixel Delay Select */ 139 #define REG_MIDH (0x1CU) /* Manufacturer ID Byte – High */ 140 #define REG_MIDL (0x1DU) /* Manufacturer ID Byte – Low */ 141 #define LAEC (0x1FU) /* Fine AEC Value - defines exposure value less than one row period */ 142 143 #define COM11 (0x20U) /* Common Control 11 */ 144 #define COM11_SNGL_FRAME_EN (0x02U) /* Single frame ON/OFF selection */ 145 #define COM11_SNGL_XFR_TRIG (0x01U) /* Single frame transfer trigger */ 146 147 #define BDBASE (0x22U) /* Banding Filter Minimum AEC Value */ 148 #define DBSTEP (0x23U) /* Banding Filter Maximum Step */ 149 #define AEW (0x24U) /* AGC/AEC - Stable Operating Region (Upper Limit) */ 150 #define AEB (0x25U) /* AGC/AEC - Stable Operating Region (Lower Limit) */ 151 #define VPT (0x26U) /* AGC/AEC Fast Mode Operating Region */ 152 #define REG28 (0x28U) /* Selection on the number of dummy rows, N */ 153 #define HOUTSIZE (0x29U) /* Horizontal Data Output Size MSBs (2 LSBs at register EXHCH[1:0]) */ 154 #define EXHCH (0x2AU) /* Dummy Pixel Insert MSB */ 155 #define EXHCL (0x2BU) /* Dummy Pixel Insert LSB */ 156 #define VOUTSIZE (0x2CU) /* Vertical Data Output Size MSBs (LSB at register EXHCH[2]) */ 157 #define ADVFL (0x2DU) /* LSB of Insert Dummy Rows in Vertical Sync (1 bit equals 1 row) */ 158 #define ADVFH (0x2EU) /* MSB of Insert Dummy Rows in Vertical Sync */ 159 #define YAVE (0x2FU) /* Y/G Channel Average Value */ 160 #define LUMHTH (0x30U) /* Histogram AEC/AGC Luminance High Level Threshold */ 161 #define LUMLTH (0x31U) /* Histogram AEC/AGC Luminance Low Level Threshold */ 162 #define HREF (0x32U) /* Image Start and Size Control */ 163 #define DM_LNL (0x33U) /* Dummy Row Low 8 Bits */ 164 #define DM_LNH (0x34U) /* Dummy Row High 8 Bits */ 165 #define ADOFF_B (0x35U) /* AD Offset Compensation Value for B Channel */ 166 #define ADOFF_R (0x36U) /* AD Offset Compensation Value for R Channel */ 167 #define ADOFF_GB (0x37U) /* AD Offset Compensation Value for GB Channel */ 168 #define ADOFF_GR (0x38U) /* AD Offset Compensation Value for GR Channel */ 169 #define OFF_B (0x39U) /* AD Offset Compensation Value for B Channel */ 170 #define OFF_R (0x3AU) /* AD Offset Compensation Value for R Channel */ 171 #define OFF_GB (0x3BU) /* AD Offset Compensation Value for GB Channel */ 172 #define OFF_GR (0x3CU) /* AD Offset Compensation Value for GR Channel */ 173 #define COM12 (0x3DU) /* DC offset compensation for analog process */ 174 175 #define COM13 (0x3EU) /* Common Control 13 */ 176 #define COM13_BLC_EN (0x80U) /* BLC enable */ 177 #define COM13_ADC_EN (0x40U) /* ADC channel BLC ON/OFF control */ 178 #define COM13_ANALOG_BLC (0x20U) /* Analog processing channel BLC ON/OFF control */ 179 #define COM13_ABLC_GAIN_EN (0x04U) /* ABLC gain trigger enable */ 180 181 #define COM14 (0x3FU) /* Common Control 14 */ 182 #define COM15 (0x40U) /* Common Control 15 */ 183 #define COM16 (0x41U) /* Common Control 16 */ 184 #define TGT_B (0x42U) /* BLC Blue Channel Target Value */ 185 #define TGT_R (0x43U) /* BLC Red Channel Target Value */ 186 #define TGT_GB (0x44U) /* BLC Gb Channel Target Value */ 187 #define TGT_GR (0x45U) /* BLC Gr Channel Target Value */ 188 189 #define LC_CTR (0x46U) /* Lens Correction Control */ 190 #define LC_CTR_RGB_COMP_1 (0x00U) /* R, G, and B channel compensation coefficient is set by LC_COEF ((0x49U)) */ 191 /* R, G, and B channel compensation coefficient is set by registers LC_COEFB ((0x4BU)), LC_COEF ((0x49U)), and LC_COEFR ((0x4CU)), respectively */ 192 #define LC_CTR_RGB_COMP_3 (0x04U) 193 #define LC_CTR_EN (0x01U) /* Lens correction enable */ 194 #define LC_XC (0x47U) /* X Coordinate of Lens Correction Center Relative to Array Center */ 195 #define LC_YC (0x48U) /* Y Coordinate of Lens Correction Center Relative to Array Center */ 196 #define LC_COEF (0x49U) /* Lens Correction Coefficient */ 197 #define LC_RADI (0x4AU) /* Lens Correction Radius */ 198 #define LC_COEFB (0x4BU) /* Lens Correction B Channel Compensation Coefficient */ 199 #define LC_COEFR (0x4CU) /* Lens Correction R Channel Compensation Coefficient */ 200 201 #define FIXGAIN (0x4DU) /* Analog Fix Gain Amplifier */ 202 #define AREF0 (0x4EU) /* Sensor Reference Control */ 203 #define AREF1 (0x4FU) /* Sensor Reference Current Control */ 204 #define AREF2 (0x50U) /* Analog Reference Control */ 205 #define AREF3 (0x51U) /* ADC Reference Control */ 206 #define AREF4 (0x52U) /* ADC Reference Control */ 207 #define AREF5 (0x53U) /* ADC Reference Control */ 208 #define AREF6 (0x54U) /* Analog Reference Control */ 209 #define AREF7 (0x55U) /* Analog Reference Control */ 210 #define UFIX (0x60U) /* U Channel Fixed Value Output */ 211 #define VFIX (0x61U) /* V Channel Fixed Value Output */ 212 #define AWBB_BLK (0x62U) /* AWB Option for Advanced AWB */ 213 214 #define AWB_CTRL0 (0x63U) /* AWB Control Byte 0 */ 215 #define AWB_CTRL0_GAIN_EN (0x80U) /* AWB gain enable */ 216 #define AWB_CTRL0_CALC_EN (0x40U) /* AWB calculate enable */ 217 #define AWB_CTRL0_WBC_MASK (0x0FU) /* WBC threshold 2 */ 218 219 #define DSP_CTRL1 (0x64U) /* DSP Control Byte 1 */ 220 #define DSP_CTRL1_FIFO_EN (0x80U) /* FIFO enable/disable selection */ 221 #define DSP_CTRL1_UV_EN (0x40U) /* UV adjust function ON/OFF selection */ 222 #define DSP_CTRL1_SDE_EN (0x20U) /* SDE enable */ 223 #define DSP_CTRL1_MTRX_EN (0x10U) /* Color matrix ON/OFF selection */ 224 #define DSP_CTRL1_INTRP_EN (0x08U) /* Interpolation ON/OFF selection */ 225 #define DSP_CTRL1_GAMMA_EN (0x04U) /* Gamma function ON/OFF selection */ 226 #define DSP_CTRL1_BLACK_EN (0x02U) /* Black defect auto correction ON/OFF */ 227 #define DSP_CTRL1_WHITE_EN (0x01U) /* White defect auto correction ON/OFF */ 228 229 #define DSP_CTRL2 (0x65U) /* DSP Control Byte 2 */ 230 #define DSP_CTRL2_VDCW_EN (0x08U) /* Vertical DCW enable */ 231 #define DSP_CTRL2_HDCW_EN (0x04U) /* Horizontal DCW enable */ 232 #define DSP_CTRL2_VZOOM_EN (0x02U) /* Vertical zoom out enable */ 233 #define DSP_CTRL2_HZOOM_EN (0x01U) /* Horizontal zoom out enable */ 234 235 #define DSP_CTRL3 (0x66U) /* DSP Control Byte 3 */ 236 #define DSP_CTRL3_UV_EN (0x80U) /* UV output sequence option */ 237 #define DSP_CTRL3_CBAR_EN (0x20U) /* DSP color bar ON/OFF selection */ 238 #define DSP_CTRL3_FIFO_EN (0x08U) /* FIFO power down ON/OFF selection */ 239 #define DSP_CTRL3_SCAL1_PWDN (0x04U) /* Scaling module power down control 1 */ 240 #define DSP_CTRL3_SCAL2_PWDN (0x02U) /* Scaling module power down control 2 */ 241 #define DSP_CTRL3_INTRP_PWDN (0x01U) /* Interpolation module power down control */ 242 243 #define DSP_CTRL4 (0x67U) /* DSP Control Byte 4 */ 244 #define DSP_CTRL4_YUV_RGB (0x00U) /* Output selection YUV or RGB */ 245 #define DSP_CTRL4_RAW8 (0x02U) /* Output selection RAW8 */ 246 #define DSP_CTRL4_RAW10 (0x03U) /* Output selection RAW10 */ 247 248 #define AWB_BIAS (0x68U) /* AWB BLC Level Clip */ 249 #define AWB_CTRL1 (0x69U) /* AWB Control 1 */ 250 #define AWB_CTRL2 (0x6AU) /* AWB Control 2 */ 251 252 #define AWB_CTRL3 (0x6BU) /* AWB Control 3 */ 253 #define AWB_CTRL3_ADVANCED (0x80U) /* AWB mode select - Advanced AWB */ 254 #define AWB_CTRL3_SIMPLE (0x00U) /* AWB mode select - Simple AWB */ 255 256 #define AWB_CTRL4 (0x6CU) /* AWB Control 4 */ 257 #define AWB_CTRL5 (0x6DU) /* AWB Control 5 */ 258 #define AWB_CTRL6 (0x6EU) /* AWB Control 6 */ 259 #define AWB_CTRL7 (0x6FU) /* AWB Control 7 */ 260 #define AWB_CTRL8 (0x70U) /* AWB Control 8 */ 261 #define AWB_CTRL9 (0x71U) /* AWB Control 9 */ 262 #define AWB_CTRL10 (0x72U) /* AWB Control 10 */ 263 #define AWB_CTRL11 (0x73U) /* AWB Control 11 */ 264 #define AWB_CTRL12 (0x74U) /* AWB Control 12 */ 265 #define AWB_CTRL13 (0x75U) /* AWB Control 13 */ 266 #define AWB_CTRL14 (0x76U) /* AWB Control 14 */ 267 #define AWB_CTRL15 (0x77U) /* AWB Control 15 */ 268 #define AWB_CTRL16 (0x78U) /* AWB Control 16 */ 269 #define AWB_CTRL17 (0x79U) /* AWB Control 17 */ 270 #define AWB_CTRL18 (0x7AU) /* AWB Control 18 */ 271 #define AWB_CTRL19 (0x7BU) /* AWB Control 19 */ 272 #define AWB_CTRL20 (0x7CU) /* AWB Control 20 */ 273 #define AWB_CTRL21 (0x7DU) /* AWB Control 21 */ 274 #define GAM1 (0x7EU) /* Gamma Curve 1st Segment Input End Point (0x04U) Output Value */ 275 #define GAM2 (0x7FU) /* Gamma Curve 2nd Segment Input End Point (0x08U) Output Value */ 276 #define GAM3 (0x80U) /* Gamma Curve 3rd Segment Input End Point (0x10U) Output Value */ 277 #define GAM4 (0x81U) /* Gamma Curve 4th Segment Input End Point (0x20U) Output Value */ 278 #define GAM5 (0x82U) /* Gamma Curve 5th Segment Input End Point (0x28U) Output Value */ 279 #define GAM6 (0x83U) /* Gamma Curve 6th Segment Input End Point (0x30U) Output Value */ 280 #define GAM7 (0x84U) /* Gamma Curve 7th Segment Input End Point (0x38U) Output Value */ 281 #define GAM8 (0x85U) /* Gamma Curve 8th Segment Input End Point (0x40U) Output Value */ 282 #define GAM9 (0x86U) /* Gamma Curve 9th Segment Input End Point (0x48U) Output Value */ 283 #define GAM10 (0x87U) /* Gamma Curve 10th Segment Input End Point (0x50U) Output Value */ 284 #define GAM11 (0x88U) /* Gamma Curve 11th Segment Input End Point (0x60U) Output Value */ 285 #define GAM12 (0x89U) /* Gamma Curve 12th Segment Input End Point (0x70U) Output Value */ 286 #define GAM13 (0x8AU) /* Gamma Curve 13th Segment Input End Point (0x90U) Output Value */ 287 #define GAM14 (0x8BU) /* Gamma Curve 14th Segment Input End Point (0xB0U) Output Value */ 288 #define GAM15 (0x8CU) /* Gamma Curve 15th Segment Input End Point (0xD0U) Output Value */ 289 #define SLOP (0x8DU) /* Gamma Curve Highest Segment Slope */ 290 #define DNSTH (0x8EU) /* De-noise Threshold */ 291 #define EDGE0 (0x8FU) /* Edge Enhancement Strength Control */ 292 #define EDGE1 (0x90U) /* Edge Enhancement Threshold Control */ 293 #define DNSOFF (0x91U) /* Auto De-noise Threshold Control */ 294 #define EDGE2 (0x92U) /* Edge Enhancement Strength Upper Limit */ 295 #define EDGE3 (0x93U) /* Edge Enhancement Strength Upper Limit */ 296 #define MTX1 (0x94U) /* Matrix Coefficient 1 */ 297 #define MTX2 (0x95U) /* Matrix Coefficient 2 */ 298 #define MTX3 (0x96U) /* Matrix Coefficient 3 */ 299 #define MTX4 (0x97U) /* Matrix Coefficient 4 */ 300 #define MTX5 (0x98U) /* Matrix Coefficient 5 */ 301 #define MTX6 (0x99U) /* Matrix Coefficient 6 */ 302 303 #define MTX_CTRL (0x9AU) /* Matrix Control */ 304 #define MTX_CTRL_DBL_EN (0x80U) /* Matrix double ON/OFF selection */ 305 306 #define BRIGHTNESS (0x9BU) /* Brightness Control */ 307 #define CONTRAST (0x9CU) /* Contrast Gain */ 308 #define UVADJ0 (0x9EU) /* Auto UV Adjust Control 0 */ 309 #define UVADJ1 (0x9FU) /* Auto UV Adjust Control 1 */ 310 #define SCAL0 (0xA0U) /* DCW Ratio Control */ 311 #define SCAL1 (0xA1U) /* Horizontal Zoom Out Control */ 312 #define SCAL2 (0xA2U) /* Vertical Zoom Out Control */ 313 #define FIFODLYM (0xA3U) /* FIFO Manual Mode Delay Control */ 314 #define FIFODLYA (0xA4U) /* FIFO Auto Mode Delay Control */ 315 316 #define SDE (0xA6U) /* Special Digital Effect Control */ 317 #define SDE_NEGATIVE_EN (0x40U) /* Negative image enable */ 318 #define SDE_GRAYSCALE_EN (0x20U) /* Gray scale image enable */ 319 #define SDE_V_FIXED_EN (0x10U) /* V fixed value enable */ 320 #define SDE_U_FIXED_EN (0x08U) /* U fixed value enable */ 321 #define SDE_CONT_BRIGHT_EN (0x04U) /* Contrast/Brightness enable */ 322 #define SDE_SATURATION_EN (0x02U) /* Saturation enable */ 323 #define SDE_HUE_EN (0x01U) /* Hue enable */ 324 325 #define USAT (0xA7U) /* U Component Saturation Gain */ 326 #define VSAT (0xA8U) /* V Component Saturation Gain */ 327 #define HUECOS (0xA9U) /* Cosine value × (0x80U) */ 328 #define HUESIN (0xAAU) /* Sine value × (0x80U) */ 329 #define SIGN_BIT (0xABU) /* Sign Bit for Hue and Brightness */ 330 331 #define DSPAUTO (0xACU) /* DSP Auto Function ON/OFF Control */ 332 #define DSPAUTO_AWB_EN (0x80U) /* AWB auto threshold control */ 333 #define DSPAUTO_DENOISE_EN (0x40U) /* De-noise auto threshold control */ 334 #define DSPAUTO_EDGE_EN (0x20U) /* Sharpness (edge enhancement) auto strength control */ 335 #define DSPAUTO_UV_EN (0x10U) /* UV adjust auto slope control */ 336 #define DSPAUTO_SCAL0_EN (0x08U) /* Auto scaling factor control (register SCAL0 ((0xA0U))) */ 337 #define DSPAUTO_SCAL1_EN (0x04U) /* Auto scaling factor control (registers SCAL1 ((0xA1U) and SCAL2 ((0xA2U)))*/ 338 339 #ifdef __cplusplus 340 extern "C" { 341 #endif 342 343 /* 344 * ov7725 initialization routine 345 */ 346 hpm_stat_t ov7725_init(camera_context_t *context, camera_config_t *ov_config); 347 348 /* 349 * ov7725 read register 350 */ 351 hpm_stat_t ov7725_read_register(camera_context_t *context, uint8_t reg, uint8_t *buf); 352 353 /* 354 * ov7725 write register 355 */ 356 hpm_stat_t ov7725_write_register(camera_context_t *context, uint8_t reg, uint8_t val); 357 358 /* 359 * ov7725 reset 360 */ 361 hpm_stat_t ov7725_software_reset(camera_context_t *context); 362 363 /* 364 * ov7725 check chip id 365 */ 366 hpm_stat_t ov7725_check_chip_id(camera_context_t *context); 367 368 /** 369 * @brief ov7725 power up 370 * 371 * @param [in] context camera_context_t 372 */ 373 void ov7725_power_up(camera_context_t *context); 374 375 #ifdef __cplusplus 376 } 377 #endif 378 #endif /* HPM_OV7725_H */ 379