1 /**
2 ******************************************************************************
3 * @file stm32f4xx_gpio.c
4 * @author MCD Application Team
5 * @version V1.4.0
6 * @date 04-August-2014
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the GPIO peripheral:
9 * + Initialization and Configuration
10 * + GPIO Read and Write
11 * + GPIO Alternate functions configuration
12 *
13 @verbatim
14 ===============================================================================
15 ##### How to use this driver #####
16 ===============================================================================
17 [..]
18 (#) Enable the GPIO AHB clock using the following function
19 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
20
21 (#) Configure the GPIO pin(s) using GPIO_Init()
22 Four possible configuration are available for each pin:
23 (++) Input: Floating, Pull-up, Pull-down.
24 (++) Output: Push-Pull (Pull-up, Pull-down or no Pull)
25 Open Drain (Pull-up, Pull-down or no Pull). In output mode, the speed
26 is configurable: 2 MHz, 25 MHz, 50 MHz or 100 MHz.
27 (++) Alternate Function: Push-Pull (Pull-up, Pull-down or no Pull) Open
28 Drain (Pull-up, Pull-down or no Pull).
29 (++) Analog: required mode when a pin is to be used as ADC channel or DAC
30 output.
31
32 (#) Peripherals alternate function:
33 (++) For ADC and DAC, configure the desired pin in analog mode using
34 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AN;
35 (+++) For other peripherals (TIM, USART...):
36 (+++) Connect the pin to the desired peripherals' Alternate
37 Function (AF) using GPIO_PinAFConfig() function
38 (+++) Configure the desired pin in alternate function mode using
39 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
40 (+++) Select the type, pull-up/pull-down and output speed via
41 GPIO_PuPd, GPIO_OType and GPIO_Speed members
42 (+++) Call GPIO_Init() function
43
44 (#) To get the level of a pin configured in input mode use GPIO_ReadInputDataBit()
45
46 (#) To set/reset the level of a pin configured in output mode use
47 GPIO_SetBits()/GPIO_ResetBits()
48
49 (#) During and just after reset, the alternate functions are not
50 active and the GPIO pins are configured in input floating mode (except JTAG
51 pins).
52
53 (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
54 (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
55 priority over the GPIO function.
56
57 (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
58 general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
59 The HSE has priority over the GPIO function.
60
61 @endverbatim
62 *
63 ******************************************************************************
64 * @attention
65 *
66 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
67 *
68 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
69 * You may not use this file except in compliance with the License.
70 * You may obtain a copy of the License at:
71 *
72 * http://www.st.com/software_license_agreement_liberty_v2
73 *
74 * Unless required by applicable law or agreed to in writing, software
75 * distributed under the License is distributed on an "AS IS" BASIS,
76 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
77 * See the License for the specific language governing permissions and
78 * limitations under the License.
79 *
80 ******************************************************************************
81 */
82
83 /* Includes ------------------------------------------------------------------*/
84 #include "stm32f4xx_gpio.h"
85 #include "stm32f4xx_rcc.h"
86 #include "stm32f4xx_conf.h"
87
88 /** @addtogroup STM32F4xx_StdPeriph_Driver
89 * @{
90 */
91
92 /** @defgroup GPIO
93 * @brief GPIO driver modules
94 * @{
95 */
96
97 /* Private typedef -----------------------------------------------------------*/
98 /* Private define ------------------------------------------------------------*/
99 /* Private macro -------------------------------------------------------------*/
100 /* Private variables ---------------------------------------------------------*/
101 /* Private function prototypes -----------------------------------------------*/
102 /* Private functions ---------------------------------------------------------*/
103
104 /** @defgroup GPIO_Private_Functions
105 * @{
106 */
107
108 /** @defgroup GPIO_Group1 Initialization and Configuration
109 * @brief Initialization and Configuration
110 *
111 @verbatim
112 ===============================================================================
113 ##### Initialization and Configuration #####
114 ===============================================================================
115
116 @endverbatim
117 * @{
118 */
119
120 /**
121 * @brief De-initializes the GPIOx peripheral registers to their default reset values.
122 * @note By default, The GPIO pins are configured in input floating mode (except JTAG pins).
123 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
124 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
125 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
126 * @retval None
127 */
GPIO_DeInit(GPIO_TypeDef * GPIOx)128 void GPIO_DeInit(GPIO_TypeDef* GPIOx)
129 {
130 /* Check the parameters */
131 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
132
133 if (GPIOx == GPIOA)
134 {
135 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, ENABLE);
136 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, DISABLE);
137 }
138 else if (GPIOx == GPIOB)
139 {
140 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, ENABLE);
141 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, DISABLE);
142 }
143 else if (GPIOx == GPIOC)
144 {
145 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, ENABLE);
146 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, DISABLE);
147 }
148 else if (GPIOx == GPIOD)
149 {
150 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, ENABLE);
151 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, DISABLE);
152 }
153 else if (GPIOx == GPIOE)
154 {
155 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, ENABLE);
156 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, DISABLE);
157 }
158 else if (GPIOx == GPIOF)
159 {
160 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, ENABLE);
161 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, DISABLE);
162 }
163 else if (GPIOx == GPIOG)
164 {
165 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, ENABLE);
166 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, DISABLE);
167 }
168 else if (GPIOx == GPIOH)
169 {
170 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, ENABLE);
171 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, DISABLE);
172 }
173
174 else if (GPIOx == GPIOI)
175 {
176 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, ENABLE);
177 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, DISABLE);
178 }
179 else if (GPIOx == GPIOJ)
180 {
181 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOJ, ENABLE);
182 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOJ, DISABLE);
183 }
184 else
185 {
186 if (GPIOx == GPIOK)
187 {
188 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOK, ENABLE);
189 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOK, DISABLE);
190 }
191 }
192 }
193
194 /**
195 * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_InitStruct.
196 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
197 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
198 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
199 * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that contains
200 * the configuration information for the specified GPIO peripheral.
201 * @retval None
202 */
GPIO_Init(GPIO_TypeDef * GPIOx,GPIO_InitTypeDef * GPIO_InitStruct)203 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
204 {
205 uint32_t pinpos = 0x00, pos = 0x00 , currentpin = 0x00;
206
207 /* Check the parameters */
208 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
209 assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
210 assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
211 assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd));
212
213 /* ------------------------- Configure the port pins ---------------- */
214 /*-- GPIO Mode Configuration --*/
215 for (pinpos = 0x00; pinpos < 0x10; pinpos++)
216 {
217 pos = ((uint32_t)0x01) << pinpos;
218 /* Get the port pins position */
219 currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
220
221 if (currentpin == pos)
222 {
223 GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (pinpos * 2));
224 GPIOx->MODER |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2));
225
226 if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF))
227 {
228 /* Check Speed mode parameters */
229 assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
230
231 /* Speed mode configuration */
232 GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pinpos * 2));
233 GPIOx->OSPEEDR |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2));
234
235 /* Check Output mode parameters */
236 assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType));
237
238 /* Output mode configuration*/
239 GPIOx->OTYPER &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pinpos)) ;
240 GPIOx->OTYPER |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos));
241 }
242
243 /* Pull-up Pull down resistor configuration*/
244 GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pinpos * 2));
245 GPIOx->PUPDR |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2));
246 }
247 }
248 }
249
250 /**
251 * @brief Fills each GPIO_InitStruct member with its default value.
252 * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will be initialized.
253 * @retval None
254 */
GPIO_StructInit(GPIO_InitTypeDef * GPIO_InitStruct)255 void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
256 {
257 /* Reset GPIO init structure parameters values */
258 GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
259 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN;
260 GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
261 GPIO_InitStruct->GPIO_OType = GPIO_OType_PP;
262 GPIO_InitStruct->GPIO_PuPd = GPIO_PuPd_NOPULL;
263 }
264
265 /**
266 * @brief Locks GPIO Pins configuration registers.
267 * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
268 * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
269 * @note The configuration of the locked GPIO pins can no longer be modified
270 * until the next reset.
271 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
272 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
273 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
274 * @param GPIO_Pin: specifies the port bit to be locked.
275 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
276 * @retval None
277 */
GPIO_PinLockConfig(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)278 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
279 {
280 __IO uint32_t tmp = 0x00010000;
281
282 /* Check the parameters */
283 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
284 assert_param(IS_GPIO_PIN(GPIO_Pin));
285
286 tmp |= GPIO_Pin;
287 /* Set LCKK bit */
288 GPIOx->LCKR = tmp;
289 /* Reset LCKK bit */
290 GPIOx->LCKR = GPIO_Pin;
291 /* Set LCKK bit */
292 GPIOx->LCKR = tmp;
293 /* Read LCKK bit*/
294 tmp = GPIOx->LCKR;
295 /* Read LCKK bit*/
296 tmp = GPIOx->LCKR;
297 }
298
299 /**
300 * @}
301 */
302
303 /** @defgroup GPIO_Group2 GPIO Read and Write
304 * @brief GPIO Read and Write
305 *
306 @verbatim
307 ===============================================================================
308 ##### GPIO Read and Write #####
309 ===============================================================================
310
311 @endverbatim
312 * @{
313 */
314
315 /**
316 * @brief Reads the specified input port pin.
317 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
318 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
319 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
320 * @param GPIO_Pin: specifies the port bit to read.
321 * This parameter can be GPIO_Pin_x where x can be (0..15).
322 * @retval The input port pin value.
323 */
GPIO_ReadInputDataBit(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)324 uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
325 {
326 uint8_t bitstatus = 0x00;
327
328 /* Check the parameters */
329 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
330 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
331
332 if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
333 {
334 bitstatus = (uint8_t)Bit_SET;
335 }
336 else
337 {
338 bitstatus = (uint8_t)Bit_RESET;
339 }
340 return bitstatus;
341 }
342
343 /**
344 * @brief Reads the specified GPIO input data port.
345 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
346 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
347 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
348 * @retval GPIO input data port value.
349 */
GPIO_ReadInputData(GPIO_TypeDef * GPIOx)350 uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
351 {
352 /* Check the parameters */
353 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
354
355 return ((uint16_t)GPIOx->IDR);
356 }
357
358 /**
359 * @brief Reads the specified output data port bit.
360 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
361 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
362 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
363 * @param GPIO_Pin: specifies the port bit to read.
364 * This parameter can be GPIO_Pin_x where x can be (0..15).
365 * @retval The output port pin value.
366 */
GPIO_ReadOutputDataBit(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)367 uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
368 {
369 uint8_t bitstatus = 0x00;
370
371 /* Check the parameters */
372 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
373 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
374
375 if (((GPIOx->ODR) & GPIO_Pin) != (uint32_t)Bit_RESET)
376 {
377 bitstatus = (uint8_t)Bit_SET;
378 }
379 else
380 {
381 bitstatus = (uint8_t)Bit_RESET;
382 }
383 return bitstatus;
384 }
385
386 /**
387 * @brief Reads the specified GPIO output data port.
388 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
389 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
390 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
391 * @retval GPIO output data port value.
392 */
GPIO_ReadOutputData(GPIO_TypeDef * GPIOx)393 uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
394 {
395 /* Check the parameters */
396 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
397
398 return ((uint16_t)GPIOx->ODR);
399 }
400
401 /**
402 * @brief Sets the selected data port bits.
403 * @note This functions uses GPIOx_BSRR register to allow atomic read/modify
404 * accesses. In this way, there is no risk of an IRQ occurring between
405 * the read and the modify access.
406 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
407 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
408 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
409 * @param GPIO_Pin: specifies the port bits to be written.
410 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
411 * @retval None
412 */
GPIO_SetBits(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)413 void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
414 {
415 /* Check the parameters */
416 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
417 assert_param(IS_GPIO_PIN(GPIO_Pin));
418
419 GPIOx->BSRRL = GPIO_Pin;
420 }
421
422 /**
423 * @brief Clears the selected data port bits.
424 * @note This functions uses GPIOx_BSRR register to allow atomic read/modify
425 * accesses. In this way, there is no risk of an IRQ occurring between
426 * the read and the modify access.
427 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
428 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
429 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
430 * @param GPIO_Pin: specifies the port bits to be written.
431 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
432 * @retval None
433 */
GPIO_ResetBits(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)434 void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
435 {
436 /* Check the parameters */
437 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
438 assert_param(IS_GPIO_PIN(GPIO_Pin));
439
440 GPIOx->BSRRH = GPIO_Pin;
441 }
442
443 /**
444 * @brief Sets or clears the selected data port bit.
445 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
446 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
447 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
448 * @param GPIO_Pin: specifies the port bit to be written.
449 * This parameter can be one of GPIO_Pin_x where x can be (0..15).
450 * @param BitVal: specifies the value to be written to the selected bit.
451 * This parameter can be one of the BitAction enum values:
452 * @arg Bit_RESET: to clear the port pin
453 * @arg Bit_SET: to set the port pin
454 * @retval None
455 */
GPIO_WriteBit(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,BitAction BitVal)456 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
457 {
458 /* Check the parameters */
459 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
460 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
461 assert_param(IS_GPIO_BIT_ACTION(BitVal));
462
463 if (BitVal != Bit_RESET)
464 {
465 GPIOx->BSRRL = GPIO_Pin;
466 }
467 else
468 {
469 GPIOx->BSRRH = GPIO_Pin ;
470 }
471 }
472
473 /**
474 * @brief Writes data to the specified GPIO data port.
475 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
476 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
477 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
478 * @param PortVal: specifies the value to be written to the port output data register.
479 * @retval None
480 */
GPIO_Write(GPIO_TypeDef * GPIOx,uint16_t PortVal)481 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
482 {
483 /* Check the parameters */
484 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
485
486 GPIOx->ODR = PortVal;
487 }
488
489 /**
490 * @brief Toggles the specified GPIO pins..
491 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
492 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
493 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
494 * @param GPIO_Pin: Specifies the pins to be toggled.
495 * @retval None
496 */
GPIO_ToggleBits(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)497 void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
498 {
499 /* Check the parameters */
500 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
501
502 GPIOx->ODR ^= GPIO_Pin;
503 }
504
505 /**
506 * @}
507 */
508
509 /** @defgroup GPIO_Group3 GPIO Alternate functions configuration function
510 * @brief GPIO Alternate functions configuration function
511 *
512 @verbatim
513 ===============================================================================
514 ##### GPIO Alternate functions configuration function #####
515 ===============================================================================
516
517 @endverbatim
518 * @{
519 */
520
521 /**
522 * @brief Changes the mapping of the specified pin.
523 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices
524 * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices.
525 * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices.
526 * @param GPIO_PinSource: specifies the pin for the Alternate function.
527 * This parameter can be GPIO_PinSourcex where x can be (0..15).
528 * @param GPIO_AFSelection: selects the pin to used as Alternate function.
529 * This parameter can be one of the following values:
530 * @arg GPIO_AF_RTC_50Hz: Connect RTC_50Hz pin to AF0 (default after reset)
531 * @arg GPIO_AF_MCO: Connect MCO pin (MCO1 and MCO2) to AF0 (default after reset)
532 * @arg GPIO_AF_TAMPER: Connect TAMPER pins (TAMPER_1 and TAMPER_2) to AF0 (default after reset)
533 * @arg GPIO_AF_SWJ: Connect SWJ pins (SWD and JTAG)to AF0 (default after reset)
534 * @arg GPIO_AF_TRACE: Connect TRACE pins to AF0 (default after reset)
535 * @arg GPIO_AF_TIM1: Connect TIM1 pins to AF1
536 * @arg GPIO_AF_TIM2: Connect TIM2 pins to AF1
537 * @arg GPIO_AF_TIM3: Connect TIM3 pins to AF2
538 * @arg GPIO_AF_TIM4: Connect TIM4 pins to AF2
539 * @arg GPIO_AF_TIM5: Connect TIM5 pins to AF2
540 * @arg GPIO_AF_TIM8: Connect TIM8 pins to AF3
541 * @arg GPIO_AF_TIM9: Connect TIM9 pins to AF3
542 * @arg GPIO_AF_TIM10: Connect TIM10 pins to AF3
543 * @arg GPIO_AF_TIM11: Connect TIM11 pins to AF3
544 * @arg GPIO_AF_I2C1: Connect I2C1 pins to AF4
545 * @arg GPIO_AF_I2C2: Connect I2C2 pins to AF4
546 * @arg GPIO_AF_I2C3: Connect I2C3 pins to AF4
547 * @arg GPIO_AF_SPI1: Connect SPI1 pins to AF5
548 * @arg GPIO_AF_SPI2: Connect SPI2/I2S2 pins to AF5
549 * @arg GPIO_AF_SPI4: Connect SPI4 pins to AF5
550 * @arg GPIO_AF_SPI5: Connect SPI5 pins to AF5
551 * @arg GPIO_AF_SPI6: Connect SPI6 pins to AF5
552 * @arg GPIO_AF_SAI1: Connect SAI1 pins to AF6 for STM32F42xxx/43xxx devices.
553 * @arg GPIO_AF_SPI3: Connect SPI3/I2S3 pins to AF6
554 * @arg GPIO_AF_I2S3ext: Connect I2S3ext pins to AF7
555 * @arg GPIO_AF_USART1: Connect USART1 pins to AF7
556 * @arg GPIO_AF_USART2: Connect USART2 pins to AF7
557 * @arg GPIO_AF_USART3: Connect USART3 pins to AF7
558 * @arg GPIO_AF_UART4: Connect UART4 pins to AF8
559 * @arg GPIO_AF_UART5: Connect UART5 pins to AF8
560 * @arg GPIO_AF_USART6: Connect USART6 pins to AF8
561 * @arg GPIO_AF_UART7: Connect UART7 pins to AF8
562 * @arg GPIO_AF_UART8: Connect UART8 pins to AF8
563 * @arg GPIO_AF_CAN1: Connect CAN1 pins to AF9
564 * @arg GPIO_AF_CAN2: Connect CAN2 pins to AF9
565 * @arg GPIO_AF_TIM12: Connect TIM12 pins to AF9
566 * @arg GPIO_AF_TIM13: Connect TIM13 pins to AF9
567 * @arg GPIO_AF_TIM14: Connect TIM14 pins to AF9
568 * @arg GPIO_AF_OTG_FS: Connect OTG_FS pins to AF10
569 * @arg GPIO_AF_OTG_HS: Connect OTG_HS pins to AF10
570 * @arg GPIO_AF_ETH: Connect ETHERNET pins to AF11
571 * @arg GPIO_AF_FSMC: Connect FSMC pins to AF12
572 * @arg GPIO_AF_FMC: Connect FMC pins to AF12 for STM32F42xxx/43xxx devices.
573 * @arg GPIO_AF_OTG_HS_FS: Connect OTG HS (configured in FS) pins to AF12
574 * @arg GPIO_AF_SDIO: Connect SDIO pins to AF12
575 * @arg GPIO_AF_DCMI: Connect DCMI pins to AF13
576 * @arg GPIO_AF_LTDC: Connect LTDC pins to AF14 for STM32F429xx/439xx devices.
577 * @arg GPIO_AF_EVENTOUT: Connect EVENTOUT pins to AF15
578 * @retval None
579 */
GPIO_PinAFConfig(GPIO_TypeDef * GPIOx,uint16_t GPIO_PinSource,uint8_t GPIO_AF)580 void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF)
581 {
582 uint32_t temp = 0x00;
583 uint32_t temp_2 = 0x00;
584
585 /* Check the parameters */
586 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
587 assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
588 assert_param(IS_GPIO_AF(GPIO_AF));
589
590 temp = ((uint32_t)(GPIO_AF) << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ;
591 GPIOx->AFR[GPIO_PinSource >> 0x03] &= ~((uint32_t)0xF << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ;
592 temp_2 = GPIOx->AFR[GPIO_PinSource >> 0x03] | temp;
593 GPIOx->AFR[GPIO_PinSource >> 0x03] = temp_2;
594 }
595
596 /**
597 * @}
598 */
599
600 /**
601 * @}
602 */
603
604 /**
605 * @}
606 */
607
608 /**
609 * @}
610 */
611
612 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
613