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1 /*
2  * Copyright (C) 2022 HiSilicon (Shanghai) Technologies CO., LIMITED.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version 2
7  * of the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
17  */
18 
19 #ifndef __DRV_GPIO_STRUCT_H__
20 #define __DRV_GPIO_STRUCT_H__
21 
22 #include "hi_type.h"
23 
24 typedef enum {
25     HI_GPIO_0_VIR_ADDR = 0,
26     HI_GPIO_1_VIR_ADDR,
27     HI_GPIO_2_VIR_ADDR,
28     HI_GPIO_3_VIR_ADDR,
29     HI_GPIO_4_VIR_ADDR,
30     HI_GPIO_5_VIR_ADDR,
31     HI_GPIO_6_VIR_ADDR,
32     HI_GPIO_7_VIR_ADDR,
33     HI_GPIO_8_VIR_ADDR,
34     HI_GPIO_9_VIR_ADDR,
35 
36     /* V350 :GPIO_10-GPIO_15 is reserved */
37     HI_GPIO_10_VIR_ADDR,
38     HI_GPIO_11_VIR_ADDR,
39     HI_GPIO_12_VIR_ADDR,
40     HI_GPIO_13_VIR_ADDR,
41     HI_GPIO_14_VIR_ADDR,
42     HI_GPIO_15_VIR_ADDR,
43 
44     HI_GPIO_18_VIR_ADDR, /* STB_GPIO_PWM18 */
45     HI_GPIO_19_VIR_ADDR, /* STB_GPIO_PWM19 */
46     HI_GPIO_20_VIR_ADDR, /* STB_GPIO_PWM20 */
47     /* V350 :GPIO_21、GPIO_22 is reserved */
48     HI_GPIO_21_VIR_ADDR, /* STB_GPIO_PWM21 */
49     HI_GPIO_22_VIR_ADDR, /* STB_GPIO_PWM22 */
50 
51     HI_GPIO_VIR_ADDR_BUTT,
52 } gpio_viraddr_index;
53 
54 typedef enum {
55     GPIO_INTTYPE_UP,
56     /** <spring by the up edge */ /** < CNcomment:上升沿触发 */
57     GPIO_INTTYPE_DOWN,
58     /** <spring by the down edge */ /** < CNcomment:下降沿触发 */
59     GPIO_INTTYPE_UPDOWN,
60     /** <spring by both the up and down edge */ /** < CNcomment:双沿触发 */
61     GPIO_INTTYPE_HIGH,
62     /** <spring by the high level */ /** < CNcomment:高电平触发 */
63     GPIO_INTTYPE_LOW,
64     /** <spring by the low level */ /** < CNcomment:低电平触发 */
65     GPIO_INTTYPE_BUTT,
66     /** <Invalid value */ /** < CNcomment:非法边界值 */
67 } gpio_inttpye;
68 
69 typedef struct {
70     HI_U8 gpio_grp_num; /* gpio group number */
71     HI_U8 gpio_max_num; /* gpio  max number */
72 } gpio_get_gpionum;
73 
74 typedef struct {
75     hi_u32 gpio_no;
76     hi_u32 b_enable;
77     gpio_inttpye en_int_type; /* gpio interrupt trigger mode */
78 } gpio_data;
79 
80 typedef struct {
81     hi_u32 gpio_no;
82     hi_u32 timeout_ms;
83 } gpio_int;
84 
85 #endif /* End of #ifndef __HI_GPIO_STRUCT_H__ */
86