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1 /*
2  * Copyright (c) 2022 FuZhou Lockzhiner Electronic Co., Ltd. All rights reserved.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 /**
17  * @addtogroup Lockzhiner
18  */
19 
20 /**
21  * @file pinctrl.h
22  *
23  * @brief pinctrl.
24  */
25 
26 #ifndef LZ_HARDWARE_PINCTRL_H
27 #define LZ_HARDWARE_PINCTRL_H
28 
29 #include "lz_hardware/gpio.h"
30 #include "lz_hardware/errno.h"
31 
32 typedef enum {
33     MUX_FUNC0 = 0,
34     MUX_FUNC1,
35     MUX_FUNC2,
36     MUX_FUNC3,
37     MUX_FUNC4,
38     MUX_FUNC5,
39     MUX_FUNC6,
40     MUX_FUNC7,
41     /** keep the last iomux function, no set */
42     MUX_KEEP,
43 } MuxFunc;
44 #define MUX_GPIO MUX_FUNC0
45 
46 typedef enum {
47     /** high-z */
48     PULL_NONE,
49     /** pull up */
50     PULL_UP,
51     /** pull down */
52     PULL_DOWN,
53     /** keep the last pull type, no set */
54     PULL_KEEP,
55 } PullType;
56 
57 typedef enum {
58     DRIVE_LEVEL0,
59     DRIVE_LEVEL1,
60     DRIVE_LEVEL2,
61     DRIVE_LEVEL3,
62     DRIVE_LEVEL4,
63     DRIVE_LEVEL5,
64     DRIVE_LEVEL6,
65     DRIVE_LEVEL7,
66     /** keep the last drive level, no set */
67     DRIVE_KEEP,
68 } DriveLevel;
69 
70 typedef enum {
71     FUNC_ID_CIF,
72     FUNC_ID_EMMC,
73     FUNC_ID_FLASH,
74     FUNC_ID_FSPI,
75     FUNC_ID_LCDC,
76     FUNC_ID_MIPICSI,
77     FUNC_ID_RGMII,
78     FUNC_ID_GMAC0,
79     FUNC_ID_GMAC1,
80     FUNC_ID_SDIO,
81     FUNC_ID_SDMMC0,
82     FUNC_ID_CAN0,
83     FUNC_ID_CAN1,
84     FUNC_ID_CAN2,
85     FUNC_ID_CAN3,
86     FUNC_ID_CAN4,
87     FUNC_ID_CAN5,
88     FUNC_ID_I2C0,
89     FUNC_ID_I2C1,
90     FUNC_ID_I2C2,
91     FUNC_ID_I2C3,
92     FUNC_ID_I2C4,
93     FUNC_ID_I2C5,
94     FUNC_ID_I2S0,
95     FUNC_ID_I2S1,
96     FUNC_ID_I2S2,
97     FUNC_ID_PWM0,
98     FUNC_ID_PWM1,
99     FUNC_ID_PWM2,
100     FUNC_ID_PWM3,
101     FUNC_ID_PWM4,
102     FUNC_ID_PWM5,
103     FUNC_ID_PWM6,
104     FUNC_ID_PWM7,
105     FUNC_ID_PWM8,
106     FUNC_ID_PWM9,
107     FUNC_ID_PWM10,
108     FUNC_ID_PWM11,
109     FUNC_ID_SPI0,
110     FUNC_ID_SPI1,
111     FUNC_ID_SPI2,
112     FUNC_ID_SPI3,
113     FUNC_ID_SPI4,
114     FUNC_ID_SPI5,
115     FUNC_ID_UART0,
116     FUNC_ID_UART1,
117     FUNC_ID_UART2,
118     FUNC_ID_UART3,
119     FUNC_ID_UART4,
120     FUNC_ID_UART5,
121     FUNC_ID_UART6,
122     FUNC_ID_UART7,
123     FUNC_ID_UART8,
124     FUNC_ID_UART9,
125     FUNC_ID_UART10,
126     FUNC_ID_UART11,
127     FUNC_ID_NONE,
128 } FuncID;
129 
130 typedef enum {
131     FUNC_MODE_M0,
132     FUNC_MODE_M1,
133     FUNC_MODE_M2,
134     FUNC_MODE_NONE,
135 } FuncMode;
136 
137 typedef struct _Pinctrl {
138     GpioID gpio;
139     MuxFunc func;
140     PullType type;
141     DriveLevel drv;
142     LzGpioDir dir;
143     LzGpioValue val;
144 } Pinctrl;
145 
146 /**
147  * @brief pinctrl: set pinctrl.
148  *
149  * @param gpio Indicates gpio ID.
150  * @param func Indicates iomux function.
151  * @param type Indicates pull type.
152  * @param drv Indicates drive level.
153  * @return Returns {@link LZ_HARDWARE_SUCCESS} if the pinctrl is set;
154  * returns {@link LZ_HARDWARE_FAILURE} otherwise. For details about other return values, see the chip description.
155  */
156 unsigned int PinctrlSet(GpioID gpio, MuxFunc func, PullType type, DriveLevel drv);
157 
158 /**
159  * @brief pinctrl: set pin function.
160  *
161  * @param id Indicates pin function id.
162  * @param mode Indicates pin function mode.
163  * @return Returns {@link LZ_HARDWARE_SUCCESS} if the pin function is selected successfully;
164  * returns {@link LZ_HARDWARE_FAILURE} otherwise. For details about other return values, see the chip description.
165  */
166 unsigned int PinfuncSel(FuncID id, FuncMode mode);
167 
PinctrlInit(Pinctrl pin)168 static inline unsigned int PinctrlInit(Pinctrl pin)
169 {
170     if (pin.gpio == INVALID_GPIO) {
171         return LZ_HARDWARE_SUCCESS;
172     }
173 
174     if (LzGpioInit(pin.gpio) != LZ_HARDWARE_SUCCESS) {
175         return LZ_HARDWARE_FAILURE;
176     }
177 
178     PinctrlSet(pin.gpio, pin.func, pin.type, pin.drv);
179     LzGpioSetDir(pin.gpio, pin.dir);
180     LzGpioSetVal(pin.gpio, pin.val);
181 
182     return LZ_HARDWARE_SUCCESS;
183 }
184 
185 #endif