| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1723 unsigned OpReg = getRegForValue(TI->getOperand(0)); in X86SelectBranch() local
1758 unsigned OpReg = getRegForValue(BI->getCondition()); in X86SelectBranch() local
1781 unsigned CReg = 0, OpReg = 0; in X86SelectShift() local
2376 unsigned OpReg = getRegForValue(Opnd); in X86SelectSelect() local
2422 unsigned OpReg = getRegForValue(I->getOperand(0)); in X86SelectIntToFP() local
2477 unsigned OpReg = getRegForValue(I->getOperand(0)); in X86SelectFPExtOrFPTrunc() local
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| D | X86SpeculativeLoadHardening.cpp | 2034 Register OpReg = Op->getReg(); in hardenLoadAddr() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86InstComments.cpp | 217 unsigned OpReg = MI->getOperand(OperandIndex).getReg(); in getRegOperandNumElts() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 298 Register OpReg = MI->getOperand(I).getReg(); in optimizeSDPattern() local
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| D | ARMInstructionSelector.cpp | 1045 Register OpReg = I.getOperand(2).getReg(); in select() local
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| D | ARMFastISel.cpp | 1276 unsigned OpReg = getRegForValue(TI->getOperand(0)); in SelectBranch() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerMIPS32.cpp | 163 IValueT encodeRegister(const Operand *OpReg, RegSetWanted WantedRegSet, in encodeRegister()
172 IValueT encodeGPRegister(const Operand *OpReg, const char *RegName, in encodeGPRegister()
177 IValueT encodeFPRegister(const Operand *OpReg, const char *RegName, in encodeFPRegister()
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| D | IceAssemblerARM32.cpp | 540 IValueT encodeRegister(const Operand *OpReg, RegSetWanted WantedRegSet, in encodeRegister()
549 IValueT encodeGPRegister(const Operand *OpReg, const char *RegName, in encodeGPRegister()
554 IValueT encodeSRegister(const Operand *OpReg, const char *RegName, in encodeSRegister()
559 IValueT encodeDRegister(const Operand *OpReg, const char *RegName, in encodeDRegister()
564 IValueT encodeQRegister(const Operand *OpReg, const char *RegName, in encodeQRegister()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 1858 Register OpReg = MO.getReg(); in clearRegisterKills() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 1711 unsigned OpReg = getRegForValue(In); in selectFNeg() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 3515 Register OpReg = MI.getOperand(0).getReg(); in narrowScalarExtract() local
3582 Register OpReg = MI.getOperand(2).getReg(); in narrowScalarInsert() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 2326 Register OpReg = MI.getOperand(I).getReg(); in getImageMapping() local
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| D | SIInstrInfo.cpp | 4287 Register OpReg = Op.getReg(); in legalizeGenericOperand() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 4513 unsigned OpReg = Inst.getOperand(2).getReg(); in expandSge() local
5259 unsigned OpReg = Inst.getOperand(2).getReg(); in expandSeq() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 7181 unsigned OpReg = Inst.getOperand(i).getReg(); in checkLowRegisterList() local
7195 unsigned OpReg = Inst.getOperand(i).getReg(); in listContainsReg() local
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