1 /* 2 * Copyright (c) 2021-2022 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 9 #ifndef HPM_PLIC_SW_H 10 #define HPM_PLIC_SW_H 11 12 typedef struct { 13 __R uint8_t RESERVED0[4096]; /* 0x0 - 0xFFF: Reserved */ 14 __RW uint32_t PENDING; /* 0x1000: Pending status */ 15 __R uint8_t RESERVED1[4092]; /* 0x1004 - 0x1FFF: Reserved */ 16 __RW uint32_t INTEN; /* 0x2000: Interrupt enable */ 17 __R uint8_t RESERVED2[2088960]; /* 0x2004 - 0x200003: Reserved */ 18 __RW uint32_t CLAIM; /* 0x200004: Claim and complete. */ 19 } PLIC_SW_Type; 20 21 22 /* Bitfield definition for register: PENDING */ 23 /* 24 * INTERRUPT (RW) 25 * 26 * writing 1 to trigger software interrupt 27 */ 28 #define PLIC_SW_PENDING_INTERRUPT_MASK (0x2U) 29 #define PLIC_SW_PENDING_INTERRUPT_SHIFT (1U) 30 #define PLIC_SW_PENDING_INTERRUPT_SET(x) (((uint32_t)(x) << PLIC_SW_PENDING_INTERRUPT_SHIFT) & PLIC_SW_PENDING_INTERRUPT_MASK) 31 #define PLIC_SW_PENDING_INTERRUPT_GET(x) (((uint32_t)(x) & PLIC_SW_PENDING_INTERRUPT_MASK) >> PLIC_SW_PENDING_INTERRUPT_SHIFT) 32 33 /* Bitfield definition for register: INTEN */ 34 /* 35 * INTERRUPT (RW) 36 * 37 * enable software interrupt 38 */ 39 #define PLIC_SW_INTEN_INTERRUPT_MASK (0x1U) 40 #define PLIC_SW_INTEN_INTERRUPT_SHIFT (0U) 41 #define PLIC_SW_INTEN_INTERRUPT_SET(x) (((uint32_t)(x) << PLIC_SW_INTEN_INTERRUPT_SHIFT) & PLIC_SW_INTEN_INTERRUPT_MASK) 42 #define PLIC_SW_INTEN_INTERRUPT_GET(x) (((uint32_t)(x) & PLIC_SW_INTEN_INTERRUPT_MASK) >> PLIC_SW_INTEN_INTERRUPT_SHIFT) 43 44 /* Bitfield definition for register: CLAIM */ 45 /* 46 * INTERRUPT_ID (RW) 47 * 48 * On reads, indicating the interrupt source that has being claimed. On writes, indicating the interrupt source that has been handled (completed). 49 */ 50 #define PLIC_SW_CLAIM_INTERRUPT_ID_MASK (0x1U) 51 #define PLIC_SW_CLAIM_INTERRUPT_ID_SHIFT (0U) 52 #define PLIC_SW_CLAIM_INTERRUPT_ID_SET(x) (((uint32_t)(x) << PLIC_SW_CLAIM_INTERRUPT_ID_SHIFT) & PLIC_SW_CLAIM_INTERRUPT_ID_MASK) 53 #define PLIC_SW_CLAIM_INTERRUPT_ID_GET(x) (((uint32_t)(x) & PLIC_SW_CLAIM_INTERRUPT_ID_MASK) >> PLIC_SW_CLAIM_INTERRUPT_ID_SHIFT) 54 55 56 57 58 #endif /* HPM_PLIC_SW_H */