Searched defs:PLLP (Results 1 – 5 of 5) sorted by relevance
/device/soc/st/stm32f4xx/sdk/Drivers/STM32F4xx_HAL_Driver/Inc/ |
D | stm32f4xx_ll_utils.h | 110 uint32_t PLLP; /*!< Division for the main system clock. member
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D | stm32f4xx_ll_rcc.h | 5558 …id LL_RCC_PLLI2S_ConfigDomain_SPDIFRX(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP) in LL_RCC_PLLI2S_ConfigDomain_SPDIFRX() 6205 …E void LL_RCC_PLLSAI_ConfigDomain_48M(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP) in LL_RCC_PLLSAI_ConfigDomain_48M()
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D | stm32f4xx_hal_rcc_ex.h | 62 uint32_t PLLP; /*!< PLLP: Division factor for main system clock (SYSCLK). member
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/device/soc/st/stm32f407zg/uniproton/board/common/STM32F4xx_StdPeriph_Driver/src/ |
D | stm32f4xx_rcc.c | 463 void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP, uint32_t PL… in RCC_PLLConfig()
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/device/soc/st/common/platform/stm32mp1xx_hal/STM32MP1xx_HAL_Driver/Inc/ |
D | stm32mp1xx_hal_rcc.h | 64 uint32_t PLLP; /*!< PLLP: Division factor ck_pll1_p member
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