1 /* 2 * linux-5.4/drivers/media/platform/sunxi-vin/vin-cci/csi_cci_reg.h 3 * 4 * Copyright (c) 2007-2017 Allwinnertech Co., Ltd. 5 * 6 * This software is licensed under the terms of the GNU General Public 7 * License version 2, as published by the Free Software Foundation, and 8 * may be copied, distributed, and modified under those terms. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 */ 16 17 18 /* 19 ****************************************************************************** 20 * 21 * csi_cci_reg.h 22 * 23 * Hawkview ISP - csi_cci_reg.h module 24 * 25 * Copyright (c) 2015 by Allwinnertech Co., Ltd. http://www.allwinnertech.com 26 * 27 * Version Author Date Description 28 * 29 * 3.0 Yang Feng 2015/12/02 ISP Tuning Tools Support 30 * 31 ****************************************************************************** 32 */ 33 34 #ifndef __CSI__CCI__REG__H__ 35 #define __CSI__CCI__REG__H__ 36 37 #define MAX_CSIC_CCI_NUM 4 38 #define CCI_HCLK (24*1000*1000) 39 #define FIFO_DEPTH 64 40 41 #include <linux/delay.h> 42 #ifdef _OS 43 #define CCI_INLINE inline 44 #define csi_cci_udelay(x) udelay(x) 45 #else 46 #define CCI_INLINE 47 #define csi_cci_udelay(x) udelay(x) 48 #endif 49 50 enum cci_io_vol { 51 LOW, 52 HIGH, 53 }; 54 55 enum cci_trans_mode { 56 SINGLE, 57 REPEAT, 58 }; 59 60 enum cci_rs_mode { 61 RESTART = 0, 62 STOP_START = 1, 63 }; 64 65 enum cci_rd_start { 66 START_WITH_ID_W = 0, 67 START_WITHOUT_ID_W = 1, 68 }; 69 70 enum cci_src { 71 FIFO = 0, 72 DRAM = 1, 73 }; 74 75 enum cci_packet_mode { 76 COMPACT = 0, 77 COMPLETE = 1, 78 }; 79 80 enum cci_trig_src { 81 NO_TRIG = 0, 82 CSI0_TRIG = 2, 83 CSI1_TRIG = 3, 84 }; 85 86 enum cci_trig_con { 87 TRIG_DEFAULT = 0, 88 TRIG_HREF_FIRST = 0, 89 TRIG_HREF_LAST = 1, 90 TRIG_LN_CNT = 2, 91 }; 92 93 struct cci_bus_fmt { 94 enum cci_rs_mode rs_mode; 95 enum cci_rd_start rs_start; 96 unsigned char saddr_7bit; 97 unsigned char wr_flag; 98 unsigned char addr_len; 99 unsigned char data_len; 100 }; 101 102 struct cci_tx_buf { 103 enum cci_src buf_src; 104 enum cci_packet_mode pkt_mode; 105 unsigned int pkt_cnt; 106 }; 107 108 struct cci_tx_trig { 109 enum cci_trig_src trig_src; 110 enum cci_trig_con trig_con; 111 }; 112 113 struct cci_int_status { 114 _Bool complete; 115 _Bool error; 116 }; 117 118 enum cci_int_sel { 119 CCI_INT_FINISH = 0X1, 120 CCI_INT_ERROR = 0X2, 121 CCI_INT_ALL = 0x3, 122 }; 123 124 struct cci_line_status { 125 enum cci_io_vol cci_sck; 126 enum cci_io_vol cci_sda; 127 }; 128 129 enum cci_bus_status { 130 BUS_ERR = 0x00, 131 START_TX = 0x08, 132 RPT_START_TX = 0x10, 133 ADDR_WR_TX_WI_ACK = 0x18, 134 ADDR_WR_TX_WO_ACK = 0x20, 135 DATA_TX_WI_ACK = 0x28, 136 DATA_TX_WO_ACK = 0x30, 137 ARBIT_LOST = 0x38, 138 ADDR_RD_TX_WI_ACK = 0x40, 139 ADDR_RD_TX_WO_ACK = 0x48, 140 DATA_RX_WI_ACK = 0x50, 141 DATA_RX_WO_ACK = 0x58, 142 ACK_TIMEOUT = 0x01, 143 NONE_DEFINED, 144 }; 145 146 int csi_cci_set_base_addr(unsigned int sel, unsigned long addr); 147 void csi_cci_enable(unsigned int sel); 148 void csi_cci_disable(unsigned int sel); 149 void csi_cci_reset(unsigned int sel); 150 void csi_cci_set_clk_div(unsigned int sel, unsigned char *div_coef); 151 /*interval unit in 40 scl cycles*/ 152 void csi_cci_set_pkt_interval(unsigned int sel, unsigned char interval); 153 /*timeout unit in scl cycle*/ 154 void csi_cci_set_ack_timeout(unsigned int sel, unsigned char to_val); 155 /*trig delay unit in scl cycle*/ 156 void csi_cci_set_trig_dly(unsigned int sel, unsigned int dly); 157 void csi_cci_trans_start(unsigned int sel, enum cci_trans_mode trans_mode); 158 unsigned int csi_cci_get_trans_done(unsigned int sel); 159 void csi_cci_set_bus_fmt(unsigned int sel, struct cci_bus_fmt *bus_fmt); 160 void csi_cci_set_tx_buf_mode(unsigned int sel, 161 struct cci_tx_buf *tx_buf_mode); 162 void csi_cci_fifo_pt_reset(unsigned int sel); 163 void csi_cci_fifo_pt_add(unsigned int sel, unsigned int byte_cnt); 164 void csi_cci_fifo_pt_sub(unsigned int sel, unsigned int byte_cnt); 165 void csi_cci_wr_tx_buf(unsigned int sel, unsigned char *buf, 166 unsigned int byte_cnt); 167 void csi_cci_rd_tx_buf(unsigned int sel, unsigned char *buf, 168 unsigned int byte_cnt); 169 void csi_cci_set_trig_mode(unsigned int sel, 170 struct cci_tx_trig *tx_trig_mode); 171 void csi_cci_set_trig_line_cnt(unsigned int sel, unsigned int line_cnt); 172 void cci_int_enable(unsigned int sel, enum cci_int_sel interrupt); 173 void cci_int_disable(unsigned int sel, enum cci_int_sel interrupt); 174 void CCI_INLINE cci_int_get_status(unsigned int sel, 175 struct cci_int_status *status); 176 void CCI_INLINE cci_int_clear_status(unsigned int sel, 177 enum cci_int_sel interrupt); 178 enum cci_bus_status CCI_INLINE cci_get_bus_status(unsigned int sel); 179 void cci_get_line_status(unsigned int sel, struct cci_line_status *status); 180 void cci_pad_en(unsigned int sel); 181 void cci_stop(unsigned int sel); 182 void cci_sck_cycles(unsigned int sel, unsigned int cycle_times); 183 void cci_print_info(unsigned int sel); 184 185 #endif /*__CSI__CCI__REG__H__*/ 186