1 /******************************************************************************
2 * Copyright (c) 2022 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
3 * All rights reserved.
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************/
18 /** @page UART
19 *
20 * Introduction
21 * ===============
22 * B91 supports two uart: uart0~ uart1.
23 *
24 * API Reference
25 * ===============
26 * Header File: uart.h
27 */
28 #ifndef UART_H_
29 #define UART_H_
30
31 #include "dma.h"
32 #include "gpio.h"
33 #include "reg_include/register_b91.h"
34 #include "timer.h"
35
36 extern unsigned char uart_rx_byte_index[2];
37 extern unsigned char uart_tx_byte_index[2];
38
39 #define uart_rtx_pin_tx_trig(uart_num) uart_clr_tx_done(uart_num)
40
41 /**********************************************************************************************************************
42 * global constants *
43 *********************************************************************************************************************/
44
45 /**********************************************************************************************************************
46 * global macro *
47 *********************************************************************************************************************/
48
49 /**********************************************************************************************************************
50 * global data type *
51 *********************************************************************************************************************/
52 /**
53 * @brief Define parity type
54 */
55 typedef enum {
56 UART_PARITY_NONE = 0,
57 UART_PARITY_EVEN,
58 UART_PARITY_ODD,
59 } uart_parity_e;
60
61 /**
62 * @brief Define UART chn
63 */
64 typedef enum {
65 UART0 = 0,
66 UART1,
67 } uart_num_e;
68
69 /**
70 * @brief Define mul bits
71 */
72 typedef enum {
73 UART_BW_MUL1 = 0,
74 UART_BW_MUL2 = 1,
75 UART_BW_MUL3 = 2,
76 UART_BW_MUL4 = 3,
77 } uart_timeout_mul_e;
78
79 /**
80 * @brief Define the length of stop bit
81 */
82 typedef enum {
83 UART_STOP_BIT_ONE = 0,
84 UART_STOP_BIT_ONE_DOT_FIVE = BIT(4),
85 UART_STOP_BIT_TWO = BIT(5),
86 } uart_stop_bit_e;
87
88 /**
89 * @brief Define UART RTS mode
90 */
91 typedef enum {
92 UART_RTS_MODE_AUTO = 0,
93 UART_RTS_MODE_MANUAL,
94 } uart_rts_mode_e;
95
96 /**
97 * @brief Define UART CTS pin : UART0(PA1 PB6 PD0), UART1(PC4 PD4 PE1)
98 */
99 typedef enum {
100 UART0_CTS_PA1 = GPIO_PA1,
101 UART0_CTS_PB6 = GPIO_PB6,
102 UART0_CTS_PD0 = GPIO_PD0,
103
104 UART1_CTS_PC4 = GPIO_PC4,
105 UART1_CTS_PD4 = GPIO_PD4,
106 UART1_CTS_PE1 = GPIO_PE1,
107 } uart_cts_pin_e;
108
109 /**
110 * @brief Define UART RTS pin : UART0(PA2 PB4 PD1), UART1(PC5 PD5 PE3)
111 */
112 typedef enum {
113 UART0_RTS_PA2 = GPIO_PA2,
114 UART0_RTS_PB4 = GPIO_PB4,
115 UART0_RTS_PD1 = GPIO_PD1,
116
117 UART1_RTS_PC5 = GPIO_PC5,
118 UART1_RTS_PD5 = GPIO_PD5,
119 UART1_RTS_PE3 = GPIO_PE3,
120 } uart_rts_pin_e;
121
122 /**
123 * @brief Define UART TX pin : UART0(PA3 PB2 PD2), UART1(PC6 PD6 PE0)
124 */
125 typedef enum {
126 UART0_TX_PA3 = GPIO_PA3,
127 UART0_TX_PB2 = GPIO_PB2,
128 UART0_TX_PD2 = GPIO_PD2,
129
130 UART1_TX_PC6 = GPIO_PC6,
131 UART1_TX_PD6 = GPIO_PD6,
132 UART1_TX_PE0 = GPIO_PE0,
133
134 UART_TX_ENUM_SIZE
135 } uart_tx_pin_e;
136
137 /**
138 * @brief Define UART RX pin : UART0(PA4 PB3 PD3), UART1(PC7 PD7 PE2)
139 */
140 typedef enum {
141 UART0_RX_PA4 = GPIO_PA4,
142 UART0_RX_PB3 = GPIO_PB3,
143 UART0_RX_PD3 = GPIO_PD3,
144
145 UART1_RX_PC7 = GPIO_PC7,
146 UART1_RX_PD7 = GPIO_PD7,
147 UART1_RX_PE2 = GPIO_PE2,
148
149 UART_RX_ENUM_SIZE
150 } uart_rx_pin_e;
151
152 /**
153 * @brief Define UART IRQ MASK.The enumeration variable is just a index,
154 * and actually needs to be operated registers behind.
155 */
156 typedef enum {
157 UART_RX_IRQ_MASK = BIT(0), // reg_uart_ctrl0(uart_num) BIT(6)
158 UART_TX_IRQ_MASK = BIT(1), // reg_uart_ctrl0(uart_num) BIT(7)
159 UART_RXDONE_MASK = BIT(2), // reg_uart_rx_timeout1(uart_num) BIT(2)
160 UART_TXDONE_MASK = BIT(3), // reg_uart_rx_timeout1(uart_num) BIT(6)
161 UART_ERR_IRQ_MASK = BIT(4), // reg_uart_rx_timeout1(uart_num) BIT(7)
162 } uart_irq_mask_e;
163
164 /**
165 * @brief Define UART IRQ BIT STATUS FOR GET
166 */
167 typedef enum {
168 UART_RX_ERR = BIT(7),
169 UART_TXDONE = BIT(0),
170 UART_TXBUF_IRQ_STATUS = BIT(1),
171 UART_RXDONE = BIT(2),
172 UART_RXBUF_IRQ_STATUS = BIT(3),
173 } uart_irq_status_get_e;
174
175 /**
176 * @brief Define UART IRQ BIT STATUS FOR CLR
177 */
178 typedef enum {
179 UART_CLR_RX = BIT(6),
180 UART_CLR_TX = BIT(7),
181 } uart_irq_status_clr_e;
182
183 /**********************************************************************************************************************
184 * global variable declaration *
185 *********************************************************************************************************************/
186
187 /**********************************************************************************************************************
188 * global function prototype *
189 *********************************************************************************************************************/
190 /**
191 * @brief This function serves to get the rxfifo cnt.
192 * @param[in] uart_num - UART0/UART1.
193 * @return none
194 */
uart_get_rxfifo_num(uart_num_e uart_num)195 static inline unsigned char uart_get_rxfifo_num(uart_num_e uart_num)
196 {
197 return reg_uart_buf_cnt(uart_num) & FLD_UART_RX_BUF_CNT;
198 }
199
200 /**
201 * @brief This function serves to get the txfifo cnt.
202 * @param[in] uart_num - UART0/UART1.
203 * @return none
204 */
uart_get_txfifo_num(uart_num_e uart_num)205 static inline unsigned char uart_get_txfifo_num(uart_num_e uart_num)
206 {
207 return (reg_uart_buf_cnt(uart_num) & FLD_UART_TX_BUF_CNT) >> 4;
208 }
209
210 /**
211 * @brief This function resets the UART module.
212 * @param[in] uart_num - UART0 or UART1.
213 * @return none
214 */
uart_reset(uart_num_e uart_num)215 static inline void uart_reset(uart_num_e uart_num)
216 {
217 reg_rst0 &= (~((uart_num) ? FLD_RST0_UART1 : FLD_RST0_UART0));
218 reg_rst0 |= ((uart_num) ? FLD_RST0_UART1 : FLD_RST0_UART0);
219 }
220
221 /**
222 * @brief This function enable the clock of UART module.
223 * @param[in] uart_num - UART0/UART1.
224 * @return none
225 */
uart_clk_en(uart_num_e uart_num)226 static inline void uart_clk_en(uart_num_e uart_num)
227 {
228 reg_clk_en0 |= ((uart_num) ? FLD_CLK0_UART1_EN : FLD_CLK0_UART0_EN);
229 }
230
231 /**
232 * @brief This function initializes the UART module.
233 * @param[in] uart_num - UART0 or UART1.
234 * @param[in] div - uart clock divider.
235 * @param[in] bwpc - bitwidth, should be set to larger than 2.
236 * @param[in] parity - selected parity type for UART interface.
237 * @param[in] stop_bit - selected length of stop bit for UART interface.
238 * @return none
239 * @note sys_clk baudrate g_uart_div g_bwpc
240 *
241 * 16Mhz 9600 118 13
242 * 19200 118 6
243 * 115200 9 13
244 *
245 * 24Mhz 9600 249 9
246 * 19200 124 9
247 * 115200 12 15
248 *
249 * 32Mhz 9600 235 13
250 * 19200 235 6
251 * 115200 17 13
252 *
253 * 48Mhz 9600 499 9
254 * 19200 249 9
255 * 115200 25 15
256 */
257 extern void uart_init(uart_num_e uart_num, unsigned short div, unsigned char bwpc, uart_parity_e parity,
258 uart_stop_bit_e stop_bit);
259
260 /***********************************************************
261 * @brief This function serves to calculate the best bwpc(bit width) .i.e reg0x96.
262 * @param[in] baudrate - baut rate of UART.
263 * @param[in] sysclk - system clock.
264 * @param[out] div - uart clock divider.
265 * @param[out] bwpc - bitwidth, should be set to larger than 2.
266 * @return none
267 * @note BaudRate*(div+1)*(bwpc+1) = system clock.
268 * simplify the expression: div*bwpc = constant(z).
269 * bwpc range from 3 to 15.so loop and get the minimum one decimal point.
270 */
271 void uart_cal_div_and_bwpc(unsigned int baudrate, unsigned int sysclk, unsigned short *div, unsigned char *bwpc);
272
273 /**
274 * @brief This funtion serves to set r_rxtimeout. this setting is transfer one bytes need cycles base on uart_clk.
275 * For example, if transfer one bytes (1start bit+8bits data+1 priority bit+2stop bits) total 12 bits,
276 * this register setting should be (bpwc+1)*12.
277 * @param[in] uart_num - UART0 or UART1.
278 * @param[in] bwpc - bitwidth, should be set to larger than 2.
279 * @param[in] bit_cnt - bit number.
280 * @param[in] mul - mul.
281 * @return none
282 */
283 void uart_set_dma_rx_timeout(uart_num_e uart_num, unsigned char bwpc, unsigned char bit_cnt, uart_timeout_mul_e mul);
284
285 /**
286 * @brief This function serves to config the number level setting the irq bit of status register.
287 * @param[in] uart_num - UART0 or UART1.
288 * @param[in] rx_level - receive level value. ie 0x140089[0,3].
289 * @return none
290 */
uart_rx_irq_trig_level(uart_num_e uart_num,unsigned char rx_level)291 static inline void uart_rx_irq_trig_level(uart_num_e uart_num, unsigned char rx_level)
292 {
293 reg_uart_ctrl3(uart_num) = (reg_uart_ctrl3(uart_num) & (~FLD_UART_RX_IRQ_TRIQ_LEV)) | (rx_level & 0x0f);
294 }
295
296 /**
297 * @brief This function serves to config the number level setting the irq bit of status register.
298 * @param[in] uart_num - UART0 or UART1.
299 * @param[in] tx_level - transmit level value.ie 0x140089[4,7].
300 * @return none
301 */
uart_tx_irq_trig_level(uart_num_e uart_num,unsigned char tx_level)302 static inline void uart_tx_irq_trig_level(uart_num_e uart_num, unsigned char tx_level)
303 {
304 reg_uart_ctrl3(uart_num) = (reg_uart_ctrl3(uart_num) & (~FLD_UART_TX_IRQ_TRIQ_LEV)) | (tx_level << 4);
305 }
306
307 /**
308 * @brief This function serves to send data by byte with not DMA method.
309 * @param[in] uart_num - UART0 or UART1.
310 * @param[in] tx_data - the data to be send.
311 * @return none
312 */
313 void uart_send_byte(uart_num_e uart_num, unsigned char tx_data);
314
315 /**
316 * @brief This function serves to receive uart data by byte with not DMA method.
317 * @param[in] uart_num - UART0 or UART1.
318 * @return none
319 */
320 unsigned char uart_read_byte(uart_num_e uart_num);
321 /**
322 * @brief This function serves to judge if the transmission of uart is done.
323 * @param[in] uart_num - UART0 or UART1.
324 * @return return the tx status
325 * - 0:tx is done 1:tx isn't done
326 */
327 unsigned char uart_tx_is_busy(uart_num_e uart_num);
328 /**
329 * @brief This function serves to send uart0 data by halfword with not DMA method.
330 * @param[in] uart_num - UART0 or UART1.
331 * @param[in] data - the data to be send.
332 * @return none
333 */
334 void uart_send_hword(uart_num_e uart_num, unsigned short data);
335
336 /**
337 * @brief This function serves to send uart0 data by word with not DMA method.
338 * @param[in] uart_num - UART0 or UART1.
339 * @param[in] data - the data to be send.
340 * @return none
341 */
342 void uart_send_word(uart_num_e uart_num, unsigned int data);
343
344 /**
345 * @brief This function sets the RTS pin's level manually.
346 * @param[in] uart_num - UART0 or UART1.
347 * @param[in] polarity - set the output of RTS pin(only for manual mode).
348 * @return none
349 */
350 void uart_set_rts_level(uart_num_e uart_num, unsigned char polarity);
351
352 /**
353 * @brief This function serves to set pin for UART0 cts function .
354 * @param[in] cts_pin -To set cts pin.
355 * @return none
356 */
357 void uart_set_cts_pin(uart_cts_pin_e cts_pin);
358
359 /**
360 * @brief This function serves to set pin for UART0 rts function .
361 * @param[in] rts_pin - To set rts pin.
362 * @return none
363 */
364 void uart_set_rts_pin(uart_rts_pin_e rts_pin);
365
366 /**
367 * @brief This function serves to select pin for UART module.
368 * @param[in] tx_pin - the pin to send data.
369 * @param[in] rx_pin - the pin to receive data.
370 * @return none
371 */
372 void uart_set_pin(uart_tx_pin_e tx_pin, uart_rx_pin_e rx_pin);
373
374 /**
375 * @brief This function serves to select pin for UART module.
376 * @param[in] rx_pin - the pin serves to send and receive data.
377 * @return none
378 */
379 void uart_set_rtx_pin(uart_rx_pin_e rx_pin);
380
381 /**
382 * @brief This function serves to send data by DMA, this function tell the DMA to get data from the RAM and start.
383 * @param[in] uart_num - UART0 or UART1.
384 * @param[in] addr - pointer to the buffer containing data need to send.
385 * @param[in] len - DMA transmission length.The maximum transmission length of DMA is 0xFFFFFC bytes,
386 * so dont'n over this length.
387 * @return 1 dma start send.
388 * 0 the length is error.
389 */
390 unsigned char uart_send_dma(uart_num_e uart_num, unsigned char *addr, unsigned int len);
391
392 /**
393 * @brief This function serves to send data with not DMA method.
394 * @param[in] uart_num - UART0 or UART1.
395 * @param[in] addr - pointer to the buffer containing data need to send.
396 * @param[in] len - NDMA transmission length.
397 * @return 1
398 */
399 unsigned char uart_send(uart_num_e uart_num, unsigned char *addr, unsigned char len);
400
401 /**
402 * @brief This function serves to receive data function by DMA,
403 * this function tell the DMA to get data from the uart data fifo.
404 * @param[in] uart_num - UART0 or UART1.
405 * @param[in] addr - pointer to the buffer receive data.
406 * @param[in] rev_size - the receive length of DMA.The maximum transmission length of DMA is 0xFFFFFC bytes,
407 * so dont'n over this length.
408 * @note The DMA version of A0 has some limitians.
409 * 1:The receive length should be greater or equal to the data you want to receive,
410 * then the data won't be lost.
411 * 2:You have to estimate the data-length that you want to receive.
412 * If the data length you set isn't the multiple of 4(the DMA carry 4-byte one time),like 5,
413 * it will carry 8 byte,while the last 3-byte data is random.
414 * The DMA version of A1 can receive any length of data,the rev_size is useless.
415 * @return none
416 */
417 extern void uart_receive_dma(uart_num_e uart_num, unsigned char *addr, unsigned int rev_size);
418
419 /**
420 * @brief This function serves to set uart tx_dam channel and config dma tx default.
421 * @param[in] uart_num - UART0 or UART1.
422 * @param[in] chn - dma channel.
423 * @return none
424 */
425 extern void uart_set_tx_dma_config(uart_num_e uart_num, dma_chn_e chn);
426
427 /**
428 * @brief This function serves to set uart rx_dam channel and config dma rx default.
429 * @param[in] uart_num - UART0 or UART1.
430 * @param[in] chn - dma channel.
431 * @return none
432 */
433 extern void uart_set_rx_dma_config(uart_num_e uart_num, dma_chn_e chn);
434
435 /**
436 * @brief This function serves to config the irq of uart tx and rx.
437 * @param[in] uart_num - UART0 or UART1.
438 * @param[in] mask - uart irq mask.
439 * @return none
440 */
uart_set_irq_mask(uart_num_e uart_num,uart_irq_mask_e mask)441 static inline void uart_set_irq_mask(uart_num_e uart_num, uart_irq_mask_e mask)
442 {
443 if ((mask & UART_RX_IRQ_MASK) || (mask & UART_TX_IRQ_MASK)) {
444 reg_uart_ctrl0(uart_num) |=
445 (((mask & UART_RX_IRQ_MASK) ? 1 : 0) << 6) | (((mask & UART_TX_IRQ_MASK) ? 1 : 0) << 7);
446 }
447
448 if ((mask & UART_RXDONE_MASK) || (mask & UART_TXDONE_MASK) || (mask & UART_ERR_IRQ_MASK)) {
449 reg_uart_rx_timeout1(uart_num) |= (((mask & UART_RXDONE_MASK) ? 1 : 0) << 2) |
450 (((mask & UART_TXDONE_MASK) ? 1 : 0) << 6) |
451 (((mask & UART_ERR_IRQ_MASK) ? 1 : 0) << 7);
452 }
453 }
454
455 /**
456 * @brief This function serves to clear the irq of uart tx and rx.
457 * @param[in] uart_num - UART0 or UART1.
458 * @param[in] mask - uart irq mask.
459 * @return none
460 */
uart_clr_irq_mask(uart_num_e uart_num,uart_irq_mask_e mask)461 static inline void uart_clr_irq_mask(uart_num_e uart_num, uart_irq_mask_e mask)
462 {
463 if ((mask & UART_RX_IRQ_MASK) || (mask & UART_TX_IRQ_MASK)) {
464 reg_uart_ctrl0(uart_num) &=
465 ~((((mask & UART_RX_IRQ_MASK) ? 1 : 0) << 6) | (((mask & UART_TX_IRQ_MASK) ? 1 : 0) << 7));
466 }
467 if ((mask & UART_RXDONE_MASK) || (mask & UART_TXDONE_MASK) || (mask & UART_ERR_IRQ_MASK)) {
468 reg_uart_rx_timeout1(uart_num) &=
469 ~((((mask & UART_RXDONE_MASK) ? 1 : 0) << 2) | (((mask & UART_TXDONE_MASK) ? 1 : 0) << 6) |
470 (((mask & UART_ERR_IRQ_MASK) ? 1 : 0) << 7));
471 }
472 }
473
474 /**
475 * @brief This function serves to get the irq status of uart tx and rx.
476 * @param[in] uart_num - UART0 or UART1.
477 * @param[in] status - uart irq mask.
478 * @return irq status
479 */
uart_get_irq_status(uart_num_e uart_num,uart_irq_status_get_e status)480 static inline unsigned int uart_get_irq_status(uart_num_e uart_num, uart_irq_status_get_e status)
481 {
482 if (status == UART_RX_ERR) {
483 return (reg_uart_status1(uart_num) & (status));
484 } else {
485 return (reg_uart_status2(uart_num) & (status));
486 }
487 }
488
489 /**
490 * @brief This function serves to clear the irq status of uart tx and rx.
491 * @param[in] uart_num - UART0 or UART1.
492 * @param[in] status - uart irq mask.
493 * @return none
494 */
uart_clr_irq_status(uart_num_e uart_num,uart_irq_status_clr_e status)495 static inline void uart_clr_irq_status(uart_num_e uart_num, uart_irq_status_clr_e status)
496 {
497 reg_uart_status1(uart_num) |= (status);
498 }
499
500 /**
501 * @brief This function serves to set uart rts enable.
502 * @param[in] uart_num - UART0 or UART1.
503 * @return none
504 */
uart_set_rts_en(uart_num_e uart_num)505 static inline void uart_set_rts_en(uart_num_e uart_num)
506 {
507 reg_uart_ctrl2(uart_num) |= FLD_UART_RTS_EN; // enable RTS function
508 }
509
510 /**
511 * @brief This function serves to set uart rts disable.
512 * @param[in] uart_num - UART0 or UART1.
513 * @return none
514 */
uart_set_rts_dis(uart_num_e uart_num)515 static inline void uart_set_rts_dis(uart_num_e uart_num)
516 {
517 reg_uart_ctrl2(uart_num) &= (~FLD_UART_RTS_EN); // disable RTS function
518 }
519
520 /**
521 * @brief This function serves to set uart cts enable.
522 * @param[in] uart_num - UART0 or UART1.
523 * @return none
524 */
uart_set_cts_en(uart_num_e uart_num)525 static inline void uart_set_cts_en(uart_num_e uart_num)
526 {
527 reg_uart_ctrl1(uart_num) |= FLD_UART_TX_CTS_ENABLE; // enable CTS function
528 }
529
530 /**
531 * @brief This function serves to set uart cts disable.
532 * @param[in] uart_num - UART0 or UART1.
533 * @return none
534 */
uart_set_cts_dis(uart_num_e uart_num)535 static inline void uart_set_cts_dis(uart_num_e uart_num)
536 {
537 reg_uart_ctrl1(uart_num) &= (~FLD_UART_TX_CTS_ENABLE); // disable CTS function
538 }
539
540 /**
541 * @brief This function serves to configure UART hardware flow. Configure CTS.
542 * @param[in] uart_num - UART0 or UART1.
543 * @param[in] cts_pin - RTS pin select.
544 * @param[in] cts_parity - when CTS's input equals to select, tx will be stopped.
545 * @return none
546 */
547 extern void uart_cts_config(uart_num_e uart_num, uart_cts_pin_e cts_pin, unsigned char cts_parity);
548
549 /**
550 * @brief This function serves to configure UART hardware flow. Configure RTS.
551 * @param[in] uart_num - UART0 or UART1.
552 * @param[in] rts_pin - RTS pin select.
553 * @param[in] rts_parity - whether invert the output of RTS pin(only for auto mode).
554 * @param[in] auto_mode_en - set the mode of RTS(auto or manual).
555 * @return none
556 */
557 extern void uart_rts_config(uart_num_e uart_num, uart_rts_pin_e rts_pin, unsigned char rts_parity,
558 unsigned char auto_mode_en);
559
560 /**
561 * @brief This function serves to set uart rts trig lexel in auto mode.
562 * @param[in] uart_num - UART0 or UART1.
563 * @param[in] level - threshold of trig RTS pin's level toggle(only for auto mode).
564 * @return none
565 */
uart_rts_trig_level_auto_mode(uart_num_e uart_num,unsigned char level)566 static inline void uart_rts_trig_level_auto_mode(uart_num_e uart_num, unsigned char level)
567 {
568 reg_uart_ctrl2(uart_num) &= (~FLD_UART_RTS_TRIQ_LEV);
569 reg_uart_ctrl2(uart_num) |= (level & FLD_UART_RTS_TRIQ_LEV);
570 }
571
572 /**
573 * @brief This function serves to set uart rts auto mode.
574 * @param[in] uart_num - UART0 or UART1.
575 * @return none
576 */
uart_rts_auto_mode(uart_num_e uart_num)577 static inline void uart_rts_auto_mode(uart_num_e uart_num)
578 {
579 reg_uart_ctrl2(uart_num) &= (~FLD_UART_RTS_MANUAL_M);
580 }
581
582 /**
583 * @brief This function serves to set uart rts manual mode.
584 * @param[in] uart_num - UART0 or UART1.
585 * @return none
586 */
uart_rts_manual_mode(uart_num_e uart_num)587 static inline void uart_rts_manual_mode(uart_num_e uart_num)
588 {
589 reg_uart_ctrl2(uart_num) |= (FLD_UART_RTS_MANUAL_M);
590 }
591
592 /**
593 * @brief This function is used to set the 'uart_rx_byte_index' to 0.
594 * after wakeup from power-saving mode or reset uart, you must call this function before receiving the data.
595 * @param[in] uart_num
596 * @return none.
597 */
uart_clr_rx_index(uart_num_e uart_num)598 static inline void uart_clr_rx_index(uart_num_e uart_num)
599 {
600 uart_rx_byte_index[uart_num] = 0;
601 }
602
603 /**
604 * @brief This function is used to set the 'uart_tx_byte_index' to 0.
605 * after wakeup from power-saving mode or reset uart, you must call this function before sending the data.
606 * @param[in] uart_num
607 * @return none.
608 */
uart_clr_tx_index(uart_num_e uart_num)609 static inline void uart_clr_tx_index(uart_num_e uart_num)
610 {
611 uart_tx_byte_index[uart_num] = 0;
612 }
613
614 /**
615 * @brief This function is used to clr uart tx-done,which means set tx-done to 0
616 * @param[in] uart_num
617 * @return none.
618 */
uart_clr_tx_done(uart_num_e uart_num)619 static inline void uart_clr_tx_done(uart_num_e uart_num)
620 {
621 reg_uart_state(uart_num) |= BIT(7);
622 }
623
624 /**
625 * @brief This function is used to enable the rtx function of .
626 * @param[in] chn - UART0 or UART1.
627 * @return none.
628 */
uart_rtx_en(uart_num_e chn)629 static inline void uart_rtx_en(uart_num_e chn)
630 {
631 reg_uart_rx_timeout1(chn) |= FLD_UART_P7816_EN;
632 }
633
634 #endif /* UART_H_ */
635