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1 /*
2  * Copyright (c) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef HIETH_PRI_H
17 #define HIETH_PRI_H
18 
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/list.h>
22 #include <linux/io.h>
23 #include <linux/interrupt.h>
24 #include "hieth.h"
25 #include "hisoc/net.h"
26 
27 #ifdef __cplusplus
28 #if __cplusplus
29 extern "C" {
30 #endif /* __cplusplus */
31 #endif /* __cplusplus */
32 
33 #define HIETH_TSO_DEBUG
34 #define HIETH_RXCSUM_SUPPORTED
35 
36 #define HIETH_PHY_RMII_MODE 1
37 #define HIETH_PHY_MII_MODE 0
38 #define CONFIG_HIETH_TRACE_LEVEL 18
39 #define HIETH_MAX_QUEUE_DEPTH 64
40 #define HIETH_HWQ_RXQ_DEPTH 128
41 
42 #define HIETH_MIIBUS_NAME "himii"
43 
44 #define HIETH_MAX_FRAME_SIZE (1520)
45 
46 #define HIETH_MAX_MAC_FILTER_NUM      8
47 #define HIETH_MAX_UNICAST_ADDRESSES   2
48 #define HIETH_MAX_MULTICAST_ADDRESSES (HIETH_MAX_MAC_FILTER_NUM - HIETH_MAX_UNICAST_ADDRESSES)
49 
50 #define HIETHTRACE_LEVEL_L2 2
51 #define HIETHTRACE_LEVEL_L4 4
52 
53 #define HiethTrace(level, msg...) \
54     do { \
55         if ((level) >= CONFIG_HIETH_TRACE_LEVEL) { \
56             pr_info("HiethTrace:%s:%d: ", __func__, __LINE__); \
57             printk(msg); \
58             printk("\n"); \
59         } \
60     } while (0)
61 
62 #define HiethError(s...) \
63     do { \
64         pr_err("hieth:%s:%d: ", __func__, __LINE__); \
65         pr_err(s); \
66         pr_err("\n"); \
67     } while (0)
68 
69 #define HiethAssert(cond) \
70     do { \
71         if (!(cond)) { \
72             pr_err("Assert:hieth:%s:%d\n", __func__, __LINE__); \
73             BUG(); \
74         } \
75     } while (0)
76 
PhyModes(PhyInterfaceMode mode)77 static inline const char *PhyModes(PhyInterfaceMode mode)
78 {
79     switch (mode) {
80         case PHY_INTERFACE_MODE_MII:
81             return "mii";
82         case PHY_INTERFACE_MODE_RMII:
83             return "rmii";
84         default:
85             return "unknown";
86     }
87 }
88 
89 #define FC_ACTIVE_MIN       1
90 #define FC_ACTIVE_DEFAULT   3
91 #define FC_ACTIVE_MAX       31
92 #define FC_DEACTIVE_MIN     1
93 #define FC_DEACTIVE_DEFAULT 5
94 #define FC_DEACTIVE_MAX     31
95 
96 #define NO_EEE      0
97 #define MAC_EEE     1
98 #define PHY_EEE     2
99 #define PARTNER_EEE 2
100 #define DEBUG       0
101 
102 #define EVENT_NET_TX_RX    0x1
103 #define EVENT_NET_CAN_SEND 0x2
104 
105 extern OsalSpinlock hiethGlbRegLock;
106 
107 #ifdef HIETH_TSO_DEBUG
108 #define MAX_RECORD (100)
109 struct SendPktInfo {
110     uint32_t regAddr;
111     uint32_t regPktInfo;
112     uint32_t status;
113 };
114 #endif
115 
116 /* read/write IO */
117 #define HiethRead(ld, ofs) \
118     ({ unsigned long reg = readl((ld)->iobase + (ofs)); \
119         HiethTrace(HIETHTRACE_LEVEL_L2, "readl(0x%04X) = 0x%08lX", (ofs), reg); \
120         reg; })
121 
122 #define HiethWrite(ld, v, ofs) \
123     do { \
124         writel(v, (ld)->iobase + (ofs)); \
125         HiethTrace (HIETHTRACE_LEVEL_L2, "writel(0x%04X) = 0x%08lX", (ofs), (unsigned long)(v)); \
126     } while (0)
127 
128 #define MK_BITS(shift, nbits) ((((shift)&0x1F) << 16) | ((nbits)&0x3F))
129 
130 #define HiethWritelBits(ld, v, ofs, bits_desc) \
131     do { \
132         unsigned long _bits_desc = bits_desc; \
133         unsigned long _shift = (_bits_desc) >> 16; \
134         unsigned long _reg = HiethRead(ld, ofs); \
135         unsigned long _mask = \
136             ((_bits_desc & 0x3F) < 32) ? (((1 << (_bits_desc & 0x3F)) - 1) << (_shift)) : 0xffffffff; \
137         HiethWrite(ld, (_reg & (~_mask)) | (((unsigned long)(v) << (_shift)) & _mask), ofs); \
138     } while (0)
139 
140 #define HiethReadlBits(ld, ofs, bits_desc) ({ \
141     unsigned long _bits_desc = bits_desc; \
142     unsigned long _shift = (_bits_desc)>>16; \
143     unsigned long _mask = \
144         ((_bits_desc & 0x3F) < 32) ? (((1 << (_bits_desc & 0x3F)) - 1)<<(_shift)) : 0xffffffff; \
145     (HiethRead(ld, ofs)&_mask)>>(_shift); })
146 
147 #define HIETH_TRACE_LEVEL 8
148 
149 #define HiregTrace(level, msg...) \
150     do { \
151         if ((level) >= HIETH_TRACE_LEVEL) {  \
152             pr_info("HiregTrace:%s:%d: ", __func__, __LINE__); \
153             printk(msg); \
154             printk("\n"); \
155         } \
156     } while (0)
157 
158 #define HiregReadl(base, ofs) ({ unsigned long reg = readl((base) + (ofs)); \
159         HiregTrace(HIETHTRACE_LEVEL_L2, "_readl(0x%04X) = 0x%08lX", (ofs), reg); \
160         reg; })
161 
162 #define HiregWritel(base, v, ofs) \
163     do { \
164         writel((v), (base) + (ofs)); \
165         HiregTrace(2, "_writel(0x%04X) = 0x%08lX", \
166            (ofs), (unsigned long)(v));  \
167     } while (0)
168 
169 #define HiregWritelBits(base, v, ofs, bits_desc) \
170     do { \
171         unsigned long _bits_desc = bits_desc; \
172         unsigned long _shift = (_bits_desc) >> 16; \
173         unsigned long _reg = HiregReadl(base, ofs); \
174         unsigned long _mask = \
175             ((_bits_desc & 0x3F) < 32) ? (((1 << (_bits_desc & 0x3F)) - 1) << (_shift)) : 0xffffffff; \
176         HiregWritel(base, (_reg & (~_mask)) | (((v) << (_shift)) & _mask), ofs); \
177     } while (0)
178 
179 #define HiregReadlBits(base, ofs, bits_desc) ({ \
180     unsigned long _bits_desc = bits_desc; \
181     unsigned long _shift = (_bits_desc)>>16; \
182     unsigned long _mask = \
183         ((_bits_desc & 0x3F) < 32) ? (((1 << (_bits_desc & 0x3F)) - 1)<<(_shift)) : 0xffffffff; \
184     (HiregReadl(base, ofs)&_mask)>>(_shift); })
185 
186 #define UD_REG_NAME(name) ((ld->port == UP_PORT) ? U_##name : D_##name)
187 #define UD_BIT_NAME(name) ((ld->port == UP_PORT) ? name##_U : name##_D)
188 #define UD_PHY_NAME(name) ((ld->port == UP_PORT) ? name##_U : name##_D)
189 
190 #define UD_BIT(port, name) (((port) == UP_PORT) ? name##_U : name##_D)
191 
192 #define GLB_MAC_H16(port, reg) ((((port) == UP_PORT) ? GLB_MAC_H16_BASE : GLB_MAC_H16_BASE_D) + (reg * 0x8))
193 #define GLB_MAC_L32(port, reg) ((((port) == UP_PORT) ? GLB_MAC_L32_BASE : GLB_MAC_L32_BASE_D) + (reg * 0x8))
194 
195 #ifdef __cplusplus
196 #if __cplusplus
197 }
198 #endif /* __cplusplus */
199 #endif /* __cplusplus */
200 
201 #endif /* HIETH_PRI_H */
202