1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
3
4 #ifndef __IXGBE_VF_H__
5 #define __IXGBE_VF_H__
6
7 #include <linux/pci.h>
8 #include <linux/delay.h>
9 #include <linux/interrupt.h>
10 #include <linux/if_ether.h>
11 #include <linux/netdevice.h>
12
13 #include "defines.h"
14 #include "regs.h"
15 #include "mbx.h"
16
17 struct ixgbe_hw;
18
19 /* iterator type for walking multicast address lists */
20 typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr,
21 u32 *vmdq);
22 struct ixgbe_mac_operations {
23 s32 (*init_hw)(struct ixgbe_hw *);
24 s32 (*reset_hw)(struct ixgbe_hw *);
25 s32 (*start_hw)(struct ixgbe_hw *);
26 s32 (*clear_hw_cntrs)(struct ixgbe_hw *);
27 enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *);
28 s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *);
29 s32 (*stop_adapter)(struct ixgbe_hw *);
30 s32 (*get_bus_info)(struct ixgbe_hw *);
31 s32 (*negotiate_api_version)(struct ixgbe_hw *hw, int api);
32
33 /* Link */
34 s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool, bool);
35 s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool);
36 s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *,
37 bool *);
38
39 /* RAR, Multicast, VLAN */
40 s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32);
41 s32 (*set_uc_addr)(struct ixgbe_hw *, u32, u8 *);
42 s32 (*init_rx_addrs)(struct ixgbe_hw *);
43 s32 (*update_mc_addr_list)(struct ixgbe_hw *, struct net_device *);
44 s32 (*update_xcast_mode)(struct ixgbe_hw *, int);
45 s32 (*get_link_state)(struct ixgbe_hw *hw, bool *link_state);
46 s32 (*enable_mc)(struct ixgbe_hw *);
47 s32 (*disable_mc)(struct ixgbe_hw *);
48 s32 (*clear_vfta)(struct ixgbe_hw *);
49 s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool);
50 s32 (*set_rlpml)(struct ixgbe_hw *, u16);
51 };
52
53 enum ixgbe_mac_type {
54 ixgbe_mac_unknown = 0,
55 ixgbe_mac_82599_vf,
56 ixgbe_mac_X540_vf,
57 ixgbe_mac_X550_vf,
58 ixgbe_mac_X550EM_x_vf,
59 ixgbe_mac_x550em_a_vf,
60 ixgbe_num_macs
61 };
62
63 struct ixgbe_mac_info {
64 struct ixgbe_mac_operations ops;
65 u8 addr[6];
66 u8 perm_addr[6];
67
68 enum ixgbe_mac_type type;
69
70 s32 mc_filter_type;
71
72 bool get_link_status;
73 u32 max_tx_queues;
74 u32 max_rx_queues;
75 u32 max_msix_vectors;
76 };
77
78 struct ixgbe_mbx_operations {
79 s32 (*init_params)(struct ixgbe_hw *hw);
80 s32 (*read)(struct ixgbe_hw *, u32 *, u16);
81 s32 (*write)(struct ixgbe_hw *, u32 *, u16);
82 s32 (*read_posted)(struct ixgbe_hw *, u32 *, u16);
83 s32 (*write_posted)(struct ixgbe_hw *, u32 *, u16);
84 s32 (*check_for_msg)(struct ixgbe_hw *);
85 s32 (*check_for_ack)(struct ixgbe_hw *);
86 s32 (*check_for_rst)(struct ixgbe_hw *);
87 };
88
89 struct ixgbe_mbx_stats {
90 u32 msgs_tx;
91 u32 msgs_rx;
92
93 u32 acks;
94 u32 reqs;
95 u32 rsts;
96 };
97
98 struct ixgbe_mbx_info {
99 struct ixgbe_mbx_operations ops;
100 struct ixgbe_mbx_stats stats;
101 u32 timeout;
102 u32 udelay;
103 u32 v2p_mailbox;
104 u16 size;
105 };
106
107 struct ixgbe_hw {
108 void *back;
109
110 u8 __iomem *hw_addr;
111
112 struct ixgbe_mac_info mac;
113 struct ixgbe_mbx_info mbx;
114
115 u16 device_id;
116 u16 subsystem_vendor_id;
117 u16 subsystem_device_id;
118 u16 vendor_id;
119
120 u8 revision_id;
121 bool adapter_stopped;
122
123 int api_version;
124 };
125
126 struct ixgbevf_hw_stats {
127 u64 base_vfgprc;
128 u64 base_vfgptc;
129 u64 base_vfgorc;
130 u64 base_vfgotc;
131 u64 base_vfmprc;
132
133 u64 last_vfgprc;
134 u64 last_vfgptc;
135 u64 last_vfgorc;
136 u64 last_vfgotc;
137 u64 last_vfmprc;
138
139 u64 vfgprc;
140 u64 vfgptc;
141 u64 vfgorc;
142 u64 vfgotc;
143 u64 vfmprc;
144
145 u64 saved_reset_vfgprc;
146 u64 saved_reset_vfgptc;
147 u64 saved_reset_vfgorc;
148 u64 saved_reset_vfgotc;
149 u64 saved_reset_vfmprc;
150 };
151
152 struct ixgbevf_info {
153 enum ixgbe_mac_type mac;
154 const struct ixgbe_mac_operations *mac_ops;
155 };
156
157 #define IXGBE_FAILED_READ_REG 0xffffffffU
158
159 #define IXGBE_REMOVED(a) unlikely(!(a))
160
ixgbe_write_reg(struct ixgbe_hw * hw,u32 reg,u32 value)161 static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value)
162 {
163 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
164
165 if (IXGBE_REMOVED(reg_addr))
166 return;
167 writel(value, reg_addr + reg);
168 }
169
170 #define IXGBE_WRITE_REG(h, r, v) ixgbe_write_reg(h, r, v)
171
172 u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg);
173 #define IXGBE_READ_REG(h, r) ixgbevf_read_reg(h, r)
174
ixgbe_write_reg_array(struct ixgbe_hw * hw,u32 reg,u32 offset,u32 value)175 static inline void ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg,
176 u32 offset, u32 value)
177 {
178 ixgbe_write_reg(hw, reg + (offset << 2), value);
179 }
180
181 #define IXGBE_WRITE_REG_ARRAY(h, r, o, v) ixgbe_write_reg_array(h, r, o, v)
182
ixgbe_read_reg_array(struct ixgbe_hw * hw,u32 reg,u32 offset)183 static inline u32 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg,
184 u32 offset)
185 {
186 return ixgbevf_read_reg(hw, reg + (offset << 2));
187 }
188
189 #define IXGBE_READ_REG_ARRAY(h, r, o) ixgbe_read_reg_array(h, r, o)
190
191 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
192 unsigned int *default_tc);
193 int ixgbevf_get_reta_locked(struct ixgbe_hw *hw, u32 *reta, int num_rx_queues);
194 int ixgbevf_get_rss_key_locked(struct ixgbe_hw *hw, u8 *rss_key);
195 #endif /* __IXGBE_VF_H__ */
196