Home
last modified time | relevance | path

Searched defs:clk_div (Results 1 – 25 of 27) sorted by relevance

12

/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/soc/bk7235/hal/
Dlcd_disp_hal.h47 #define lcd_hal_rgb_clk_div(clk_div) lcd_disp_ll_set_status_rgb_clk_div(clk_div) argument
48 #define lcd_hal_set_rgb_clk_div(clk_div) lcd_disp_ll_set_status_rgb_clk_div(clk_div) argument
Dtimer_ll.h186 static inline void timer_ll_set_clk_div(timer_hw_t *hw, uint32_t chan, uint32_t clk_div) in timer_ll_set_clk_div()
Dlcd_disp_ll.h232 static inline void lcd_display_ll_rgb_clk_div(lcd_disp_hw_t *hw, uint8_t clk_div) in lcd_display_ll_rgb_clk_div()
Dspi_ll.h134 static inline void spi_ll_set_clk_div(spi_hw_t *hw, uint32_t clk_div) in spi_ll_set_clk_div()
/device/soc/winnermicro/wm800/board/platform/drivers/cpu/
Dwm_cpu.c83 clk_div_reg clk_div; in tls_sys_clk_get() local
/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/soc/common/hal/
Dspi_hal.c130 uint32_t clk_div = 0; in spi_hal_set_baud_rate() local
Duart_hal.c86 uint32_t clk_div = 0; in uart_hal_set_baud_rate() local
/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/soc/bk7235/soc/
Dtimer_struct.h30 uint32_t clk_div: 4; /**< bit[3:6] */ member
Duart_struct.h38 uint32_t clk_div: 13; /**< bit[8:20] clk_div = uart_clk/baud_rate */ member
/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/soc/common/hal/include/
Dqspi_hal.h44 #define qspi_hal_set_clk_div(hal, clk_div) qspi_ll_set_clk_div((hal)->hw, clk_div) argument
/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/drivers/tsensor/
Dhi_tsensor_pm.c47 hi_u16 clk_div; member
/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/include/driver/hal/
Dhal_qspi_types.h48 uint32_t clk_div; /**< QSPI controller clock divide number */ member
/device/soc/esp/esp32/components/driver/include/driver/
Drmt.h81 uint8_t clk_div; /*!< RMT channel counter divider */ member
/device/soc/hpmicro/sdk/hpm_sdk/soc/HPM6750/
Dhpm_clock_drv.c190 uint32_t clk_div = 1UL + SYSCTL_CLOCK_DIV_GET(HPM_SYSCTL->CLOCK[clk_node]); in get_frequency_for_ip_in_common_group() local
/device/soc/goodix/gr551x/sdk_liteos/gr551x_sdk/drivers/inc/
Dgr55xx_hal_iso7816.h100 uint32_t clk_div; /*!< clk_div is used for dividing the system clock, member
Dgr55xx_ll_iso7816.h74 uint32_t clk_div; /*!< clk_div is used for dividing the system clock, member
/device/soc/esp/esp32/components/driver/
Dadc_common.c237 esp_err_t adc_set_clk_div(uint8_t clk_div) in adc_set_clk_div()
Drmt.c567 uint8_t clk_div = rmt_param->clk_div; in rmt_internal_config() local
/device/soc/hpmicro/sdk/hpm_sdk/soc/HPM6360/
Dhpm_clock_drv.c189 uint32_t clk_div = 1UL + SYSCTL_CLOCK_DIV_GET(HPM_SYSCTL->CLOCK[clk_node]); in get_frequency_for_ip_in_common_group() local
/device/soc/esp/esp32/components/hal/esp32/include/hal/
Duart_ll.h111 uint32_t sclk_freq, clk_div; in uart_ll_set_baudrate() local
/device/board/unionman/unionpi_tiger/kernel/drivers/media/drivers/include/linux/amlogic/
Dusb-gxbb.h42 unsigned clk_div:7; member
Dusb-common.h42 unsigned clk_div:7; member
Dsd.h439 int clk_div; member
1035 u32 clk_div:12; member
/device/soc/esp/esp32/components/soc/esp32/include/soc/
Duart_struct.h138 } clk_div; member
/device/soc/amlogic/a311d/soc/include/linux/amlogic/
Dsd.h432 int clk_div; member
1024 u32 clk_div : 12; member

12