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1 /**
2  * Copyright (c) 2021 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef HPM_SYSCTL_DRV_H
9 #define HPM_SYSCTL_DRV_H
10 
11 #include "hpm_common.h"
12 #include "hpm_sysctl_regs.h"
13 
14 /**
15  *
16  * @brief SYSCTL driver APIs
17  * @defgroup sysctl_interface SYSCTL driver APIs
18  * @ingroup io_interfaces
19  * @{
20  */
21 
22 /**
23  * @brief Retention domains
24  */
25 typedef enum {
26     sysctl_retention_domain_sys = 0,
27     sysctl_retention_domain_cpu0 = 2,
28     sysctl_retention_domain_cpu1 = 4,
29     sysctl_retention_domain_conn = 6,
30     sysctl_retention_domain_vis = 8,
31     sysctl_retention_domain_xtal24m = 10,
32     sysctl_retention_domain_pll0 = 11,
33     sysctl_retention_domain_pll1 = 12,
34     sysctl_retention_domain_pll2 = 13,
35     sysctl_retention_domain_pll3 = 14,
36     sysctl_retention_domain_pll4 = 15,
37 } sysctl_retention_domain_t;
38 
39 /**
40  * @brief Clock presets
41  */
42 typedef enum {
43     sysctl_preset_0 = 1 << 0,
44     sysctl_preset_1 = 1 << 1,
45     sysctl_preset_2 = 1 << 2,
46     sysctl_preset_3 = 1 << 3,
47 } sysctl_preset_t;
48 
49 /**
50  * @brief Reset domains
51  */
52 typedef enum {
53     sysctl_reset_domain_soc = 0,
54     sysctl_reset_domain_con,
55     sysctl_reset_domain_vis,
56     sysctl_reset_domain_cpu0,
57     sysctl_reset_domain_cpu1,
58 } sysctl_reset_domain_t;
59 
60 /**
61  * @brief Resource
62  */
63 typedef enum {
64     sysctl_resource_cpu0 = 0,
65     sysctl_resource_cpx0 = 1,
66     sysctl_resource_exe0 = 2,
67     sysctl_resource_wak0 = 3,
68     sysctl_resource_cpu0_per = 4,
69     sysctl_resource_cpu1 = 8,
70     sysctl_resource_cpx1 = 9,
71     sysctl_resource_exe1 = 10,
72     sysctl_resource_wak1 = 11,
73     sysctl_resource_cpu1_per = 12,
74     sysctl_resource_logic0 = 16,
75     sysctl_resource_logic1 = 17,
76     sysctl_resource_logic2 = 18,
77     sysctl_resource_logic3 = 19,
78     sysctl_resource_pmic = 20,
79     sysctl_resource_pow_con = 21,
80     sysctl_resource_pow_vis = 22,
81     sysctl_resource_pow_cpu0 = 23,
82     sysctl_resource_pow_cpu1 = 24,
83     sysctl_resource_rst_soc = 25,
84     sysctl_resource_rst_con = 26,
85     sysctl_resource_rst_vis = 27,
86     sysctl_resource_rst_cpu0 = 28,
87     sysctl_resource_rst_cpu1 = 29,
88     sysctl_resource_xtal = 32,
89     sysctl_resource_pll0 = 33,
90     sysctl_resource_clk0_pll0 = 34,
91     sysctl_resource_pll1 = 35,
92     sysctl_resource_clk0_pll1 = 36,
93     sysctl_resource_clk1_pll1 = 37,
94     sysctl_resource_pll2 = 38,
95     sysctl_resource_clk0_pll2 = 39,
96     sysctl_resource_clk1_pll2 = 40,
97     sysctl_resource_pll3 = 41,
98     sysctl_resource_clk0_pll3 = 42,
99     sysctl_resource_pll4 = 43,
100     sysctl_resource_clk0_pll4 = 44,
101     sysctl_resource_mbist_soc = 48,
102     sysctl_resource_mbist_cpu = 49,
103     sysctl_resource_mbist_cpu1 = 50,
104     sysctl_resource_mbist_con = 51,
105     sysctl_resource_mbist_vis = 52,
106     sysctl_resource_clk_top_cpu0 = 64,
107     sysctl_resource_clk_top_mchtmr0 = 65,
108     sysctl_resource_clk_top_cpu1 = 66,
109     sysctl_resource_clk_top_mchtmr1 = 67,
110     sysctl_resource_clk_top_axi0 = 68,
111     sysctl_resource_clk_top_axi1 = 69,
112     sysctl_resource_clk_top_axi2 = 70,
113     sysctl_resource_clk_top_ahb0 = 71,
114     sysctl_resource_clk_top_dram = 72,
115     sysctl_resource_clk_top_xpi0 = 73,
116     sysctl_resource_clk_top_xpi1 = 74,
117     sysctl_resource_clk_top_gptmr0 = 75,
118     sysctl_resource_clk_top_gptmr1 = 76,
119     sysctl_resource_clk_top_gptmr2 = 77,
120     sysctl_resource_clk_top_gptmr3 = 78,
121     sysctl_resource_clk_top_gptmr4 = 79,
122     sysctl_resource_clk_top_gptmr5 = 80,
123     sysctl_resource_clk_top_gptmr6 = 81,
124     sysctl_resource_clk_top_gptmr7 = 82,
125     sysctl_resource_clk_top_uart0 = 83,
126     sysctl_resource_clk_top_uart1 = 84,
127     sysctl_resource_clk_top_uart2 = 85,
128     sysctl_resource_clk_top_uart3 = 86,
129     sysctl_resource_clk_top_uart4 = 87,
130     sysctl_resource_clk_top_uart5 = 88,
131     sysctl_resource_clk_top_uart6 = 89,
132     sysctl_resource_clk_top_uart7 = 90,
133     sysctl_resource_clk_top_uart8 = 91,
134     sysctl_resource_clk_top_uart9 = 92,
135     sysctl_resource_clk_top_uarta = 93,
136     sysctl_resource_clk_top_uartb = 94,
137     sysctl_resource_clk_top_uartc = 95,
138     sysctl_resource_clk_top_uartd = 96,
139     sysctl_resource_clk_top_uarte = 97,
140     sysctl_resource_clk_top_uartf = 98,
141     sysctl_resource_clk_top_i2c0 = 99,
142     sysctl_resource_clk_top_i2c1 = 100,
143     sysctl_resource_clk_top_i2c2 = 101,
144     sysctl_resource_clk_top_i2c3 = 102,
145     sysctl_resource_clk_top_spi0 = 103,
146     sysctl_resource_clk_top_spi1 = 104,
147     sysctl_resource_clk_top_spi2 = 105,
148     sysctl_resource_clk_top_spi3 = 106,
149     sysctl_resource_clk_top_can0 = 107,
150     sysctl_resource_clk_top_can1 = 108,
151     sysctl_resource_clk_top_can2 = 109,
152     sysctl_resource_clk_top_can3 = 110,
153     sysctl_resource_clk_top_ptpc = 111,
154     sysctl_resource_clk_top_ana0 = 112,
155     sysctl_resource_clk_top_ana1 = 113,
156     sysctl_resource_clk_top_ana2 = 114,
157     sysctl_resource_clk_top_aud0 = 115,
158     sysctl_resource_clk_top_aud1 = 116,
159     sysctl_resource_clk_top_aud2 = 117,
160     sysctl_resource_clk_top_dis0 = 118,
161     sysctl_resource_clk_top_cam0 = 119,
162     sysctl_resource_clk_top_cam1 = 120,
163     sysctl_resource_clk_top_eth0 = 121,
164     sysctl_resource_clk_top_eth1 = 122,
165     sysctl_resource_clk_top_ptp0 = 123,
166     sysctl_resource_clk_top_ptp1 = 124,
167     sysctl_resource_clk_top_ref0 = 125,
168     sysctl_resource_clk_top_ref1 = 126,
169     sysctl_resource_clk_top_ntmr0 = 127,
170     sysctl_resource_clk_top_ntmr1 = 128,
171     sysctl_resource_clk_top_sdxc0 = 129,
172     sysctl_resource_clk_top_sdxc1 = 130,
173     sysctl_resource_clk_top_adc0 = 192,
174     sysctl_resource_clk_top_adc1 = 193,
175     sysctl_resource_clk_top_adc2 = 194,
176     sysctl_resource_clk_top_adc3 = 195,
177     sysctl_resource_clk_top_i2s0 = 196,
178     sysctl_resource_clk_top_i2s1 = 197,
179     sysctl_resource_clk_top_i2s2 = 198,
180     sysctl_resource_clk_top_i2s3 = 199,
181 
182     sysctl_resource_linkable_start = 256,
183     sysctl_resource_ahbp = 256,
184     sysctl_resource_axis = 257,
185     sysctl_resource_axic = 258,
186     sysctl_resource_axiv = 259,
187     sysctl_resource_dram = 260,
188     sysctl_resource_rom0 = 261,
189     sysctl_resource_lmm0 = 262,
190     sysctl_resource_lmm1 = 263,
191     sysctl_resource_mchtmr0 = 264,
192     sysctl_resource_mchtmr1 = 265,
193     sysctl_resource_ram0 = 266,
194     sysctl_resource_ram1 = 267,
195     sysctl_resource_xpi0 = 268,
196     sysctl_resource_xpi1 = 269,
197     sysctl_resource_sdp0 = 270,
198     sysctl_resource_rng0 = 271,
199     sysctl_resource_kman = 272,
200     sysctl_resource_dma0 = 273,
201     sysctl_resource_dma1 = 274,
202     sysctl_resource_gpio = 275,
203     sysctl_resource_mbx0 = 276,
204     sysctl_resource_mbx1 = 277,
205     sysctl_resource_wdg0 = 278,
206     sysctl_resource_wdg1 = 279,
207     sysctl_resource_wdg2 = 280,
208     sysctl_resource_wdg3 = 281,
209     sysctl_resource_gptmr0 = 282,
210     sysctl_resource_gptmr1 = 283,
211     sysctl_resource_gptmr2 = 284,
212     sysctl_resource_gptmr3 = 285,
213     sysctl_resource_gptmr4 = 286,
214     sysctl_resource_gptmr5 = 287,
215     sysctl_resource_gptmr6 = 288,
216     sysctl_resource_gptmr7 = 289,
217     sysctl_resource_uart0 = 290,
218     sysctl_resource_uart1 = 291,
219     sysctl_resource_uart2 = 292,
220     sysctl_resource_uart3 = 293,
221     sysctl_resource_uart4 = 294,
222     sysctl_resource_uart5 = 295,
223     sysctl_resource_uart6 = 296,
224     sysctl_resource_uart7 = 297,
225     sysctl_resource_uart8 = 298,
226     sysctl_resource_uart9 = 299,
227     sysctl_resource_uarta = 300,
228     sysctl_resource_uartb = 301,
229     sysctl_resource_uartc = 302,
230     sysctl_resource_uartd = 303,
231     sysctl_resource_uarte = 304,
232     sysctl_resource_uartf = 305,
233     sysctl_resource_i2c0 = 306,
234     sysctl_resource_i2c1 = 307,
235     sysctl_resource_i2c2 = 308,
236     sysctl_resource_i2c3 = 309,
237     sysctl_resource_spi0 = 310,
238     sysctl_resource_spi1 = 311,
239     sysctl_resource_spi2 = 312,
240     sysctl_resource_spi3 = 313,
241     sysctl_resource_can0 = 314,
242     sysctl_resource_can1 = 315,
243     sysctl_resource_can2 = 316,
244     sysctl_resource_can3 = 317,
245     sysctl_resource_ptpc = 318,
246     sysctl_resource_adc0 = 319,
247     sysctl_resource_adc1 = 320,
248     sysctl_resource_adc2 = 321,
249     sysctl_resource_adc3 = 322,
250     sysctl_resource_acmp = 323,
251     sysctl_resource_i2s0 = 324,
252     sysctl_resource_i2s1 = 325,
253     sysctl_resource_i2s2 = 326,
254     sysctl_resource_i2s3 = 327,
255     sysctl_resource_i2spdm0 = 328,
256     sysctl_resource_i2sdao = 329,
257     sysctl_resource_msyn = 330,
258     sysctl_resource_mot0 = 331,
259     sysctl_resource_mot1 = 332,
260     sysctl_resource_mot2 = 333,
261     sysctl_resource_mot3 = 334,
262     sysctl_resource_dis0 = 335,
263     sysctl_resource_cam0 = 336,
264     sysctl_resource_cam1 = 337,
265     sysctl_resource_jpeg = 338,
266     sysctl_resource_pdma = 339,
267     sysctl_resource_eth0 = 340,
268     sysctl_resource_eth1 = 341,
269     sysctl_resource_ntmr0 = 342,
270     sysctl_resource_ntmr1 = 343,
271     sysctl_resource_sdxc0 = 344,
272     sysctl_resource_sdxc1 = 345,
273     sysctl_resource_usb0 = 346,
274     sysctl_resource_usb1 = 347,
275     sysctl_resource_ref0 = 348,
276     sysctl_resource_ref1 = 349,
277     sysctl_resource_linkable_end,
278     sysctl_resource_end = sysctl_resource_linkable_end,
279 } sysctl_resource_t;
280 
281 /**
282  * @brief Resource modes
283  */
284 typedef enum {
285     sysctl_resource_mode_auto = 0,
286     sysctl_resource_mode_force_on,
287     sysctl_resource_mode_force_off,
288 } sysctl_resource_mode_t;
289 
290 /**
291  * @brief Clock nodes
292  */
293 typedef enum {
294     clock_node_cpu0 = 0,
295     clock_node_mchtmr0 = 1,
296     clock_node_cpu1 = 2,
297     clock_node_mchtmr1 = 3,
298     clock_node_axi0 = 4,
299     clock_node_axi1 = 5,
300     clock_node_axi2 = 6,
301     clock_node_ahb0 = 7,
302     clock_node_dram = 8,
303     clock_node_xpi0 = 9,
304     clock_node_xpi1 = 10,
305     clock_node_gptmr0 = 11,
306     clock_node_gptmr1 = 12,
307     clock_node_gptmr2 = 13,
308     clock_node_gptmr3 = 14,
309     clock_node_gptmr4 = 15,
310     clock_node_gptmr5 = 16,
311     clock_node_gptmr6 = 17,
312     clock_node_gptmr7 = 18,
313     clock_node_uart0 = 19,
314     clock_node_uart1 = 20,
315     clock_node_uart2 = 21,
316     clock_node_uart3 = 22,
317     clock_node_uart4 = 23,
318     clock_node_uart5 = 24,
319     clock_node_uart6 = 25,
320     clock_node_uart7 = 26,
321     clock_node_uart8 = 27,
322     clock_node_uart9 = 28,
323     clock_node_uarta = 29,
324     clock_node_uartb = 30,
325     clock_node_uartc = 31,
326     clock_node_uartd = 32,
327     clock_node_uarte = 33,
328     clock_node_uartf = 34,
329     clock_node_i2c0 = 35,
330     clock_node_i2c1 = 36,
331     clock_node_i2c2 = 37,
332     clock_node_i2c3 = 38,
333     clock_node_spi0 = 39,
334     clock_node_spi1 = 40,
335     clock_node_spi2 = 41,
336     clock_node_spi3 = 42,
337     clock_node_can0 = 43,
338     clock_node_can1 = 44,
339     clock_node_can2 = 45,
340     clock_node_can3 = 46,
341     clock_node_ptpc = 47,
342     clock_node_ana0 = 48,
343     clock_node_ana1 = 49,
344     clock_node_ana2 = 50,
345     clock_node_aud0 = 51,
346     clock_node_aud1 = 52,
347     clock_node_aud2 = 53,
348     clock_node_dis0 = 54,
349     clock_node_cam0 = 55,
350     clock_node_cam1 = 56,
351     clock_node_eth0 = 57,
352     clock_node_eth1 = 58,
353     clock_node_ptp0 = 59,
354     clock_node_ptp1 = 60,
355     clock_node_ref0 = 61,
356     clock_node_ref1 = 62,
357     clock_node_ntmr0 = 63,
358     clock_node_ntmr1 = 64,
359     clock_node_sdxc0 = 65,
360     clock_node_sdxc1 = 66,
361 
362     clock_node_adc_i2s_start,
363     clock_node_adc0 = clock_node_adc_i2s_start,
364     clock_node_adc1,
365     clock_node_adc2,
366     clock_node_adc3,
367 
368     clock_node_i2s0,
369     clock_node_i2s1,
370     clock_node_i2s2,
371     clock_node_i2s3,
372     clock_node_end,
373 } clock_node_t;
374 
375 /**
376  * @brief General clock sources
377  */
378 typedef enum {
379     clock_source_osc0_clk0 = 0,
380     clock_source_pll0_clk0 = 1,
381     clock_source_pll1_clk0 = 2,
382     clock_source_pll1_clk1 = 3,
383     clock_source_pll2_clk0 = 4,
384     clock_source_pll2_clk1 = 5,
385     clock_source_pll3_clk0 = 6,
386     clock_source_pll4_clk0 = 7,
387     clock_source_general_source_end,
388 } clock_source_t;
389 
390 /**
391  * @brief ADC/I2S clock sources
392  */
393 typedef enum {
394     clock_source_adc_i2s_ahb_clk = 0,
395     clock_source_adc_ana0_clk = 1,
396     clock_source_i2s_aud0_clk = 1,
397     clock_source_adc_ana1_clk = 2,
398     clock_source_i2s_aud1_clk = 2,
399     clock_source_adc_ana2_clk = 3,
400     clock_source_i2s_aud2_clk = 3,
401     clock_source_adc_i2s_clk_end,
402 } clock_source_adc_i2s_t;
403 
404 /**
405  * @brief CPU low power mode
406  */
407 typedef enum {
408     cpu_lp_mode_gate_cpu_clock = 0,
409     cpu_lp_mode_trigger_system_lp = 0x1,
410     cpu_lp_mode_ungate_cpu_clock = 0x2,
411 } cpu_lp_mode_t;
412 
413 /**
414  * @brief Monitor targets
415  */
416 typedef enum {
417     monitor_target_clk_32k = 0,
418     monitor_target_clk_irc24m = 1,
419     monitor_target_clk_xtal_24m = 2,
420     monitor_target_clk_usb0_phy = 3,
421     monitor_target_clk_usb1_phy = 4,
422     monitor_target_osc0_clk0 = 8,
423     monitor_target_pll0_clk0 = 9,
424     monitor_target_pll1_clk0 = 10,
425     monitor_target_pll1_clk1 = 11,
426     monitor_target_pll2_clk0 = 12,
427     monitor_target_pll2_clk1 = 13,
428     monitor_target_pll3_clk0 = 14,
429     monitor_target_pll4_clk0 = 15,
430     monitor_target_clk_top_cpu0 = 128,
431     monitor_target_clk_top_mchtmr0 = 129,
432     monitor_target_clk_top_cpu1 = 130,
433     monitor_target_clk_top_mchtmr1 = 131,
434     monitor_target_clk_top_axi0 = 132,
435     monitor_target_clk_top_axi1 = 133,
436     monitor_target_clk_top_axi2 = 134,
437     monitor_target_clk_top_ahb0 = 135,
438     monitor_target_clk_top_dram = 136,
439     monitor_target_clk_top_xpi0 = 137,
440     monitor_target_clk_top_xpi1 = 138,
441     monitor_target_clk_top_gptmr0 = 139,
442     monitor_target_clk_top_gptmr1 = 140,
443     monitor_target_clk_top_gptmr2 = 141,
444     monitor_target_clk_top_gptmr3 = 142,
445     monitor_target_clk_top_gptmr4 = 143,
446     monitor_target_clk_top_gptmr5 = 144,
447     monitor_target_clk_top_gptmr6 = 145,
448     monitor_target_clk_top_gptmr7 = 146,
449     monitor_target_clk_top_uart0 = 147,
450     monitor_target_clk_top_uart1 = 148,
451     monitor_target_clk_top_uart2 = 149,
452     monitor_target_clk_top_uart3 = 150,
453     monitor_target_clk_top_uart4 = 151,
454     monitor_target_clk_top_uart5 = 152,
455     monitor_target_clk_top_uart6 = 153,
456     monitor_target_clk_top_uart7 = 154,
457     monitor_target_clk_top_uart8 = 155,
458     monitor_target_clk_top_uart9 = 156,
459     monitor_target_clk_top_uarta = 157,
460     monitor_target_clk_top_uartb = 158,
461     monitor_target_clk_top_uartc = 159,
462     monitor_target_clk_top_uartd = 160,
463     monitor_target_clk_top_uarte = 161,
464     monitor_target_clk_top_uartf = 162,
465     monitor_target_clk_top_i2c0 = 163,
466     monitor_target_clk_top_i2c1 = 164,
467     monitor_target_clk_top_i2c2 = 165,
468     monitor_target_clk_top_i2c3 = 166,
469     monitor_target_clk_top_spi0 = 167,
470     monitor_target_clk_top_spi1 = 168,
471     monitor_target_clk_top_spi2 = 169,
472     monitor_target_clk_top_spi3 = 170,
473     monitor_target_clk_top_can0 = 171,
474     monitor_target_clk_top_can1 = 172,
475     monitor_target_clk_top_can2 = 173,
476     monitor_target_clk_top_can3 = 174,
477     monitor_target_clk_top_ptpc = 175,
478     monitor_target_clk_top_ana0 = 176,
479     monitor_target_clk_top_ana1 = 177,
480     monitor_target_clk_top_ana2 = 178,
481     monitor_target_clk_top_aud0 = 179,
482     monitor_target_clk_top_aud1 = 180,
483     monitor_target_clk_top_aud2 = 181,
484     monitor_target_clk_top_dis0 = 182,
485     monitor_target_clk_top_cam0 = 183,
486     monitor_target_clk_top_cam1 = 184,
487     monitor_target_clk_top_eth0 = 185,
488     monitor_target_clk_top_eth1 = 186,
489     monitor_target_clk_top_ptp0 = 187,
490     monitor_target_clk_top_ptp1 = 188,
491     monitor_target_clk_top_ref0 = 189,
492     monitor_target_clk_top_ref1 = 190,
493     monitor_target_clk_top_ntmr0 = 191,
494     monitor_target_clk_top_ntmr1 = 192,
495     monitor_target_clk_top_sdxc0 = 193,
496     monitor_target_clk_top_sdxc1 = 194,
497 } monitor_target_t;
498 
499 /**
500  * @brief Monitor work mode
501  */
502 typedef enum {
503     monitor_work_mode_compare = 0,
504     monitor_work_mode_record = 1,
505 } monitor_work_mode_t;
506 
507 /**
508  * @brief Monitor accuracy
509  */
510 typedef enum {
511     monitor_accuracy_1khz = 0,
512     monitor_accuracy_1hz = 1,
513 } monitor_accuracy_t;
514 
515 /**
516  * @brief Monitor reference clock source
517  */
518 typedef enum {
519     monitor_reference_32khz = 0,
520     monitor_reference_24mhz = 1,
521 } monitor_reference_t;
522 
523 /**
524  * @brief Monitor config
525  */
526 typedef struct monitor_config {
527     uint8_t divide_by;              /**< Divider to be used for OBS output to pads */
528     monitor_work_mode_t mode;       /**< Monitor work mode */
529     monitor_accuracy_t accuracy;    /**< Monitor reference accuracy */
530     monitor_reference_t reference;  /**< Monitor reference clock source */
531     monitor_target_t target;        /**< Monitor target */
532     bool start_measure;             /**< Start flag */
533     bool enable_output;             /**< Enable output to pads if true */
534     uint32_t high_limit;            /**< Maximum frequency at compare mode */
535     uint32_t low_limit;             /**< Minimum frequency at compare mode */
536 } monitor_config_t;
537 
538 #ifdef __cplusplus
539 extern "C" {
540 #endif
541 
542 /**
543  * @brief Check if monitor result is valid
544  *
545  * @param[in] ptr SYSCTL_Type base address
546  * @param[in] monitor_index specific monitor instance to be used
547  *
548  * @return true if it is valid
549  */
sysctl_monitor_result_is_valid(SYSCTL_Type * ptr,uint8_t monitor_index)550 static inline bool sysctl_monitor_result_is_valid(SYSCTL_Type *ptr, uint8_t monitor_index)
551 {
552     return SYSCTL_MONITOR_CONTROL_VALID_GET(ptr->MONITOR[monitor_index].CONTROL);
553 }
554 
555 /**
556  * @brief Get target monitor instance result
557  *
558  * @param[in] ptr SYSCTL_Type base address
559  * @param[in] monitor_index specific monitor instance to be used
560  * @return value of monitor result measured
561  */
sysctl_monitor_get_current_result(SYSCTL_Type * ptr,uint8_t monitor_index)562 static inline uint32_t sysctl_monitor_get_current_result(SYSCTL_Type *ptr,
563                                                          uint8_t monitor_index)
564 {
565     while (!sysctl_monitor_result_is_valid(ptr, monitor_index)) {
566     }
567     return ptr->MONITOR[monitor_index].CURRENT;
568 }
569 
570 /**
571  * @brief Set work mode for target monitor instance
572  *
573  * @param[in] ptr SYSCTL_Type base address
574  * @param[in] monitor_index specific monitor instance to be used
575  * @param[in] mode monitor_work_mode_compare, monitor_work_mode_record
576  */
sysctl_monitor_set_work_mode(SYSCTL_Type * ptr,uint8_t monitor_index,monitor_work_mode_t mode)577 static inline void sysctl_monitor_set_work_mode(SYSCTL_Type *ptr,
578                                                 uint8_t monitor_index,
579                                                 monitor_work_mode_t mode)
580 {
581     ptr->MONITOR[monitor_index].CONTROL =
582         (ptr->MONITOR[monitor_index].CONTROL & ~SYSCTL_MONITOR_CONTROL_MODE_MASK)
583       | (SYSCTL_MONITOR_CONTROL_MODE_SET(mode));
584 }
585 
586 /**
587  * @brief Set minimum frequency for target monitor instance
588  *
589  * @param[in] ptr SYSCTL_Type base address
590  * @param[in] monitor_index specific monitor instance to be used
591  * @param[in] limit measurement low limit
592  */
sysctl_monitor_set_limit_low(SYSCTL_Type * ptr,uint8_t monitor_index,uint32_t limit)593 static inline hpm_stat_t sysctl_monitor_set_limit_low(SYSCTL_Type *ptr,
594                                                   uint8_t monitor_index,
595                                                   uint32_t limit)
596 {
597     if (ptr->MONITOR[monitor_index].CONTROL & SYSCTL_MONITOR_CONTROL_MODE_MASK) {
598         return status_invalid_argument;
599     }
600     ptr->MONITOR[monitor_index].LOW_LIMIT = SYSCTL_MONITOR_LOW_LIMIT_FREQUENCY_SET(limit);
601     return status_success;
602 }
603 
604 /**
605  * @brief Set maximum frequency for target monitor instance
606  *
607  * @param[in] ptr SYSCTL_Type base address
608  * @param[in] monitor_index specific monitor instance to be used
609  * @param[in] limit measurement high limit
610  */
sysctl_monitor_set_limit_high(SYSCTL_Type * ptr,uint8_t monitor_index,uint32_t limit)611 static inline hpm_stat_t sysctl_monitor_set_limit_high(SYSCTL_Type *ptr,
612                                                   uint8_t monitor_index,
613                                                   uint32_t limit)
614 {
615     if (ptr->MONITOR[monitor_index].CONTROL & SYSCTL_MONITOR_CONTROL_MODE_MASK) {
616         return status_invalid_argument;
617     }
618     ptr->MONITOR[monitor_index].HIGH_LIMIT = SYSCTL_MONITOR_HIGH_LIMIT_FREQUENCY_SET(limit);
619     return status_success;
620 }
621 
622 /**
623  * @brief Set frequency limit for target monitor instance
624  *
625  * @param[in] ptr SYSCTL_Type base address
626  * @param[in] monitor_index specific monitor instance to be used
627  * @param[in] limit_high measurement high limit
628  * @param[in] limit_low measurement low limit
629  */
sysctl_monitor_set_limit(SYSCTL_Type * ptr,uint8_t monitor_index,uint32_t limit_high,uint32_t limit_low)630 static inline hpm_stat_t sysctl_monitor_set_limit(SYSCTL_Type *ptr,
631                                                   uint8_t monitor_index,
632                                                   uint32_t limit_high,
633                                                   uint32_t limit_low)
634 {
635     if (ptr->MONITOR[monitor_index].CONTROL & SYSCTL_MONITOR_CONTROL_MODE_MASK) {
636         return status_invalid_argument;
637     }
638     ptr->MONITOR[monitor_index].HIGH_LIMIT = SYSCTL_MONITOR_HIGH_LIMIT_FREQUENCY_SET(limit_high);
639     ptr->MONITOR[monitor_index].LOW_LIMIT = SYSCTL_MONITOR_LOW_LIMIT_FREQUENCY_SET(limit_low);
640     return status_success;
641 }
642 
643 /**
644  * @brief Get maximum frequency for target monitor instance
645  *
646  * @param[in] ptr SYSCTL_Type base address
647  * @param[in] monitor_index specific monitor instance to be used
648  * @return current high limit value
649  */
sysctl_monitor_get_limit_high(SYSCTL_Type * ptr,uint32_t monitor_index)650 static inline uint32_t sysctl_monitor_get_limit_high(SYSCTL_Type *ptr, uint32_t monitor_index)
651 {
652     return SYSCTL_MONITOR_HIGH_LIMIT_FREQUENCY_GET(ptr->MONITOR[monitor_index].HIGH_LIMIT);
653 }
654 
655 /**
656  * @brief Get minimum frequency for target monitor instance
657  *
658  * @param[in] ptr SYSCTL_Type base address
659  * @param[in] monitor_index specific monitor instance to be used
660  * @return current low limit value
661  */
sysctl_monitor_get_limit_low(SYSCTL_Type * ptr,uint32_t monitor_index)662 static inline uint32_t sysctl_monitor_get_limit_low(SYSCTL_Type *ptr, uint32_t monitor_index)
663 {
664     return SYSCTL_MONITOR_LOW_LIMIT_FREQUENCY_SET(ptr->MONITOR[monitor_index].LOW_LIMIT);
665 }
666 
667 /**
668  * @brief Measure specific target frequency
669  *
670  * @param[in] ptr SYSCTL_Type base address
671  * @param[in] monitor_index specific monitor instance to be used
672  * @param[in] target monitor target to be measured
673  * @param[in] enable_output enable clock obs output
674  * @return frequency of monitor target measured
675  */
676 uint32_t sysctl_monitor_measure_frequency(SYSCTL_Type *ptr,
677                                           uint8_t monitor_index,
678                                           monitor_target_t target,
679                                           bool enable_output);
680 
681 /**
682  * @brief Link current CPU core its own group
683  *
684  * Once it is linked, peripherals state in that group will keep on as long as this core is not in low power mode
685  *
686  * @param[in] ptr SYSCTL_Type base address
687  * @param[in] cpu_index cpu index to enable its own affiliated group
688  */
sysctl_set_enable_cpu_affiliate(SYSCTL_Type * ptr,uint8_t cpu_index)689 static inline void sysctl_set_enable_cpu_affiliate(SYSCTL_Type *ptr, uint8_t cpu_index)
690 {
691     ptr->AFFILIATE[cpu_index].SET = 1 << cpu_index;
692 }
693 
694 /**
695  * @brief Unlink current CPU core with its own group
696  *
697  * @param[in] ptr SYSCTL_Type base address
698  * @param[in] cpu_index cpu index to enable its own affiliated group
699  */
sysctl_set_disable_cpu_affiliate(SYSCTL_Type * ptr,uint8_t cpu_index)700 static inline void sysctl_set_disable_cpu_affiliate(SYSCTL_Type *ptr, uint8_t cpu_index)
701 {
702     ptr->AFFILIATE[cpu_index].CLEAR = 1 << cpu_index;
703 }
704 
705 /**
706  * @brief Check if any resource is busy
707  *
708  * @param[in] ptr SYSCTL_Type base address
709  * @return true if any resource is busy
710  */
sysctl_resource_any_is_busy(SYSCTL_Type * ptr)711 static inline bool sysctl_resource_any_is_busy(SYSCTL_Type *ptr)
712 {
713     return ptr->RESOURCE[0] & SYSCTL_RESOURCE_GLB_BUSY_MASK;
714 }
715 
716 /**
717  * @brief Check if specific target is busy
718  *
719  * @param[in] ptr SYSCTL_Type base address
720  * @param[in] resource target resource index
721  * @return true if target resource is busy
722  */
sysctl_resource_target_is_busy(SYSCTL_Type * ptr,sysctl_resource_t resource)723 static inline bool sysctl_resource_target_is_busy(SYSCTL_Type *ptr, sysctl_resource_t resource)
724 {
725     return ptr->RESOURCE[resource] & SYSCTL_RESOURCE_LOC_BUSY_MASK;
726 }
727 
728 /**
729  * @brief Set target mode
730  *
731  * @param[in] ptr SYSCTL_Type base address
732  * @param[in] resource target resource index
733  * @param[in] mode target resource mode
734  */
sysctl_resource_target_set_mode(SYSCTL_Type * ptr,sysctl_resource_t resource,sysctl_resource_mode_t mode)735 static inline void sysctl_resource_target_set_mode(SYSCTL_Type *ptr,
736                                                    sysctl_resource_t resource,
737                                                    sysctl_resource_mode_t mode)
738 {
739     ptr->RESOURCE[resource] =
740         (ptr->RESOURCE[resource] & ~SYSCTL_RESOURCE_MODE_MASK) |
741         SYSCTL_RESOURCE_MODE_SET(mode);
742 }
743 
744 /**
745  * @brief Disable resource retention when specific CPU enters stop mode
746  *
747  * @param[in] ptr SYSCTL_Type base address
748  * @param[in] cpu_index cpu index
749  * @param[in] mask bit mask to clear
750  */
sysctl_cpu_lp_clear_retention_with_mask(SYSCTL_Type * ptr,uint8_t cpu_index,uint32_t mask)751 static inline void sysctl_cpu_lp_clear_retention_with_mask(SYSCTL_Type *ptr,
752                                                         uint8_t cpu_index,
753                                                         uint32_t mask)
754 {
755     ptr->RETENTION[cpu_index].CLEAR = mask;
756 }
757 
758 /**
759  * @brief Enable resource retention when specific CPU enters stop mode
760  *
761  * @param[in] ptr SYSCTL_Type base address
762  * @param[in] cpu_index cpu index
763  * @param[in] mask bit mask to set
764  */
sysctl_cpu_lp_set_retention_with_mask(SYSCTL_Type * ptr,uint8_t cpu_index,uint32_t mask)765 static inline void sysctl_cpu_lp_set_retention_with_mask(SYSCTL_Type *ptr,
766                                             uint8_t cpu_index,
767                                             uint32_t mask)
768 {
769     ptr->RETENTION[cpu_index].SET = mask;
770 }
771 
772 /**
773  * @brief Retain target domain for specific CPU
774  *
775  * @param[in] ptr SYSCTL_Type base address
776  * @param[in] cpu_index CPU index
777  * @param[in] domain target domain power to be retained
778  * @param[in] retain_mem set true to retain memory/register of target domain
779  */
sysctl_cpu_lp_retain_domain(SYSCTL_Type * ptr,uint8_t cpu_index,sysctl_retention_domain_t domain,bool retain_mem)780 static inline void sysctl_cpu_lp_retain_domain(SYSCTL_Type *ptr,
781                                                uint8_t cpu_index,
782                                                sysctl_retention_domain_t domain,
783                                                bool retain_mem)
784 {
785     uint8_t set_mask = 0x1;
786     if (domain < sysctl_retention_domain_xtal24m) {
787         set_mask = retain_mem ? 0x3 : 0x1;
788     }
789     ptr->RETENTION[cpu_index].SET = (set_mask << domain);
790 }
791 
792 /**
793  * @brief Check if any clock is busy
794  *
795  * @param[in] ptr SYSCTL_Type base address
796  * @return true if any clock is busy
797  */
sysctl_clock_any_is_busy(SYSCTL_Type * ptr)798 static inline bool sysctl_clock_any_is_busy(SYSCTL_Type *ptr)
799 {
800     return ptr->CLOCK[0] & SYSCTL_CLOCK_GLB_BUSY_MASK;
801 }
802 
803 /**
804  * @brief Check if target clock is busy
805  *
806  * @param[in] ptr SYSCTL_Type base address
807  * @param[in] clock target clock
808  * @return true if target clock is busy
809  */
sysctl_clock_target_is_busy(SYSCTL_Type * ptr,uint32_t clock)810 static inline bool sysctl_clock_target_is_busy(SYSCTL_Type *ptr,
811                                                uint32_t clock)
812 {
813     return ptr->CLOCK[clock] & SYSCTL_CLOCK_LOC_BUSY_MASK;
814 }
815 
816 /**
817  * @brief Set clock preset
818  *
819  * @param[in] ptr SYSCTL_Type base address
820  * @param[in] preset preset
821  */
sysctl_clock_set_preset(SYSCTL_Type * ptr,sysctl_preset_t preset)822 static inline void sysctl_clock_set_preset(SYSCTL_Type *ptr,
823                                            sysctl_preset_t preset)
824 {
825     ptr->GLOBAL00 = (ptr->GLOBAL00 & ~SYSCTL_GLOBAL00_PRESET_MASK)
826                 | SYSCTL_GLOBAL00_PRESET_SET(preset);
827 }
828 
829 /**
830  * @brief Check if target reset domain wakeup status
831  *
832  * @param[in] ptr SYSCTL_Type base address
833  * @param[in] domain target domain to be checked
834  * @return true if target domain was taken wakeup reset
835  */
sysctl_reset_check_target_domain_wakeup_flag(SYSCTL_Type * ptr,sysctl_reset_domain_t domain)836 static inline bool sysctl_reset_check_target_domain_wakeup_flag(SYSCTL_Type *ptr,
837                                                                 sysctl_reset_domain_t domain)
838 {
839     return ptr->RESET[domain].CONTROL & SYSCTL_RESET_CONTROL_FLAG_WAKE_MASK;
840 }
841 
842 /**
843  * @brief Clear target reset domain wakeup status
844  *
845  * @param[in] ptr SYSCTL_Type base address
846  * @param[in] domain target domain to be checked
847  */
sysctl_reset_clear_target_domain_wakeup_flag(SYSCTL_Type * ptr,sysctl_reset_domain_t domain)848 static inline void sysctl_reset_clear_target_domain_wakeup_flag(SYSCTL_Type *ptr,
849                                                                 sysctl_reset_domain_t domain)
850 {
851     ptr->RESET[domain].CONTROL |= SYSCTL_RESET_CONTROL_FLAG_WAKE_MASK;
852 }
853 
854 /**
855  * @brief Clear target reset domain reset status
856  *
857  * @param[in] ptr SYSCTL_Type base address
858  * @param[in] domain target domain to be checked
859  * @return true if target domain was taken reset
860  */
sysctl_reset_check_target_domain_flag(SYSCTL_Type * ptr,sysctl_reset_domain_t domain)861 static inline bool sysctl_reset_check_target_domain_flag(SYSCTL_Type *ptr,
862                                                          sysctl_reset_domain_t domain)
863 {
864     return ptr->RESET[domain].CONTROL & SYSCTL_RESET_CONTROL_FLAG_MASK;
865 }
866 
867 /**
868  * @brief Clear target reset domain reset status
869  *
870  * @param[in] ptr SYSCTL_Type base address
871  * @param[in] domain target domain to be checked
872  */
sysctl_reset_clear_target_domain_flag(SYSCTL_Type * ptr,sysctl_reset_domain_t domain)873 static inline void sysctl_reset_clear_target_domain_flag(SYSCTL_Type *ptr,
874                                                          sysctl_reset_domain_t domain)
875 {
876     ptr->RESET[domain].CONTROL |= SYSCTL_RESET_CONTROL_FLAG_MASK;
877 }
878 
879 /**
880  * @brief Clear target reset domain for all reset status
881  *
882  * @param[in] ptr SYSCTL_Type base address
883  * @param[in] domain target domain to be checked
884  */
sysctl_reset_clear_target_domain_all_flags(SYSCTL_Type * ptr,sysctl_reset_domain_t domain)885 static inline void sysctl_reset_clear_target_domain_all_flags(SYSCTL_Type *ptr,
886                                                               sysctl_reset_domain_t domain)
887 {
888     ptr->RESET[domain].CONTROL |= SYSCTL_RESET_CONTROL_FLAG_MASK | SYSCTL_RESET_CONTROL_FLAG_WAKE_MASK;
889 }
890 
891 /**
892  * @brief Get target CPU wakeup source status
893  *
894  * @param[in] ptr SYSCTL_Type base address
895  * @param[in] cpu_index CPU index
896  * @param[in] status_index wakeup status index 0 - 7
897  * @return wakeup source status mask
898  */
sysctl_get_wakeup_source_status(SYSCTL_Type * ptr,uint8_t cpu_index,uint8_t status_index)899 static inline uint32_t sysctl_get_wakeup_source_status(SYSCTL_Type *ptr,
900                                                        uint8_t cpu_index,
901                                                        uint8_t status_index)
902 {
903     return ptr->CPU[cpu_index].WAKEUP_STATUS[status_index];
904 }
905 
906 /**
907  * @brief Check wakeup source status with mask
908  *
909  * @param[in] ptr SYSCTL_Type base address
910  * @param[in] cpu_index CPU index
911  * @param[in] status_index wakeup status index 0 - 7
912  * @param[in] mask expected status mask
913  * @return wakeup status according to given bit mask
914  */
915 static inline
sysctl_check_wakeup_source_status_with_mask(SYSCTL_Type * ptr,uint8_t cpu_index,uint8_t status_index,uint32_t mask)916     uint32_t sysctl_check_wakeup_source_status_with_mask(SYSCTL_Type *ptr,
917                                                          uint8_t cpu_index,
918                                                          uint8_t status_index,
919                                                          uint32_t mask)
920 {
921     return ptr->CPU[cpu_index].WAKEUP_STATUS[status_index] & mask;
922 }
923 
924 /**
925  * @brief Enable wakeup source status with mask
926  *
927  * @param[in] ptr SYSCTL_Type base address
928  * @param[in] cpu_index CPU index
929  * @param[in] enable_index wakeup enable index 0 - 7
930  * @param[in] mask expected status mask
931  */
932 static inline
sysctl_enable_wakeup_source_with_mask(SYSCTL_Type * ptr,uint8_t cpu_index,uint8_t enable_index,uint32_t mask)933     void sysctl_enable_wakeup_source_with_mask(SYSCTL_Type *ptr,
934                                                uint8_t cpu_index,
935                                                uint8_t enable_index,
936                                                uint32_t mask)
937 {
938     ptr->CPU[cpu_index].WAKEUP_ENABLE[enable_index] |= mask;
939 }
940 
941 /**
942  * @brief Disable wakeup source status with mask
943  *
944  * @param[in] ptr SYSCTL_Type base address
945  * @param[in] cpu_index CPU index
946  * @param[in] enable_index wakeup enable index 0 - 7
947  * @param[in] mask expected status mask
948  */
949 static inline
sysctl_disable_wakeup_source_with_mask(SYSCTL_Type * ptr,uint8_t cpu_index,uint8_t enable_index,uint32_t mask)950     void sysctl_disable_wakeup_source_with_mask(SYSCTL_Type *ptr,
951                                                 uint8_t cpu_index,
952                                                 uint8_t enable_index,
953                                                 uint32_t mask)
954 {
955     ptr->CPU[cpu_index].WAKEUP_ENABLE[enable_index] &= ~mask;
956 }
957 
958 /**
959  * @brief Disable wakeup source status with irq
960  *
961  * @param[in] ptr SYSCTL_Type base address
962  * @param[in] cpu_index CPU index
963  * @param[in] irq_num irq number to be set as wakeup source
964  */
sysctl_disable_wakeup_source_with_irq(SYSCTL_Type * ptr,uint8_t cpu_index,uint16_t irq_num)965 static inline void sysctl_disable_wakeup_source_with_irq(SYSCTL_Type *ptr,
966                                                          uint8_t cpu_index,
967                                                          uint16_t irq_num)
968 {
969     ptr->CPU[cpu_index].WAKEUP_ENABLE[irq_num >> 2] &= ~(1UL << (irq_num % 32));
970 }
971 
972 /**
973  * @brief Enable wakeup source status with irq
974  *
975  * @param[in] ptr SYSCTL_Type base address
976  * @param[in] cpu_index CPU index
977  * @param[in] irq_num irq number to be set as wakeup source
978  */
sysctl_enable_wakeup_source_with_irq(SYSCTL_Type * ptr,uint8_t cpu_index,uint16_t irq_num)979 static inline void sysctl_enable_wakeup_source_with_irq(SYSCTL_Type *ptr,
980                                                         uint8_t cpu_index,
981                                                         uint16_t irq_num)
982 {
983     ptr->CPU[cpu_index].WAKEUP_ENABLE[irq_num / 32] |= 1UL << (irq_num % 32);
984 }
985 
986 /**
987  * @brief Lock CPU0 gpr with mask
988  *
989  * @param[in] ptr SYSCTL_Type base address
990  * @param[in] gpr_mask bit mask of gpr registers to be locked
991  */
sysctl_cpu0_lock_gpr_with_mask(SYSCTL_Type * ptr,uint16_t gpr_mask)992 static inline void sysctl_cpu0_lock_gpr_with_mask(SYSCTL_Type *ptr,
993                                                  uint16_t gpr_mask)
994 {
995     ptr->CPU[0].LOCK |= SYSCTL_CPU_LOCK_GPR_SET(gpr_mask);
996 }
997 
998 /**
999  * @brief Lock CPU1 gpr with mask
1000  *
1001  * @param[in] ptr SYSCTL_Type base address
1002  * @param[in] gpr_mask bit mask of gpr registers to be locked
1003  */
sysctl_cpu1_lock_gpr_with_mask(SYSCTL_Type * ptr,uint16_t gpr_mask)1004 static inline void sysctl_cpu1_lock_gpr_with_mask(SYSCTL_Type *ptr,
1005                                                  uint16_t gpr_mask)
1006 {
1007     ptr->CPU[1].LOCK |= SYSCTL_CPU_LOCK_GPR_SET(gpr_mask);
1008 }
1009 
1010 /**
1011  * @brief Lock CPU0 lock
1012  *
1013  * @param[in] ptr SYSCTL_Type base address
1014  */
sysctl_cpu0_lock(SYSCTL_Type * ptr)1015 static inline void sysctl_cpu0_lock(SYSCTL_Type *ptr)
1016 {
1017     ptr->CPU[0].LOCK |= SYSCTL_CPU_LOCK_LOCK_MASK;
1018 }
1019 
1020 /**
1021  * @brief Lock CPU1 lock
1022  *
1023  * @param[in] ptr SYSCTL_Type base address
1024  */
sysctl_cpu1_lock(SYSCTL_Type * ptr)1025 static inline void sysctl_cpu1_lock(SYSCTL_Type *ptr)
1026 {
1027     ptr->CPU[1].LOCK |= SYSCTL_CPU_LOCK_LOCK_MASK;
1028 }
1029 
1030 /**
1031  * @brief Config lock
1032  *
1033  * @param[in] ptr SYSCTL_Type base address
1034  * @param[in] node clock node to be configured
1035  * @param[in] source clock source to be used
1036  * @param[in] divide_by clock frequency divider
1037  * @return status_success if everything is okay
1038  */
1039 hpm_stat_t sysctl_config_clock(SYSCTL_Type *ptr,
1040                                clock_node_t node,
1041                                clock_source_t source,
1042                                uint32_t divide_by);
1043 
1044 /**
1045  * @brief Set ADC/I2S clock mux
1046  *
1047  * @param[in] ptr SYSCTL_Type base address
1048  * @param[in] node clock node to be configured
1049  * @param[in] source clock source to be used
1050  * @return status_success if everything is okay
1051  */
1052 hpm_stat_t sysctl_set_adc_i2s_clock_mux(SYSCTL_Type *ptr,
1053                                         clock_node_t node,
1054                                         clock_source_adc_i2s_t source);
1055 
1056 /**
1057  * @brief Set CPU low power mode
1058  *
1059  * @param[in] ptr SYSCTL_Type base address
1060  * @param[in] cpu_index cpu index
1061  * @param[in] mode target mode to set
1062  * @return status_success if everything is okay
1063  */
1064 hpm_stat_t sysctl_set_cpu_lp_mode(SYSCTL_Type *ptr,
1065                                   uint8_t cpu_index,
1066                                   cpu_lp_mode_t mode);
1067 
1068 /**
1069  * @brief Enable group resource
1070  *
1071  * @param[in] ptr SYSCTL_Type base address
1072  * @param[in] group target group to be modified
1073  * @param[in] resource target resource to be added/removed from group
1074  * @param[in] enable set true to add resource, remove otherwise
1075  * @return status_success if everything is okay
1076  */
1077 hpm_stat_t sysctl_enable_group_resource(SYSCTL_Type *ptr,
1078                                         uint8_t group,
1079                                         sysctl_resource_t resource,
1080                                         bool enable);
1081 /**
1082  * @brief Add resource to CPU0
1083  *
1084  * @param[in] ptr SYSCTL_Type base address
1085  * @param[in] resource resource to be added to CPU0
1086  * @return status_success if everything is okay
1087  */
1088 hpm_stat_t sysctl_add_resource_to_cpu0(SYSCTL_Type *ptr, sysctl_resource_t resource);
1089 
1090 /**
1091  * @brief Remove resource from CPU0
1092  *
1093  * @param[in] ptr SYSCTL_Type base address
1094  * @param[in] resource Resource to be removed to CPU0
1095  * @return status_success if everything is okay
1096  */
1097 hpm_stat_t sysctl_remove_resource_from_cpu0(SYSCTL_Type *ptr, sysctl_resource_t resource);
1098 
1099 /**
1100  * @brief Add resource to CPU1
1101  *
1102  * @param[in] ptr SYSCTL_Type base address
1103  * @param[in] resource Resource to be added to CPU1
1104  * @return status_success if everything is okay
1105  */
1106 hpm_stat_t sysctl_add_resource_to_cpu1(SYSCTL_Type *ptr, sysctl_resource_t resource);
1107 
1108 /**
1109  * @brief Remove resource from CPU1
1110  *
1111  * @param[in] ptr SYSCTL_Type base address
1112  * @param[in] resource Resource to be removed to CPU1
1113  * @return status_success if everything is okay
1114  */
1115 hpm_stat_t sysctl_remove_resource_from_cpu1(SYSCTL_Type *ptr, sysctl_resource_t resource);
1116 
1117 /**
1118  * @brief Get default monitor config
1119  *
1120  * @param[in] ptr SYSCTL_Type base address
1121  * @param[in] config Monitor config structure pointer
1122  */
1123 void sysctl_monitor_get_default_config(SYSCTL_Type *ptr, monitor_config_t *config);
1124 
1125 /**
1126  * @brief Initialize Monitor
1127  *
1128  * @param[in] ptr SYSCTL_Type base address
1129  * @param[in] monitor_index Monitor instance to be initialized
1130  * @param[in] config Monitor config structure pointer
1131  */
1132 void sysctl_monitor_init(SYSCTL_Type *ptr,
1133                          uint8_t monitor_index,
1134                          monitor_config_t *config);
1135 
1136 /**
1137  * @brief Save data to GPU0 GPR starting from given index
1138  *
1139  * @param[in] ptr SYSCTL_Type base address
1140  * @param[in] start Starting GPR index
1141  * @param[in] count Number of GPR registers to set
1142  * @param[in] data Pointer to data buffer
1143  * @param[in] lock Set true to lock written GPR registers after setting
1144  * @return status_success if everything is okay
1145  */
1146 hpm_stat_t sysctl_cpu0_set_gpr(SYSCTL_Type *ptr,
1147                                uint8_t start,
1148                                uint8_t count,
1149                                uint32_t *data,
1150                                bool lock);
1151 
1152 /**
1153  * @brief Get data saved from GPU0 GPR starting from given index
1154  *
1155  * @param[in] ptr SYSCTL_Type base address
1156  * @param[in] start Starting GPR index
1157  * @param[in] count Number of GPR registers to set
1158  * @param[out] data Pointer of buffer to save data
1159  * @return status_success if everything is okay
1160  */
1161 hpm_stat_t sysctl_cpu0_get_gpr(SYSCTL_Type *ptr,
1162                                uint8_t start,
1163                                uint8_t count,
1164                                uint32_t *data);
1165 
1166 /**
1167  * @brief Set data to CPU1 GPR starting from given index
1168  *
1169  * @param[in] ptr SYSCTL_Type base address
1170  * @param[in] start Starting GPR index
1171  * @param[in] count Number of GPR registers to set
1172  * @param[in] data Pointer to data buffer
1173  * @param[in] lock Set true to lock written GPR registers after setting
1174  * @return status_success if everything is okay
1175  */
1176 hpm_stat_t sysctl_cpu1_set_gpr(SYSCTL_Type *ptr,
1177                                uint8_t start,
1178                                uint8_t count,
1179                                uint32_t *data,
1180                                bool lock);
1181 
1182 /**
1183  * @brief Get data saved in CPU1 GPR starting from given index
1184  *
1185  * @param[in] ptr SYSCTL_Type base address
1186  * @param[in] start Starting GPR index
1187  * @param[in] count Number of GPR registers to set
1188  * @param[out] data Pointer of buffer to save data
1189  * @return status_success if everything is okay
1190  */
1191 hpm_stat_t sysctl_get_cpu1_gpr(SYSCTL_Type *ptr,
1192                                uint8_t start,
1193                                uint8_t count,
1194                                uint32_t *data);
1195 /**
1196  * @brief Release cpu1
1197  *
1198  * @param[in] ptr SYSCTL_Type base address
1199  */
1200 void sysctl_release_cpu1(SYSCTL_Type *ptr);
1201 
1202 /**
1203  * @brief Check whether CPU1 is released or not
1204  *
1205  * @param [in] ptr SYSCTL_Type base address
1206  * @retval true CPU1 is released
1207  * @retval false CPU1 is on-hold
1208  */
1209 bool sysctl_is_cpu1_released(SYSCTL_Type *ptr);
1210 
1211 /**
1212  * @brief Set entry point on CPU0 wakeup
1213  *
1214  * @param[in] ptr SYSCTL_Type base address
1215  * @param[in] entry Entry address for CPU0 on its wakeup
1216  * @return status_success if everything is okay
1217  */
1218 hpm_stat_t sysctl_set_cpu0_wakeup_entry(SYSCTL_Type *ptr, uint32_t entry);
1219 
1220 /**
1221  * @brief Set entry point on either CPU1 boot or wakeup
1222  *
1223  * @param[in] ptr SYSCTL_Type base address
1224  * @param[in] entry Entry address for CPU1
1225  * @return status_success if everything is okay
1226  */
1227 hpm_stat_t sysctl_set_cpu1_entry(SYSCTL_Type *ptr, uint32_t entry);
1228 
1229 #ifdef __cplusplus
1230 }
1231 #endif
1232 /**
1233  * @}
1234  */
1235 #endif /* HPM_SYSCTL_DRV_H */
1236