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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *  linux/include/linux/mmc/host.h
4  *
5  *  Host driver specific definitions.
6  */
7 #ifndef LINUX_MMC_HOST_H
8 #define LINUX_MMC_HOST_H
9 
10 #include <linux/sched.h>
11 #include <linux/device.h>
12 #include <linux/fault-inject.h>
13 
14 #include <linux/mmc/core.h>
15 #include <linux/mmc/card.h>
16 #include <linux/mmc/pm.h>
17 #include <linux/dma-direction.h>
18 
19 struct mmc_ios {
20     unsigned int clock; /* clock rate */
21     unsigned short vdd;
22     unsigned int power_delay_ms; /* waiting for stable power */
23 
24     /* vdd stores the bit number of the selected voltage range from below. */
25 
26     unsigned char bus_mode; /* command output mode */
27 
28 #define MMC_BUSMODE_OPENDRAIN 1
29 #define MMC_BUSMODE_PUSHPULL 2
30 
31     unsigned char chip_select; /* SPI chip select */
32 
33 #define MMC_CS_DONTCARE 0
34 #define MMC_CS_HIGH 1
35 #define MMC_CS_LOW 2
36 
37     unsigned char power_mode; /* power supply mode */
38 
39 #define MMC_POWER_OFF 0
40 #define MMC_POWER_UP 1
41 #define MMC_POWER_ON 2
42 #define MMC_POWER_UNDEFINED 3
43 
44     unsigned char bus_width; /* data bus width */
45 
46 #define MMC_BUS_WIDTH_1 0
47 #define MMC_BUS_WIDTH_4 2
48 #define MMC_BUS_WIDTH_8 3
49 
50     unsigned char timing; /* timing specification used */
51 
52 #define MMC_TIMING_LEGACY 0
53 #define MMC_TIMING_MMC_HS 1
54 #define MMC_TIMING_SD_HS 2
55 #define MMC_TIMING_UHS_SDR12 3
56 #define MMC_TIMING_UHS_SDR25 4
57 #define MMC_TIMING_UHS_SDR50 5
58 #define MMC_TIMING_UHS_SDR104 6
59 #define MMC_TIMING_UHS_DDR50 7
60 #define MMC_TIMING_MMC_DDR52 8
61 #define MMC_TIMING_MMC_HS200 9
62 #define MMC_TIMING_MMC_HS400 10
63 
64     unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
65 
66 #define MMC_SIGNAL_VOLTAGE_330 0
67 #define MMC_SIGNAL_VOLTAGE_180 1
68 #define MMC_SIGNAL_VOLTAGE_120 2
69 
70     unsigned char drv_type; /* driver type (A, B, C, D) */
71 
72 #define MMC_SET_DRIVER_TYPE_B 0
73 #define MMC_SET_DRIVER_TYPE_A 1
74 #define MMC_SET_DRIVER_TYPE_C 2
75 #define MMC_SET_DRIVER_TYPE_D 3
76 
77     bool enhanced_strobe; /* hs400es selection */
78 };
79 
80 struct mmc_host;
81 
82 struct mmc_host_ops {
83     /*
84      * It is optional for the host to implement pre_req and post_req in
85      * order to support double buffering of requests (prepare one
86      * request while another request is active).
87      * pre_req() must always be followed by a post_req().
88      * To undo a call made to pre_req(), call post_req() with
89      * a nonzero err condition.
90      */
91     void (*post_req)(struct mmc_host *host, struct mmc_request *req, int err);
92     void (*pre_req)(struct mmc_host *host, struct mmc_request *req);
93     void (*request)(struct mmc_host *host, struct mmc_request *req);
94     /* Submit one request to host in atomic context. */
95     int (*request_atomic)(struct mmc_host *host, struct mmc_request *req);
96 
97     /*
98      * Avoid calling the next three functions too often or in a "fast
99      * path", since underlaying controller might implement them in an
100      * expensive and/or slow way. Also note that these functions might
101      * sleep, so don't call them in the atomic contexts!
102      */
103 
104     /*
105      * Notes to the set_ios callback:
106      * ios->clock might be 0. For some controllers, setting 0Hz
107      * as any other frequency works. However, some controllers
108      * explicitly need to disable the clock. Otherwise e.g. voltage
109      * switching might fail because the SDCLK is not really quiet.
110      */
111     void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
112 
113     /*
114      * Return values for the get_ro callback should be:
115      *   0 for a read/write card
116      *   1 for a read-only card
117      *   -ENOSYS when not supported (equal to NULL callback)
118      *   or a negative errno value when something bad happened
119      */
120     int (*get_ro)(struct mmc_host *host);
121 
122     /*
123      * Return values for the get_cd callback should be:
124      *   0 for a absent card
125      *   1 for a present card
126      *   -ENOSYS when not supported (equal to NULL callback)
127      *   or a negative errno value when something bad happened
128      */
129     int (*get_cd)(struct mmc_host *host);
130 
131     void (*enable_sdio_irq)(struct mmc_host *host, int enable);
132     /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */
133     void (*ack_sdio_irq)(struct mmc_host *host);
134 
135     /* optional callback for HC quirks */
136     void (*init_card)(struct mmc_host *host, struct mmc_card *card);
137 
138     int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
139 
140     /* Check if the card is pulling dat[0:3] low */
141     int (*card_busy)(struct mmc_host *host);
142     int (*set_sdio_status)(struct mmc_host *host, int val);
143 
144     /* The tuning command opcode value is different for SD and eMMC cards */
145     int (*execute_tuning)(struct mmc_host *host, u32 opcode);
146 
147     /* Prepare HS400 target operating frequency depending host driver */
148     int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
149 
150     /* Prepare switch to DDR during the HS400 init sequence */
151     int (*hs400_prepare_ddr)(struct mmc_host *host);
152 
153     /* Prepare for switching from HS400 to HS200 */
154     void (*hs400_downgrade)(struct mmc_host *host);
155 
156     /* Complete selection of HS400 */
157     void (*hs400_complete)(struct mmc_host *host);
158 
159     /* Prepare enhanced strobe depending host driver */
160     void (*hs400_enhanced_strobe)(struct mmc_host *host, struct mmc_ios *ios);
161     int (*select_drive_strength)(struct mmc_card *card, unsigned int max_dtr, int host_drv, int card_drv,
162                                  int *drv_type);
163     /* Reset the eMMC card via RST_n */
164     void (*hw_reset)(struct mmc_host *host);
165     void (*card_event)(struct mmc_host *host);
166 
167     /*
168      * Optional callback to support controllers with HW issues for multiple
169      * I/O. Returns the number of supported blocks for the request.
170      */
171     int (*multi_io_quirk)(struct mmc_card *card, unsigned int direction, int blk_size);
172 };
173 
174 struct mmc_cqe_ops {
175     /* Allocate resources, and make the CQE operational */
176     int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
177     /* Free resources, and make the CQE non-operational */
178     void (*cqe_disable)(struct mmc_host *host);
179     /*
180      * Issue a read, write or DCMD request to the CQE. Also deal with the
181      * effect of ->cqe_off().
182      */
183     int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
184     /* Free resources (e.g. DMA mapping) associated with the request */
185     void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
186     /*
187      * Prepare the CQE and host controller to accept non-CQ commands. There
188      * is no corresponding ->cqe_on(), instead ->cqe_request() is required
189      * to deal with that.
190      */
191     void (*cqe_off)(struct mmc_host *host);
192     /*
193      * Wait for all CQE tasks to complete. Return an error if recovery
194      * becomes necessary.
195      */
196     int (*cqe_wait_for_idle)(struct mmc_host *host);
197     /*
198      * Notify CQE that a request has timed out. Return false if the request
199      * completed or true if a timeout happened in which case indicate if
200      * recovery is needed.
201      */
202     bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq, bool *recovery_needed);
203     /*
204      * Stop all CQE activity and prepare the CQE and host controller to
205      * accept recovery commands.
206      */
207     void (*cqe_recovery_start)(struct mmc_host *host);
208     /*
209      * Clear the queue and call mmc_cqe_request_done() on all requests.
210      * Requests that errored will have the error set on the mmc_request
211      * (data->error or cmd->error for DCMD).  Requests that did not error
212      * will have zero data bytes transferred.
213      */
214     void (*cqe_recovery_finish)(struct mmc_host *host);
215 };
216 
217 struct mmc_async_req {
218     /* active mmc request */
219     struct mmc_request *mrq;
220     /*
221      * Check error status of completed mmc request.
222      * Returns 0 if success otherwise non zero.
223      */
224     enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
225 };
226 
227 /**
228  * struct mmc_slot - MMC slot functions
229  *
230  * @cd_irq:        MMC/SD-card slot hotplug detection IRQ or -EINVAL
231  * @handler_priv:    MMC/SD-card slot context
232  *
233  * Some MMC/SD host controllers implement slot-functions like card and
234  * write-protect detection natively. However, a large number of controllers
235  * leave these functions to the CPU. This struct provides a hook to attach
236  * such slot-function drivers.
237  */
238 struct mmc_slot {
239     int cd_irq;
240     bool cd_wake_enabled;
241     void *handler_priv;
242 };
243 
244 /**
245  * mmc_context_info - synchronization details for mmc context
246  * @is_done_rcv        wake up reason was done request
247  * @is_new_req        wake up reason was new request
248  * @is_waiting_last_req    mmc context waiting for single running request
249  * @wait        wait queue
250  */
251 struct mmc_context_info {
252     bool is_done_rcv;
253     bool is_new_req;
254     bool is_waiting_last_req;
255     wait_queue_head_t wait;
256 };
257 
258 struct regulator;
259 struct mmc_pwrseq;
260 
261 struct mmc_supply {
262     struct regulator *vmmc;  /* Card power supply */
263     struct regulator *vqmmc; /* Optional Vccq supply */
264 };
265 
266 struct mmc_ctx {
267     struct task_struct *task;
268 };
269 
270 struct mmc_host {
271     struct device *parent;
272     struct device class_dev;
273     int index;
274     const struct mmc_host_ops *ops;
275     struct mmc_pwrseq *pwrseq;
276     unsigned int f_min;
277     unsigned int f_max;
278     unsigned int f_init;
279     u32 ocr_avail;
280     u32 ocr_avail_sdio;       /* SDIO-specific OCR */
281     u32 ocr_avail_sd;         /* SD-specific OCR */
282     u32 ocr_avail_mmc;        /* MMC-specific OCR */
283     struct wakeup_source *ws; /* Enable consume of uevents */
284     u32 max_current_330;
285     u32 max_current_300;
286     u32 max_current_180;
287 
288 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
289 #define MMC_VDD_20_21 0x00000100   /* VDD voltage 2.0 ~ 2.1 */
290 #define MMC_VDD_21_22 0x00000200   /* VDD voltage 2.1 ~ 2.2 */
291 #define MMC_VDD_22_23 0x00000400   /* VDD voltage 2.2 ~ 2.3 */
292 #define MMC_VDD_23_24 0x00000800   /* VDD voltage 2.3 ~ 2.4 */
293 #define MMC_VDD_24_25 0x00001000   /* VDD voltage 2.4 ~ 2.5 */
294 #define MMC_VDD_25_26 0x00002000   /* VDD voltage 2.5 ~ 2.6 */
295 #define MMC_VDD_26_27 0x00004000   /* VDD voltage 2.6 ~ 2.7 */
296 #define MMC_VDD_27_28 0x00008000   /* VDD voltage 2.7 ~ 2.8 */
297 #define MMC_VDD_28_29 0x00010000   /* VDD voltage 2.8 ~ 2.9 */
298 #define MMC_VDD_29_30 0x00020000   /* VDD voltage 2.9 ~ 3.0 */
299 #define MMC_VDD_30_31 0x00040000   /* VDD voltage 3.0 ~ 3.1 */
300 #define MMC_VDD_31_32 0x00080000   /* VDD voltage 3.1 ~ 3.2 */
301 #define MMC_VDD_32_33 0x00100000   /* VDD voltage 3.2 ~ 3.3 */
302 #define MMC_VDD_33_34 0x00200000   /* VDD voltage 3.3 ~ 3.4 */
303 #define MMC_VDD_34_35 0x00400000   /* VDD voltage 3.4 ~ 3.5 */
304 #define MMC_VDD_35_36 0x00800000   /* VDD voltage 3.5 ~ 3.6 */
305 
306     u32 caps; /* Host capabilities */
307 
308 #define MMC_CAP_4_BIT_DATA (1 << 0)      /* Can the host do 4 bit transfers */
309 #define MMC_CAP_MMC_HIGHSPEED (1 << 1)   /* Can do MMC high-speed timing */
310 #define MMC_CAP_SD_HIGHSPEED (1 << 2)    /* Can do SD high-speed timing */
311 #define MMC_CAP_SDIO_IRQ (1 << 3)        /* Can signal pending SDIO IRQs */
312 #define MMC_CAP_SPI (1 << 4)             /* Talks only SPI protocols */
313 #define MMC_CAP_NEEDS_POLL (1 << 5)      /* Needs polling for card-detection */
314 #define MMC_CAP_8_BIT_DATA (1 << 6)      /* Can the host do 8 bit transfers */
315 #define MMC_CAP_AGGRESSIVE_PM (1 << 7)   /* Suspend (e)MMC/SD at idle  */
316 #define MMC_CAP_NONREMOVABLE (1 << 8)    /* Nonremovable e.g. eMMC */
317 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
318 #define MMC_CAP_3_3V_DDR (1 << 11)       /* Host supports eMMC DDR 3.3V */
319 #define MMC_CAP_1_8V_DDR (1 << 12)       /* Host supports eMMC DDR 1.8V */
320 #define MMC_CAP_1_2V_DDR (1 << 13)       /* Host supports eMMC DDR 1.2V */
321 #define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | MMC_CAP_1_2V_DDR)
322 #define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */
323 #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */
324 #define MMC_CAP_UHS_SDR12 (1 << 16)      /* Host supports UHS SDR12 mode */
325 #define MMC_CAP_UHS_SDR25 (1 << 17)      /* Host supports UHS SDR25 mode */
326 #define MMC_CAP_UHS_SDR50 (1 << 18)      /* Host supports UHS SDR50 mode */
327 #define MMC_CAP_UHS_SDR104 (1 << 19)     /* Host supports UHS SDR104 mode */
328 #define MMC_CAP_UHS_DDR50 (1 << 20)      /* Host supports UHS DDR50 mode */
329 #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_DDR50)
330 #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) /* Synced runtime PM suspends. */
331 #define MMC_CAP_NEED_RSP_BUSY (1 << 22)   /* Commands with R1B can't use R1. */
332 #define MMC_CAP_DRIVER_TYPE_A (1 << 23)   /* Host supports Driver Type A */
333 #define MMC_CAP_DRIVER_TYPE_C (1 << 24)   /* Host supports Driver Type C */
334 #define MMC_CAP_DRIVER_TYPE_D (1 << 25)   /* Host supports Driver Type D */
335 #define MMC_CAP_DONE_COMPLETE (1 << 27)   /* RW reqs can be completed within mmc_request_done() */
336 #define MMC_CAP_CD_WAKE (1 << 28)         /* Enable card detect wake */
337 #define MMC_CAP_CMD_DURING_TFR (1 << 29)  /* Commands during data transfer */
338 #define MMC_CAP_CMD23 (1 << 30)           /* CMD23 supported. */
339 #define MMC_CAP_HW_RESET (1 << 31)        /* Reset the eMMC card via RST_n */
340 
341     u32 caps2; /* More host capabilities */
342 
343 #define MMC_CAP2_BOOTPART_NOACC (1 << 0)            /* Boot partition no access */
344 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)            /* Can do full power cycle */
345 #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */
346 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5)            /* can support */
347 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6)            /* can support */
348 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS200_1_2V_SDR)
349 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)     /* Card-detect signal active high */
350 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)     /* Write-protect signal active high */
351 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
352 #define MMC_CAP2_HS400_1_8V (1 << 15)         /* Can support HS400 1.8V */
353 #define MMC_CAP2_HS400_1_2V (1 << 16)         /* Can support HS400 1.2V */
354 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | MMC_CAP2_HS400_1_2V)
355 #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
356 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
357 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
358 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
359 #define MMC_CAP2_NO_SDIO (1 << 19)          /* Do not send SDIO commands during initialization */
360 #define MMC_CAP2_HS400_ES (1 << 20)         /* Host supports enhanced strobe */
361 #define MMC_CAP2_NO_SD (1 << 21)            /* Do not send SD commands during initialization */
362 #define MMC_CAP2_NO_MMC (1 << 22)           /* Do not send (e)MMC commands during initialization */
363 #define MMC_CAP2_CQE (1 << 23)              /* Has eMMC command queue engine */
364 #define MMC_CAP2_CQE_DCMD (1 << 24)         /* CQE can issue a direct command */
365 #define MMC_CAP2_AVOID_3_3V (1 << 25)       /* Host must negotiate down from 3.3V */
366 #define MMC_CAP2_MERGE_CAPABLE (1 << 26)    /* Host can merge a segment over the segment size */
367 
368     int fixed_drv_type; /* fixed driver type for non-removable media */
369 
370     mmc_pm_flag_t pm_caps; /* supported pm features */
371 
372     /* host specific block data */
373     unsigned int max_seg_size; /* see blk_queue_max_segment_size */
374     unsigned short max_segs;   /* see blk_queue_max_segments */
375     unsigned short unused;
376     unsigned int max_req_size;     /* maximum number of bytes in one req */
377     unsigned int max_blk_size;     /* maximum size of one mmc block */
378     unsigned int max_blk_count;    /* maximum number of blocks in one req */
379     unsigned int max_busy_timeout; /* max busy timeout in ms */
380 
381     /* private data */
382     spinlock_t lock; /* lock for claim and bus ops */
383 
384     struct mmc_ios ios; /* current io bus settings */
385 
386     /* group bitfields together to minimize padding */
387     unsigned int use_spi_crc : 1;
388     unsigned int claimed : 1;            /* host exclusively claimed */
389     unsigned int bus_dead : 1;           /* bus has been released */
390     unsigned int doing_init_tune : 1;    /* initial tuning in progress */
391     unsigned int can_retune : 1;         /* re-tuning can be used */
392     unsigned int doing_retune : 1;       /* re-tuning in progress */
393     unsigned int retune_now : 1;         /* do re-tuning at next req */
394     unsigned int retune_paused : 1;      /* re-tuning is temporarily disabled */
395     unsigned int use_blk_mq : 1;         /* use blk-mq */
396     unsigned int retune_crc_disable : 1; /* don't trigger retune upon crc */
397     unsigned int can_dma_map_merge : 1;  /* merging can be used */
398 
399     int rescan_disable; /* disable card detection */
400     int rescan_entered; /* used with nonremovable devices */
401 
402     int need_retune;                /* re-tuning is needed */
403     int hold_retune;                /* hold off re-tuning */
404     unsigned int retune_period;     /* re-tuning period in secs */
405     struct timer_list retune_timer; /* for periodic re-tuning */
406 
407     bool trigger_card_event; /* card_event necessary */
408 
409     struct mmc_card *card; /* device attached to this host */
410 
411     wait_queue_head_t wq;
412     struct mmc_ctx *claimer;    /* context that has host claimed */
413     int claim_cnt;              /* "claim" nesting count */
414     struct mmc_ctx default_ctx; /* default context */
415 
416     struct delayed_work detect;
417     int detect_change; /* card detect flag */
418     struct mmc_slot slot;
419 
420     const struct mmc_bus_ops *bus_ops; /* current bus driver */
421     unsigned int bus_refs;             /* reference counter */
422 
423     unsigned int sdio_irqs;
424     struct task_struct *sdio_irq_thread;
425     struct delayed_work sdio_irq_work;
426     bool sdio_irq_pending;
427     atomic_t sdio_irq_thread_abort;
428 
429     mmc_pm_flag_t pm_flags; /* requested pm features */
430 
431     struct led_trigger *led; /* activity led */
432 
433 #ifdef CONFIG_REGULATOR
434     bool regulator_enabled; /* regulator state */
435 #endif
436     struct mmc_supply supply;
437 
438     struct dentry *debugfs_root;
439 
440     /* Ongoing data transfer that allows commands during transfer */
441     struct mmc_request *ongoing_mrq;
442 
443 #ifdef CONFIG_FAIL_MMC_REQUEST
444     struct fault_attr fail_mmc_request;
445 #endif
446 
447     unsigned int actual_clock; /* Actual HC clock rate */
448 
449     unsigned int slotno; /* used for sdio acpi binding */
450 
451     int dsr_req; /* DSR value is valid */
452     u32 dsr;     /* optional driver stage (DSR) value */
453 
454     /* Command Queue Engine (CQE) support */
455     const struct mmc_cqe_ops *cqe_ops;
456     void *cqe_private;
457     int cqe_qdepth;
458     bool cqe_enabled;
459     bool cqe_on;
460 
461     /* Host Software Queue support */
462     bool hsq_enabled;
463 
464     unsigned long private[] ____cacheline_aligned;
465 };
466 
467 struct device_node;
468 
469 struct mmc_host *mmc_alloc_host(int extra, struct device *);
470 int mmc_add_host(struct mmc_host *);
471 void mmc_remove_host(struct mmc_host *);
472 void mmc_free_host(struct mmc_host *);
473 int mmc_of_parse(struct mmc_host *host);
474 int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
475 
476 extern struct mmc_host *primary_sdio_host;
477 int mmc_host_rescan(struct mmc_host *host, int val, int is_cap_sdio_irq);
478 
mmc_priv(struct mmc_host * host)479 static inline void *mmc_priv(struct mmc_host *host)
480 {
481     return (void *)host->private;
482 }
483 
mmc_from_priv(void * priv)484 static inline struct mmc_host *mmc_from_priv(void *priv)
485 {
486     return container_of(priv, struct mmc_host, private);
487 }
488 
489 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
490 
491 #define mmc_dev(x) ((x)->parent)
492 #define mmc_classdev(x) (&(x)->class_dev)
493 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
494 
495 void mmc_detect_change(struct mmc_host *, unsigned long delay);
496 void mmc_request_done(struct mmc_host *, struct mmc_request *);
497 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
498 
499 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
500 
501 /*
502  * May be called from host driver's system/runtime suspend/resume callbacks,
503  * to know if SDIO IRQs has been claimed.
504  */
sdio_irq_claimed(struct mmc_host * host)505 static inline bool sdio_irq_claimed(struct mmc_host *host)
506 {
507     return host->sdio_irqs > 0;
508 }
509 
mmc_signal_sdio_irq(struct mmc_host * host)510 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
511 {
512     host->ops->enable_sdio_irq(host, 0);
513     host->sdio_irq_pending = true;
514     if (host->sdio_irq_thread) {
515         wake_up_process(host->sdio_irq_thread);
516     }
517 }
518 
519 void sdio_signal_irq(struct mmc_host *host);
520 
521 #ifdef CONFIG_REGULATOR
522 int mmc_regulator_set_ocr(struct mmc_host *mmc, struct regulator *supply, unsigned short vdd_bit);
523 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
524 #else
mmc_regulator_set_ocr(struct mmc_host * mmc,struct regulator * supply,unsigned short vdd_bit)525 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc, struct regulator *supply, unsigned short vdd_bit)
526 {
527     return 0;
528 }
529 
mmc_regulator_set_vqmmc(struct mmc_host * mmc,struct mmc_ios * ios)530 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios)
531 {
532     return -EINVAL;
533 }
534 #endif
535 
536 int mmc_regulator_get_supply(struct mmc_host *mmc);
537 
mmc_card_is_removable(struct mmc_host * host)538 static inline int mmc_card_is_removable(struct mmc_host *host)
539 {
540     return !(host->caps & MMC_CAP_NONREMOVABLE);
541 }
542 
mmc_card_keep_power(struct mmc_host * host)543 static inline int mmc_card_keep_power(struct mmc_host *host)
544 {
545     return host->pm_flags & MMC_PM_KEEP_POWER;
546 }
547 
mmc_card_wake_sdio_irq(struct mmc_host * host)548 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
549 {
550     return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
551 }
552 
553 /* Move to private header */
mmc_card_hs(struct mmc_card * card)554 static inline int mmc_card_hs(struct mmc_card *card)
555 {
556     return card->host->ios.timing == MMC_TIMING_SD_HS || card->host->ios.timing == MMC_TIMING_MMC_HS;
557 }
558 
559 /* Move to private header */
mmc_card_uhs(struct mmc_card * card)560 static inline int mmc_card_uhs(struct mmc_card *card)
561 {
562     return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 && card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
563 }
564 
565 void mmc_retune_timer_stop(struct mmc_host *host);
566 
mmc_retune_needed(struct mmc_host * host)567 static inline void mmc_retune_needed(struct mmc_host *host)
568 {
569     if (host->can_retune) {
570         host->need_retune = 1;
571     }
572 }
573 
mmc_can_retune(struct mmc_host * host)574 static inline bool mmc_can_retune(struct mmc_host *host)
575 {
576     return host->can_retune == 1;
577 }
578 
mmc_doing_retune(struct mmc_host * host)579 static inline bool mmc_doing_retune(struct mmc_host *host)
580 {
581     return host->doing_retune == 1;
582 }
583 
mmc_doing_tune(struct mmc_host * host)584 static inline bool mmc_doing_tune(struct mmc_host *host)
585 {
586     return host->doing_retune == 1 || host->doing_init_tune == 1;
587 }
588 
mmc_get_dma_dir(struct mmc_data * data)589 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
590 {
591     return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
592 }
593 
594 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
595 int mmc_abort_tuning(struct mmc_host *host, u32 opcode);
596 
597 #endif /* LINUX_MMC_HOST_H */
598