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1 // Copyright (C) 2022 Beken Corporation
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 //     http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #pragma once
16 
17 #ifdef __cplusplus
18 extern "C" {
19 #endif
20 
21 typedef volatile struct {
22 	/* REG_0x0 */
23 	union {
24 		struct {
25 			uint32_t addr_sw_reg: 24; /**< bit[0:23] */
26 			uint32_t op_type_sw:  5;  /**< bit[24:28] */
27 			uint32_t op_sw:       1;  /**< bit[29] */
28 			uint32_t wp_value:    1;  /**< bit[30] */
29 			uint32_t busy_sw:     1;  /**< bit[31] */
30 		};
31 		uint32_t v;
32 	} op_sw;
33 
34 	/* REG_0x1 */
35 	uint32_t data_sw_flash; /**< data to be written from software to flash */
36 
37 	/* REG_0x2 */
38 	uint32_t data_flash_sw; /**< data read from flash to software */
39 
40 	/* REG_0x3 */
41 	union {
42 		struct {
43 			uint32_t wrsr_cmd_reg:  8;  /**< bit[0:7] */
44 			uint32_t rdsr_cmd_reg:  8;  /**< bit[8:15] */
45 			uint32_t wrsr_cmd_sel:  1;  /**< bit[16] */
46 			uint32_t rdsr_cmd_sel:  1;  /**< bit[17] */
47 			uint32_t reserved:     14;  /**< bit[18:31] */
48 		};
49 		uint32_t v;
50 	} sr_cmd;
51 
52 	/* REG_0x4 */
53 	uint32_t rd_flash_id; /**< read flash id data */
54 
55 	/* REG_0x5 */
56 	union {
57 		struct {
58 			uint32_t status_reg:       8;  /**< bit[0:7] */
59 			uint32_t crc_err_num: 8;  /**< bit[8:15] */
60 			uint32_t byte_sel_wr: 3;  /**< bit[16:18] */
61 			uint32_t byte_sel_rd: 3;  /**< bit[19:21] */
62 			uint32_t reserved:    10; /**< bit[22:31] */
63 		};
64 		uint32_t v;
65 	} state;
66 
67 	/* REG_0x6 */
68 	uint32_t reserved1;
69 
70 	/* REG_0x7 */
71 	union {
72 		struct {
73 			uint32_t clk_cfg:        4;  /**< bit[0:3] */
74 			uint32_t mode_sel:       5;  /**< bit[4:8] */
75 			uint32_t cpu_data_wr_en: 1;  /**< bit[9] */
76 			uint32_t wrsr_data:      16; /**< bit[10:25] */
77 			uint32_t crc_en:         1;  /**< bit[26] */
78 			uint32_t reserved:       5;  /**< bit[27:31] */
79 		};
80 		uint32_t v;
81 	} config;
82 } flash_hw_t;
83 
84 #ifdef __cplusplus
85 }
86 #endif
87 
88