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1 // Copyright 2020 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 //     http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #include <stdint.h>
16 #include <stdbool.h>
17 #include "esp_err.h"
18 #include "esp_intr_alloc.h"
19 #include "soc/soc_caps.h"
20 #include "hal/dma_types.h"
21 #include "esp_osal/esp_osal.h"
22 
23 #if SOC_CP_DMA_SUPPORTED
24 #include "hal/cp_dma_ll.h"
25 #include "hal/cp_dma_hal.h"
26 #elif SOC_GDMA_SUPPORTED
27 #include "esp_private/gdma.h"
28 #endif
29 
30 /**
31  * @brief Type of async mcp implementation layer context
32  *
33  */
34 typedef struct {
35 #if SOC_CP_DMA_SUPPORTED
36     cp_dma_hal_context_t hal; // CP DMA hal
37     intr_handle_t intr; // CP DMA interrupt handle
38     portMUX_TYPE hal_lock; // CP DMA HAL level spin lock
39 #elif SOC_GDMA_SUPPORTED
40     gdma_channel_handle_t tx_channel;
41     gdma_channel_handle_t rx_channel;
42 #endif
43     intptr_t rx_eof_addr;
44     bool isr_need_yield;      // if current isr needs a yield for higher priority task
45 } async_memcpy_impl_t;
46 
47 /**
48  * @brief ISR callback function, invoked when RX done event triggered
49  *
50  * @param impl async mcp implementation layer context pointer
51  */
52 void async_memcpy_isr_on_rx_done_event(async_memcpy_impl_t *impl);
53 
54 /**
55  * @brief Initialize async mcp implementation layer
56  *
57  * @param impl async mcp implementation layer context pointer
58  * @return Always return ESP_OK
59  */
60 esp_err_t async_memcpy_impl_init(async_memcpy_impl_t *impl);
61 
62 /**
63  * @brief Deinitialize async mcp implementation layer
64  *
65  * @param impl async mcp implementation layer context pointer
66  * @return Always return ESP_OK
67  */
68 esp_err_t async_memcpy_impl_deinit(async_memcpy_impl_t *impl);
69 
70 /**
71  * @brief Start async mcp (on implementation layer)
72  *
73  * @param impl async mcp implementation layer context pointer
74  * @param outlink_base base descriptor address for TX DMA channel
75  * @param inlink_base base descriptor address for RX DMA channel
76  * @return Always return ESP_OK
77  */
78 esp_err_t async_memcpy_impl_start(async_memcpy_impl_t *impl, intptr_t outlink_base, intptr_t inlink_base);
79 
80 /**
81  * @brief Stop async mcp (on implementation layer)
82  *
83  * @param impl async mcp implementation layer context pointer
84  * @return Always return ESP_OK
85  */
86 esp_err_t async_memcpy_impl_stop(async_memcpy_impl_t *impl);
87 
88 /**
89  * @brief Restart async mcp DMA engine
90  *
91  * @param impl async mcp implementation layer context pointer
92  * @return Always return ESP_OK
93  */
94 esp_err_t async_memcpy_impl_restart(async_memcpy_impl_t *impl);
95 
96 /**
97  * @brief check if buffer address is valid
98  * @note This is related to underlying target (e.g. on esp32-s2, only buffer located in SRAM is supported)
99  *
100  * @param impl async mcp implementation layer context pointer
101  * @param src Source buffer address
102  * @param dst Destination buffer address
103  * @return True if both address are valid
104  */
105 bool async_memcpy_impl_is_buffer_address_valid(async_memcpy_impl_t *impl, void *src, void *dst);
106