1 /*
2 * Copyright © 2018 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "nir.h"
25 #include "nir_builder.h"
26
27 static bool
assert_ssa_def_is_not_1bit(nir_ssa_def * def,UNUSED void * unused)28 assert_ssa_def_is_not_1bit(nir_ssa_def *def, UNUSED void *unused)
29 {
30 assert(def->bit_size > 1);
31 return true;
32 }
33
34 static bool
rewrite_1bit_ssa_def_to_32bit(nir_ssa_def * def,void * _progress)35 rewrite_1bit_ssa_def_to_32bit(nir_ssa_def *def, void *_progress)
36 {
37 bool *progress = _progress;
38 if (def->bit_size == 1) {
39 def->bit_size = 32;
40 *progress = true;
41 }
42 return true;
43 }
44
45 static bool
lower_alu_instr(nir_builder * b,nir_alu_instr * alu)46 lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
47 {
48 const nir_op_info *op_info = &nir_op_infos[alu->op];
49
50 b->cursor = nir_before_instr(&alu->instr);
51
52 /* Replacement SSA value */
53 nir_ssa_def *rep = NULL;
54 switch (alu->op) {
55 case nir_op_mov:
56 case nir_op_vec2:
57 case nir_op_vec3:
58 case nir_op_vec4:
59 case nir_op_vec5:
60 case nir_op_vec8:
61 case nir_op_vec16:
62 if (alu->dest.dest.ssa.bit_size != 1)
63 return false;
64 /* These we expect to have booleans but the opcode doesn't change */
65 break;
66
67 case nir_op_b2f32: alu->op = nir_op_mov; break;
68 case nir_op_b2i32: alu->op = nir_op_mov; break;
69 case nir_op_f2b1:
70 case nir_op_i2b1:
71 rep = nir_sne(b, nir_ssa_for_alu_src(b, alu, 0),
72 nir_imm_float(b, 0));
73 break;
74 case nir_op_b2b1: alu->op = nir_op_mov; break;
75
76 case nir_op_flt: alu->op = nir_op_slt; break;
77 case nir_op_fge: alu->op = nir_op_sge; break;
78 case nir_op_feq: alu->op = nir_op_seq; break;
79 case nir_op_fneu: alu->op = nir_op_sne; break;
80 case nir_op_ilt: alu->op = nir_op_slt; break;
81 case nir_op_ige: alu->op = nir_op_sge; break;
82 case nir_op_ieq: alu->op = nir_op_seq; break;
83 case nir_op_ine: alu->op = nir_op_sne; break;
84 case nir_op_ult: alu->op = nir_op_slt; break;
85 case nir_op_uge: alu->op = nir_op_sge; break;
86
87 case nir_op_ball_fequal2: alu->op = nir_op_fall_equal2; break;
88 case nir_op_ball_fequal3: alu->op = nir_op_fall_equal3; break;
89 case nir_op_ball_fequal4: alu->op = nir_op_fall_equal4; break;
90 case nir_op_bany_fnequal2: alu->op = nir_op_fany_nequal2; break;
91 case nir_op_bany_fnequal3: alu->op = nir_op_fany_nequal3; break;
92 case nir_op_bany_fnequal4: alu->op = nir_op_fany_nequal4; break;
93 case nir_op_ball_iequal2: alu->op = nir_op_fall_equal2; break;
94 case nir_op_ball_iequal3: alu->op = nir_op_fall_equal3; break;
95 case nir_op_ball_iequal4: alu->op = nir_op_fall_equal4; break;
96 case nir_op_bany_inequal2: alu->op = nir_op_fany_nequal2; break;
97 case nir_op_bany_inequal3: alu->op = nir_op_fany_nequal3; break;
98 case nir_op_bany_inequal4: alu->op = nir_op_fany_nequal4; break;
99
100 case nir_op_bcsel: alu->op = nir_op_fcsel; break;
101
102 case nir_op_iand: alu->op = nir_op_fmul; break;
103 case nir_op_ixor: alu->op = nir_op_sne; break;
104 case nir_op_ior: alu->op = nir_op_fmax; break;
105
106 case nir_op_inot:
107 rep = nir_seq(b, nir_ssa_for_alu_src(b, alu, 0),
108 nir_imm_float(b, 0));
109 break;
110
111 default:
112 assert(alu->dest.dest.ssa.bit_size > 1);
113 for (unsigned i = 0; i < op_info->num_inputs; i++)
114 assert(alu->src[i].src.ssa->bit_size > 1);
115 return false;
116 }
117
118 if (rep) {
119 /* We've emitted a replacement instruction */
120 nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, rep);
121 nir_instr_remove(&alu->instr);
122 } else {
123 if (alu->dest.dest.ssa.bit_size == 1)
124 alu->dest.dest.ssa.bit_size = 32;
125 }
126
127 return true;
128 }
129
130 static bool
lower_tex_instr(nir_tex_instr * tex)131 lower_tex_instr(nir_tex_instr *tex)
132 {
133 bool progress = false;
134 rewrite_1bit_ssa_def_to_32bit(&tex->dest.ssa, &progress);
135 if (tex->dest_type == nir_type_bool1) {
136 tex->dest_type = nir_type_bool32;
137 progress = true;
138 }
139 return progress;
140 }
141
142 static bool
nir_lower_bool_to_float_impl(nir_function_impl * impl)143 nir_lower_bool_to_float_impl(nir_function_impl *impl)
144 {
145 bool progress = false;
146
147 nir_builder b;
148 nir_builder_init(&b, impl);
149
150 nir_foreach_block(block, impl) {
151 nir_foreach_instr_safe(instr, block) {
152 switch (instr->type) {
153 case nir_instr_type_alu:
154 progress |= lower_alu_instr(&b, nir_instr_as_alu(instr));
155 break;
156
157 case nir_instr_type_load_const: {
158 nir_load_const_instr *load = nir_instr_as_load_const(instr);
159 if (load->def.bit_size == 1) {
160 nir_const_value *value = load->value;
161 for (unsigned i = 0; i < load->def.num_components; i++)
162 load->value[i].f32 = value[i].b ? 1.0 : 0.0;
163 load->def.bit_size = 32;
164 progress = true;
165 }
166 break;
167 }
168
169 case nir_instr_type_intrinsic:
170 case nir_instr_type_ssa_undef:
171 case nir_instr_type_phi:
172 nir_foreach_ssa_def(instr, rewrite_1bit_ssa_def_to_32bit,
173 &progress);
174 break;
175
176 case nir_instr_type_tex:
177 progress |= lower_tex_instr(nir_instr_as_tex(instr));
178 break;
179
180 default:
181 nir_foreach_ssa_def(instr, assert_ssa_def_is_not_1bit, NULL);
182 }
183 }
184 }
185
186 if (progress) {
187 nir_metadata_preserve(impl, nir_metadata_block_index |
188 nir_metadata_dominance);
189 }
190
191 return progress;
192 }
193
194 bool
nir_lower_bool_to_float(nir_shader * shader)195 nir_lower_bool_to_float(nir_shader *shader)
196 {
197 bool progress = false;
198
199 nir_foreach_function(function, shader) {
200 if (function->impl && nir_lower_bool_to_float_impl(function->impl))
201 progress = true;
202 }
203
204 return progress;
205 }
206